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[AArch64] Convert test to opaque pointers (NFC)
One test case was testing the case where a bitcasted function pointer is passed to an X constraint. With opaque pointers, this is no longer a thing, and it gets treated the same way as a non-bitcasted function pointer. Per the comment, this is a desirable change.
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llvm/test/CodeGen/AArch64/inlineasm-X-constraint.ll

Lines changed: 18 additions & 26 deletions
Original file line numberDiff line numberDiff line change
@@ -18,9 +18,9 @@
1818
define double @f1(double %f, i32 %pscr_value) {
1919
entry:
2020
%f.addr = alloca double, align 8
21-
store double %f, double* %f.addr, align 8
22-
call void asm sideeffect "msr fpsr,$1", "=*X,r"(double* elementtype(double) nonnull %f.addr, i32 %pscr_value) nounwind
23-
%0 = load double, double* %f.addr, align 8
21+
store double %f, ptr %f.addr, align 8
22+
call void asm sideeffect "msr fpsr,$1", "=*X,r"(ptr elementtype(double) nonnull %f.addr, i32 %pscr_value) nounwind
23+
%0 = load double, ptr %f.addr, align 8
2424
%add = fadd double %0, %0
2525
ret double %add
2626
}
@@ -36,9 +36,9 @@ entry:
3636
define i32 @f2(i32 %f, i32 %pscr_value) {
3737
entry:
3838
%f.addr = alloca i32, align 4
39-
store i32 %f, i32* %f.addr, align 4
40-
call void asm sideeffect "msr fpsr,$1", "=*X,r"(i32* elementtype(i32) nonnull %f.addr, i32 %pscr_value) nounwind
41-
%0 = load i32, i32* %f.addr, align 4
39+
store i32 %f, ptr %f.addr, align 4
40+
call void asm sideeffect "msr fpsr,$1", "=*X,r"(ptr elementtype(i32) nonnull %f.addr, i32 %pscr_value) nounwind
41+
%0 = load i32, ptr %f.addr, align 4
4242
%mul = mul i32 %0, %0
4343
ret i32 %mul
4444
}
@@ -59,10 +59,9 @@ entry:
5959
define <8 x i8> @f3() {
6060
entry:
6161
%vector_res_int8x8 = alloca <8 x i8>, align 8
62-
%0 = getelementptr inbounds <8 x i8>, <8 x i8>* %vector_res_int8x8, i32 0, i32 0
63-
call void asm sideeffect "msr fpsr,$1", "=*X,r"(<8 x i8>* elementtype(<8 x i8>) nonnull %vector_res_int8x8, i32 undef) nounwind
64-
%1 = load <8 x i8>, <8 x i8>* %vector_res_int8x8, align 8
65-
%mul = mul <8 x i8> %1, %1
62+
call void asm sideeffect "msr fpsr,$1", "=*X,r"(ptr elementtype(<8 x i8>) nonnull %vector_res_int8x8, i32 undef) nounwind
63+
%0 = load <8 x i8>, ptr %vector_res_int8x8, align 8
64+
%mul = mul <8 x i8> %0, %0
6665
ret <8 x i8> %mul
6766
}
6867

@@ -90,31 +89,24 @@ entry:
9089
; CHECK: bl f4
9190
define void @f5() {
9291
entry:
93-
tail call void asm sideeffect "bl $0", "X"(void ()* nonnull @f4)
92+
tail call void asm sideeffect "bl $0", "X"(ptr nonnull @f4)
9493
ret void
9594
}
9695

9796
declare void @foo(...)
9897

9998
; This tests the behavior of the X constraint when used on functions pointers,
100-
; or functions with a cast. In the first asm call we figure out that this
101-
; is a function pointer and emit the label. However, in the second asm call
102-
; we can't see through the bitcast and we end up having to lower this constraint
103-
; to something else. This is not ideal, but it is a correct behaviour according
104-
; to the definition of the X constraint.
105-
;
106-
; In this case (and other cases where we could have emitted something else),
107-
; what we're doing with the X constraint is not particularly useful either,
108-
; since the user could have used "r" in this situation for the same effect.
99+
; or functions with a cast. We figure out that this is a function pointer and
100+
; emit the label.
109101

110102
; CHECK-LABEL: f6
111103
; CHECK: bl foo
112-
; CHECK: br x
104+
; CHECK: bl f4
113105

114106
define void @f6() nounwind {
115107
entry:
116-
tail call void asm sideeffect "bl $0", "X"(void (...)* @foo) nounwind
117-
tail call void asm sideeffect "br $0", "X"(void (...)* bitcast (void ()* @f4 to void (...)*)) nounwind
108+
tail call void asm sideeffect "bl $0", "X"(ptr @foo) nounwind
109+
tail call void asm sideeffect "bl $0", "X"(ptr @f4) nounwind
118110
ret void
119111
}
120112

@@ -129,7 +121,7 @@ entry:
129121
; CHECK-LABEL: f7
130122
; CHECK: bl .Ltmp3
131123
define void @f7() {
132-
call void asm sideeffect "bl $0", "X"( i8* blockaddress(@f7, %bb) )
124+
call void asm sideeffect "bl $0", "X"( ptr blockaddress(@f7, %bb) )
133125
br label %bb
134126
bb:
135127
ret void
@@ -139,8 +131,8 @@ bb:
139131
; CHECK-LABEL: f8
140132
; CHECK: add [[Dest:x[0-9]+]], x0, x0
141133
; CHECK: str [[Dest]], [x0]
142-
define void @f8(i64 *%x) {
134+
define void @f8(ptr %x) {
143135
entry:
144-
tail call void asm sideeffect "add $0, x0, x0", "=*X"(i64* elementtype(i64) %x)
136+
tail call void asm sideeffect "add $0, x0, x0", "=*X"(ptr elementtype(i64) %x)
145137
ret void
146138
}

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