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3 files changed

+31
-28
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‎llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2159,7 +2159,8 @@ bool SPIRVInstructionSelector::selectWaveReduceMax(Register ResVReg,
21592159
.addUse(GR.getSPIRVTypeID(ResType))
21602160
.addUse(GR.getOrCreateConstInt(SPIRV::Scope::Subgroup, I, IntTy, TII))
21612161
.addImm(SPIRV::GroupOperation::Reduce)
2162-
.addUse(I.getOperand(2).getReg());
2162+
.addUse(I.getOperand(2).getReg())
2163+
.constrainAllUses(TII, TRI, RBI);
21632164
}
21642165

21652166
bool SPIRVInstructionSelector::selectWaveReduceSum(Register ResVReg,

‎llvm/test/CodeGen/DirectX/WaveActiveMax.ll

Lines changed: 27 additions & 27 deletions
Original file line numberDiff line numberDiff line change
@@ -4,63 +4,63 @@
44

55
define noundef half @wave_active_max_half(half noundef %expr) {
66
entry:
7-
; CHECK: call half @dx.op.waveActiveOp.f16(i32 119, half %expr, i8 3, i8 0)
7+
; CHECK: call half @dx.op.waveActiveOp.f16(i32 119, half %expr, i8 3, i8 0){{$}}
88
%ret = call half @llvm.dx.wave.reduce.max.f16(half %expr)
99
ret half %ret
1010
}
1111

1212
define noundef float @wave_active_max_float(float noundef %expr) {
1313
entry:
14-
; CHECK: call float @dx.op.waveActiveOp.f32(i32 119, float %expr, i8 3, i8 0)
14+
; CHECK: call float @dx.op.waveActiveOp.f32(i32 119, float %expr, i8 3, i8 0){{$}}
1515
%ret = call float @llvm.dx.wave.reduce.max.f32(float %expr)
1616
ret float %ret
1717
}
1818

1919
define noundef double @wave_active_max_double(double noundef %expr) {
2020
entry:
21-
; CHECK: call double @dx.op.waveActiveOp.f64(i32 119, double %expr, i8 3, i8 0)
21+
; CHECK: call double @dx.op.waveActiveOp.f64(i32 119, double %expr, i8 3, i8 0){{$}}
2222
%ret = call double @llvm.dx.wave.reduce.max.f64(double %expr)
2323
ret double %ret
2424
}
2525

2626
define noundef i16 @wave_active_max_i16(i16 noundef %expr) {
2727
entry:
28-
; CHECK: call i16 @dx.op.waveActiveOp.i16(i32 119, i16 %expr, i8 3, i8 0)
28+
; CHECK: call i16 @dx.op.waveActiveOp.i16(i32 119, i16 %expr, i8 3, i8 0){{$}}
2929
%ret = call i16 @llvm.dx.wave.reduce.max.i16(i16 %expr)
3030
ret i16 %ret
3131
}
3232

3333
define noundef i32 @wave_active_max_i32(i32 noundef %expr) {
3434
entry:
35-
; CHECK: call i32 @dx.op.waveActiveOp.i32(i32 119, i32 %expr, i8 3, i8 0)
35+
; CHECK: call i32 @dx.op.waveActiveOp.i32(i32 119, i32 %expr, i8 3, i8 0){{$}}
3636
%ret = call i32 @llvm.dx.wave.reduce.max.i32(i32 %expr)
3737
ret i32 %ret
3838
}
3939

4040
define noundef i64 @wave_active_max_i64(i64 noundef %expr) {
4141
entry:
42-
; CHECK: call i64 @dx.op.waveActiveOp.i64(i32 119, i64 %expr, i8 3, i8 0)
42+
; CHECK: call i64 @dx.op.waveActiveOp.i64(i32 119, i64 %expr, i8 3, i8 0){{$}}
4343
%ret = call i64 @llvm.dx.wave.reduce.max.i64(i64 %expr)
4444
ret i64 %ret
4545
}
4646

4747
define noundef i16 @wave_active_umax_i16(i16 noundef %expr) {
4848
entry:
49-
; CHECK: call i16 @dx.op.waveActiveOp.i16(i32 119, i16 %expr, i8 3, i8 1)
49+
; CHECK: call i16 @dx.op.waveActiveOp.i16(i32 119, i16 %expr, i8 3, i8 1){{$}}
5050
%ret = call i16 @llvm.dx.wave.reduce.umax.i16(i16 %expr)
5151
ret i16 %ret
5252
}
5353

5454
define noundef i32 @wave_active_umax_i32(i32 noundef %expr) {
5555
entry:
56-
; CHECK: call i32 @dx.op.waveActiveOp.i32(i32 119, i32 %expr, i8 3, i8 1)
56+
; CHECK: call i32 @dx.op.waveActiveOp.i32(i32 119, i32 %expr, i8 3, i8 1){{$}}
5757
%ret = call i32 @llvm.dx.wave.reduce.umax.i32(i32 %expr)
5858
ret i32 %ret
5959
}
6060

6161
define noundef i64 @wave_active_umax_i64(i64 noundef %expr) {
6262
entry:
63-
; CHECK: call i64 @dx.op.waveActiveOp.i64(i32 119, i64 %expr, i8 3, i8 1)
63+
; CHECK: call i64 @dx.op.waveActiveOp.i64(i32 119, i64 %expr, i8 3, i8 1){{$}}
6464
%ret = call i64 @llvm.dx.wave.reduce.umax.i64(i64 %expr)
6565
ret i64 %ret
6666
}
@@ -82,27 +82,27 @@ declare i64 @llvm.dx.wave.reduce.umax.i64(i64)
8282

8383
define noundef <2 x half> @wave_active_max_v2half(<2 x half> noundef %expr) {
8484
entry:
85-
; CHECK: call half @dx.op.waveActiveOp.f16(i32 119, half %expr.i0, i8 3, i8 0)
86-
; CHECK: call half @dx.op.waveActiveOp.f16(i32 119, half %expr.i1, i8 3, i8 0)
85+
; CHECK: call half @dx.op.waveActiveOp.f16(i32 119, half %expr.i0, i8 3, i8 0){{$}}
86+
; CHECK: call half @dx.op.waveActiveOp.f16(i32 119, half %expr.i1, i8 3, i8 0){{$}}
8787
%ret = call <2 x half> @llvm.dx.wave.reduce.max.v2f16(<2 x half> %expr)
8888
ret <2 x half> %ret
8989
}
9090

9191
define noundef <3 x i32> @wave_active_max_v3i32(<3 x i32> noundef %expr) {
9292
entry:
93-
; CHECK: call i32 @dx.op.waveActiveOp.i32(i32 119, i32 %expr.i0, i8 3, i8 0)
94-
; CHECK: call i32 @dx.op.waveActiveOp.i32(i32 119, i32 %expr.i1, i8 3, i8 0)
95-
; CHECK: call i32 @dx.op.waveActiveOp.i32(i32 119, i32 %expr.i2, i8 3, i8 0)
93+
; CHECK: call i32 @dx.op.waveActiveOp.i32(i32 119, i32 %expr.i0, i8 3, i8 0){{$}}
94+
; CHECK: call i32 @dx.op.waveActiveOp.i32(i32 119, i32 %expr.i1, i8 3, i8 0){{$}}
95+
; CHECK: call i32 @dx.op.waveActiveOp.i32(i32 119, i32 %expr.i2, i8 3, i8 0){{$}}
9696
%ret = call <3 x i32> @llvm.dx.wave.reduce.max.v3i32(<3 x i32> %expr)
9797
ret <3 x i32> %ret
9898
}
9999

100100
define noundef <4 x double> @wave_active_max_v4f64(<4 x double> noundef %expr) {
101101
entry:
102-
; CHECK: call double @dx.op.waveActiveOp.f64(i32 119, double %expr.i0, i8 3, i8 0)
103-
; CHECK: call double @dx.op.waveActiveOp.f64(i32 119, double %expr.i1, i8 3, i8 0)
104-
; CHECK: call double @dx.op.waveActiveOp.f64(i32 119, double %expr.i2, i8 3, i8 0)
105-
; CHECK: call double @dx.op.waveActiveOp.f64(i32 119, double %expr.i3, i8 3, i8 0)
102+
; CHECK: call double @dx.op.waveActiveOp.f64(i32 119, double %expr.i0, i8 3, i8 0){{$}}
103+
; CHECK: call double @dx.op.waveActiveOp.f64(i32 119, double %expr.i1, i8 3, i8 0){{$}}
104+
; CHECK: call double @dx.op.waveActiveOp.f64(i32 119, double %expr.i2, i8 3, i8 0){{$}}
105+
; CHECK: call double @dx.op.waveActiveOp.f64(i32 119, double %expr.i3, i8 3, i8 0){{$}}
106106
%ret = call <4 x double> @llvm.dx.wave.reduce.max.v4f64(<4 x double> %expr)
107107
ret <4 x double> %ret
108108
}
@@ -113,27 +113,27 @@ declare <4 x double> @llvm.dx.wave.reduce.max.v4f64(<4 x double>)
113113

114114
define noundef <2 x i16> @wave_active_umax_v2i16(<2 x i16> noundef %expr) {
115115
entry:
116-
; CHECK: call i16 @dx.op.waveActiveOp.i16(i32 119, i16 %expr.i0, i8 3, i8 1)
117-
; CHECK: call i16 @dx.op.waveActiveOp.i16(i32 119, i16 %expr.i1, i8 3, i8 1)
116+
; CHECK: call i16 @dx.op.waveActiveOp.i16(i32 119, i16 %expr.i0, i8 3, i8 1){{$}}
117+
; CHECK: call i16 @dx.op.waveActiveOp.i16(i32 119, i16 %expr.i1, i8 3, i8 1){{$}}
118118
%ret = call <2 x i16> @llvm.dx.wave.reduce.umax.v2f16(<2 x i16> %expr)
119119
ret <2 x i16> %ret
120120
}
121121

122122
define noundef <3 x i32> @wave_active_umax_v3i32(<3 x i32> noundef %expr) {
123123
entry:
124-
; CHECK: call i32 @dx.op.waveActiveOp.i32(i32 119, i32 %expr.i0, i8 3, i8 1)
125-
; CHECK: call i32 @dx.op.waveActiveOp.i32(i32 119, i32 %expr.i1, i8 3, i8 1)
126-
; CHECK: call i32 @dx.op.waveActiveOp.i32(i32 119, i32 %expr.i2, i8 3, i8 1)
124+
; CHECK: call i32 @dx.op.waveActiveOp.i32(i32 119, i32 %expr.i0, i8 3, i8 1){{$}}
125+
; CHECK: call i32 @dx.op.waveActiveOp.i32(i32 119, i32 %expr.i1, i8 3, i8 1){{$}}
126+
; CHECK: call i32 @dx.op.waveActiveOp.i32(i32 119, i32 %expr.i2, i8 3, i8 1){{$}}
127127
%ret = call <3 x i32> @llvm.dx.wave.reduce.umax.v3i32(<3 x i32> %expr)
128128
ret <3 x i32> %ret
129129
}
130130

131131
define noundef <4 x i64> @wave_active_umax_v4f64(<4 x i64> noundef %expr) {
132132
entry:
133-
; CHECK: call i64 @dx.op.waveActiveOp.i64(i32 119, i64 %expr.i0, i8 3, i8 1)
134-
; CHECK: call i64 @dx.op.waveActiveOp.i64(i32 119, i64 %expr.i1, i8 3, i8 1)
135-
; CHECK: call i64 @dx.op.waveActiveOp.i64(i32 119, i64 %expr.i2, i8 3, i8 1)
136-
; CHECK: call i64 @dx.op.waveActiveOp.i64(i32 119, i64 %expr.i3, i8 3, i8 1)
133+
; CHECK: call i64 @dx.op.waveActiveOp.i64(i32 119, i64 %expr.i0, i8 3, i8 1){{$}}
134+
; CHECK: call i64 @dx.op.waveActiveOp.i64(i32 119, i64 %expr.i1, i8 3, i8 1){{$}}
135+
; CHECK: call i64 @dx.op.waveActiveOp.i64(i32 119, i64 %expr.i2, i8 3, i8 1){{$}}
136+
; CHECK: call i64 @dx.op.waveActiveOp.i64(i32 119, i64 %expr.i3, i8 3, i8 1){{$}}
137137
%ret = call <4 x i64> @llvm.dx.wave.reduce.umax.v4f64(<4 x i64> %expr)
138138
ret <4 x i64> %ret
139139
}

‎llvm/test/CodeGen/SPIRV/hlsl-intrinsics/WaveActiveMax.ll

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -3,6 +3,8 @@
33

44
; Test lowering to spir-v backend for various types and scalar/vector
55

6+
; CHECK: OpCapability GroupNonUniformArithmetic
7+
68
; CHECK-DAG: %[[#f16:]] = OpTypeFloat 16
79
; CHECK-DAG: %[[#f32:]] = OpTypeFloat 32
810
; CHECK-DAG: %[[#uint:]] = OpTypeInt 32 0

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