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[NFC] Update function names in MCTargetAsmParser.h (#108643)
Update function names to adhere to LLVM coding standard.
1 parent afce1b1 commit 4b52408

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20 files changed

+151
-160
lines changed

20 files changed

+151
-160
lines changed

‎llvm/include/llvm/MC/MCParser/MCTargetAsmParser.h

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -426,7 +426,7 @@ class MCTargetAsmParser : public MCAsmParserExtension {
426426
virtual ParseStatus tryParseRegister(MCRegister &Reg, SMLoc &StartLoc,
427427
SMLoc &EndLoc) = 0;
428428

429-
/// ParseInstruction - Parse one assembly instruction.
429+
/// Parse one assembly instruction.
430430
///
431431
/// The parser is positioned following the instruction name. The target
432432
/// specific instruction parser should parse the entire instruction and
@@ -439,11 +439,11 @@ class MCTargetAsmParser : public MCAsmParserExtension {
439439
/// \param Operands [out] - The list of parsed operands, this returns
440440
/// ownership of them to the caller.
441441
/// \return True on failure.
442-
virtual bool ParseInstruction(ParseInstructionInfo &Info, StringRef Name,
442+
virtual bool parseInstruction(ParseInstructionInfo &Info, StringRef Name,
443443
SMLoc NameLoc, OperandVector &Operands) = 0;
444-
virtual bool ParseInstruction(ParseInstructionInfo &Info, StringRef Name,
444+
virtual bool parseInstruction(ParseInstructionInfo &Info, StringRef Name,
445445
AsmToken Token, OperandVector &Operands) {
446-
return ParseInstruction(Info, Name, Token.getLoc(), Operands);
446+
return parseInstruction(Info, Name, Token.getLoc(), Operands);
447447
}
448448

449449
/// ParseDirective - Parse a target specific assembler directive
@@ -471,19 +471,19 @@ class MCTargetAsmParser : public MCAsmParserExtension {
471471
/// \param DirectiveID - The token identifying the directive.
472472
virtual ParseStatus parseDirective(AsmToken DirectiveID);
473473

474-
/// MatchAndEmitInstruction - Recognize a series of operands of a parsed
474+
/// Recognize a series of operands of a parsed
475475
/// instruction as an actual MCInst and emit it to the specified MCStreamer.
476476
/// This returns false on success and returns true on failure to match.
477477
///
478478
/// On failure, the target parser is responsible for emitting a diagnostic
479479
/// explaining the match failure.
480-
virtual bool MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
480+
virtual bool matchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
481481
OperandVector &Operands, MCStreamer &Out,
482482
uint64_t &ErrorInfo,
483483
bool MatchingInlineAsm) = 0;
484484

485485
/// Allows targets to let registers opt out of clobber lists.
486-
virtual bool OmitRegisterFromClobberLists(unsigned RegNo) { return false; }
486+
virtual bool omitRegisterFromClobberLists(unsigned RegNo) { return false; }
487487

488488
/// Allow a target to add special case operand matching for things that
489489
/// tblgen doesn't/can't handle effectively. For example, literal

‎llvm/lib/MC/MCParser/AsmParser.cpp

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -2322,7 +2322,7 @@ bool AsmParser::parseAndMatchAndEmitTargetInstruction(ParseStatementInfo &Info,
23222322
// Canonicalize the opcode to lower case.
23232323
std::string OpcodeStr = IDVal.lower();
23242324
ParseInstructionInfo IInfo(Info.AsmRewrites);
2325-
bool ParseHadError = getTargetParser().ParseInstruction(IInfo, OpcodeStr, ID,
2325+
bool ParseHadError = getTargetParser().parseInstruction(IInfo, OpcodeStr, ID,
23262326
Info.ParsedOperands);
23272327
Info.ParseError = ParseHadError;
23282328

@@ -2379,7 +2379,7 @@ bool AsmParser::parseAndMatchAndEmitTargetInstruction(ParseStatementInfo &Info,
23792379
// If parsing succeeded, match the instruction.
23802380
if (!ParseHadError) {
23812381
uint64_t ErrorInfo;
2382-
if (getTargetParser().MatchAndEmitInstruction(
2382+
if (getTargetParser().matchAndEmitInstruction(
23832383
IDLoc, Info.Opcode, Info.ParsedOperands, Out, ErrorInfo,
23842384
getTargetParser().isParsingMSInlineAsm()))
23852385
return true;
@@ -6029,7 +6029,7 @@ bool AsmParser::parseMSInlineAsm(
60296029

60306030
// Register operand.
60316031
if (Operand.isReg() && !Operand.needAddressOf() &&
6032-
!getTargetParser().OmitRegisterFromClobberLists(Operand.getReg())) {
6032+
!getTargetParser().omitRegisterFromClobberLists(Operand.getReg())) {
60336033
unsigned NumDefs = Desc.getNumDefs();
60346034
// Clobber.
60356035
if (NumDefs && Operand.getMCOperandNum() < NumDefs)

‎llvm/lib/MC/MCParser/MasmParser.cpp

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -2657,7 +2657,7 @@ bool MasmParser::parseStatement(ParseStatementInfo &Info,
26572657
// Canonicalize the opcode to lower case.
26582658
std::string OpcodeStr = IDVal.lower();
26592659
ParseInstructionInfo IInfo(Info.AsmRewrites);
2660-
bool ParseHadError = getTargetParser().ParseInstruction(IInfo, OpcodeStr, ID,
2660+
bool ParseHadError = getTargetParser().parseInstruction(IInfo, OpcodeStr, ID,
26612661
Info.ParsedOperands);
26622662
Info.ParseError = ParseHadError;
26632663

@@ -2714,7 +2714,7 @@ bool MasmParser::parseStatement(ParseStatementInfo &Info,
27142714
// If parsing succeeded, match the instruction.
27152715
if (!ParseHadError) {
27162716
uint64_t ErrorInfo;
2717-
if (getTargetParser().MatchAndEmitInstruction(
2717+
if (getTargetParser().matchAndEmitInstruction(
27182718
IDLoc, Info.Opcode, Info.ParsedOperands, Out, ErrorInfo,
27192719
getTargetParser().isParsingMSInlineAsm()))
27202720
return true;
@@ -7389,7 +7389,7 @@ bool MasmParser::parseMSInlineAsm(
73897389

73907390
// Register operand.
73917391
if (Operand.isReg() && !Operand.needAddressOf() &&
7392-
!getTargetParser().OmitRegisterFromClobberLists(Operand.getReg())) {
7392+
!getTargetParser().omitRegisterFromClobberLists(Operand.getReg())) {
73937393
unsigned NumDefs = Desc.getNumDefs();
73947394
// Clobber.
73957395
if (NumDefs && Operand.getMCOperandNum() < NumDefs)

‎llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp

Lines changed: 7 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -231,12 +231,12 @@ class AArch64AsmParser : public MCTargetAsmParser {
231231
bool validateInstruction(MCInst &Inst, SMLoc &IDLoc,
232232
SmallVectorImpl<SMLoc> &Loc);
233233
unsigned getNumRegsForRegKind(RegKind K);
234-
bool MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
234+
bool matchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
235235
OperandVector &Operands, MCStreamer &Out,
236236
uint64_t &ErrorInfo,
237237
bool MatchingInlineAsm) override;
238-
/// @name Auto-generated Match Functions
239-
/// {
238+
/// @name Auto-generated Match Functions
239+
/// {
240240

241241
#define GET_ASSEMBLER_HEADER
242242
#include "AArch64GenAsmMatcher.inc"
@@ -321,7 +321,7 @@ class AArch64AsmParser : public MCTargetAsmParser {
321321

322322
bool areEqualRegs(const MCParsedAsmOperand &Op1,
323323
const MCParsedAsmOperand &Op2) const override;
324-
bool ParseInstruction(ParseInstructionInfo &Info, StringRef Name,
324+
bool parseInstruction(ParseInstructionInfo &Info, StringRef Name,
325325
SMLoc NameLoc, OperandVector &Operands) override;
326326
bool parseRegister(MCRegister &Reg, SMLoc &StartLoc, SMLoc &EndLoc) override;
327327
ParseStatus tryParseRegister(MCRegister &Reg, SMLoc &StartLoc,
@@ -5086,9 +5086,8 @@ bool AArch64AsmParser::areEqualRegs(const MCParsedAsmOperand &Op1,
50865086
return false;
50875087
}
50885088

5089-
/// ParseInstruction - Parse an AArch64 instruction mnemonic followed by its
5090-
/// operands.
5091-
bool AArch64AsmParser::ParseInstruction(ParseInstructionInfo &Info,
5089+
/// Parse an AArch64 instruction mnemonic followed by its operands.
5090+
bool AArch64AsmParser::parseInstruction(ParseInstructionInfo &Info,
50925091
StringRef Name, SMLoc NameLoc,
50935092
OperandVector &Operands) {
50945093
Name = StringSwitch<StringRef>(Name.lower())
@@ -6205,7 +6204,7 @@ bool AArch64AsmParser::showMatchError(SMLoc Loc, unsigned ErrCode,
62056204

62066205
static const char *getSubtargetFeatureName(uint64_t Val);
62076206

6208-
bool AArch64AsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
6207+
bool AArch64AsmParser::matchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
62096208
OperandVector &Operands,
62106209
MCStreamer &Out,
62116210
uint64_t &ErrorInfo,

‎llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -1256,7 +1256,7 @@ class KernelScopeInfo {
12561256
}
12571257

12581258
void usesAgprAt(int i) {
1259-
// Instruction will error in AMDGPUAsmParser::MatchAndEmitInstruction
1259+
// Instruction will error in AMDGPUAsmParser::matchAndEmitInstruction
12601260
if (!hasMAIInsts(*MSTI))
12611261
return;
12621262

@@ -1597,15 +1597,15 @@ class AMDGPUAsmParser : public MCTargetAsmParser {
15971597
unsigned checkTargetMatchPredicate(MCInst &Inst) override;
15981598
unsigned validateTargetOperandClass(MCParsedAsmOperand &Op,
15991599
unsigned Kind) override;
1600-
bool MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
1600+
bool matchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
16011601
OperandVector &Operands, MCStreamer &Out,
16021602
uint64_t &ErrorInfo,
16031603
bool MatchingInlineAsm) override;
16041604
bool ParseDirective(AsmToken DirectiveID) override;
16051605
ParseStatus parseOperand(OperandVector &Operands, StringRef Mnemonic,
16061606
OperandMode Mode = OperandMode_Default);
16071607
StringRef parseMnemonicSuffix(StringRef Name);
1608-
bool ParseInstruction(ParseInstructionInfo &Info, StringRef Name,
1608+
bool parseInstruction(ParseInstructionInfo &Info, StringRef Name,
16091609
SMLoc NameLoc, OperandVector &Operands) override;
16101610
//bool ProcessInstruction(MCInst &Inst);
16111611

@@ -5288,7 +5288,7 @@ static bool isInvalidVOPDY(const OperandVector &Operands,
52885288
return false;
52895289
}
52905290

5291-
bool AMDGPUAsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
5291+
bool AMDGPUAsmParser::matchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
52925292
OperandVector &Operands,
52935293
MCStreamer &Out,
52945294
uint64_t &ErrorInfo,
@@ -6393,9 +6393,9 @@ static void applyMnemonicAliases(StringRef &Mnemonic,
63936393
const FeatureBitset &Features,
63946394
unsigned VariantID);
63956395

6396-
bool AMDGPUAsmParser::ParseInstruction(ParseInstructionInfo &Info,
6397-
StringRef Name,
6398-
SMLoc NameLoc, OperandVector &Operands) {
6396+
bool AMDGPUAsmParser::parseInstruction(ParseInstructionInfo &Info,
6397+
StringRef Name, SMLoc NameLoc,
6398+
OperandVector &Operands) {
63996399
// Add the instruction mnemonic
64006400
Name = parseMnemonicSuffix(Name);
64016401

‎llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -712,7 +712,7 @@ class ARMAsmParser : public MCTargetAsmParser {
712712
bool parseRegister(MCRegister &Reg, SMLoc &StartLoc, SMLoc &EndLoc) override;
713713
ParseStatus tryParseRegister(MCRegister &Reg, SMLoc &StartLoc,
714714
SMLoc &EndLoc) override;
715-
bool ParseInstruction(ParseInstructionInfo &Info, StringRef Name,
715+
bool parseInstruction(ParseInstructionInfo &Info, StringRef Name,
716716
SMLoc NameLoc, OperandVector &Operands) override;
717717
bool ParseDirective(AsmToken DirectiveID) override;
718718

@@ -723,7 +723,7 @@ class ARMAsmParser : public MCTargetAsmParser {
723723
checkEarlyTargetMatchPredicate(MCInst &Inst,
724724
const OperandVector &Operands) override;
725725

726-
bool MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
726+
bool matchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
727727
OperandVector &Operands, MCStreamer &Out,
728728
uint64_t &ErrorInfo,
729729
bool MatchingInlineAsm) override;
@@ -7051,7 +7051,7 @@ void removeVPTCondCode(OperandVector &Operands, unsigned &MnemonicOpsEndInd) {
70517051
}
70527052

70537053
/// Parse an arm instruction mnemonic followed by its operands.
7054-
bool ARMAsmParser::ParseInstruction(ParseInstructionInfo &Info, StringRef Name,
7054+
bool ARMAsmParser::parseInstruction(ParseInstructionInfo &Info, StringRef Name,
70557055
SMLoc NameLoc, OperandVector &Operands) {
70567056
MCAsmParser &Parser = getParser();
70577057

@@ -11350,7 +11350,7 @@ static std::string ARMMnemonicSpellCheck(StringRef S, const FeatureBitset &FBS,
1135011350
unsigned VariantID = 0);
1135111351

1135211352
static const char *getSubtargetFeatureName(uint64_t Val);
11353-
bool ARMAsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
11353+
bool ARMAsmParser::matchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
1135411354
OperandVector &Operands,
1135511355
MCStreamer &Out, uint64_t &ErrorInfo,
1135611356
bool MatchingInlineAsm) {
@@ -11427,7 +11427,7 @@ bool ARMAsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
1142711427
llvm_unreachable("Implement any new match types added!");
1142811428
}
1142911429

11430-
/// parseDirective parses the arm specific directives
11430+
/// ParseDirective parses the arm specific directives
1143111431
bool ARMAsmParser::ParseDirective(AsmToken DirectiveID) {
1143211432
const MCContext::Environment Format = getContext().getObjectFileType();
1143311433
bool IsMachO = Format == MCContext::IsMachO;
@@ -12120,7 +12120,7 @@ bool ARMAsmParser::parseDirectiveSetFP(SMLoc L) {
1212012120
return false;
1212112121
}
1212212122

12123-
/// parseDirective
12123+
/// parseDirectivePad
1212412124
/// ::= .pad offset
1212512125
bool ARMAsmParser::parseDirectivePad(SMLoc L) {
1212612126
MCAsmParser &Parser = getParser();

‎llvm/lib/Target/AVR/AsmParser/AVRAsmParser.cpp

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -51,7 +51,7 @@ class AVRAsmParser : public MCTargetAsmParser {
5151
#define GET_ASSEMBLER_HEADER
5252
#include "AVRGenAsmMatcher.inc"
5353

54-
bool MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
54+
bool matchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
5555
OperandVector &Operands, MCStreamer &Out,
5656
uint64_t &ErrorInfo,
5757
bool MatchingInlineAsm) override;
@@ -60,7 +60,7 @@ class AVRAsmParser : public MCTargetAsmParser {
6060
ParseStatus tryParseRegister(MCRegister &Reg, SMLoc &StartLoc,
6161
SMLoc &EndLoc) override;
6262

63-
bool ParseInstruction(ParseInstructionInfo &Info, StringRef Name,
63+
bool parseInstruction(ParseInstructionInfo &Info, StringRef Name,
6464
SMLoc NameLoc, OperandVector &Operands) override;
6565

6666
ParseStatus parseDirective(AsmToken DirectiveID) override;
@@ -320,7 +320,7 @@ bool AVRAsmParser::emit(MCInst &Inst, SMLoc const &Loc, MCStreamer &Out) const {
320320
return false;
321321
}
322322

323-
bool AVRAsmParser::MatchAndEmitInstruction(SMLoc Loc, unsigned &Opcode,
323+
bool AVRAsmParser::matchAndEmitInstruction(SMLoc Loc, unsigned &Opcode,
324324
OperandVector &Operands,
325325
MCStreamer &Out, uint64_t &ErrorInfo,
326326
bool MatchingInlineAsm) {
@@ -623,7 +623,7 @@ void AVRAsmParser::eatComma() {
623623
}
624624
}
625625

626-
bool AVRAsmParser::ParseInstruction(ParseInstructionInfo &Info,
626+
bool AVRAsmParser::parseInstruction(ParseInstructionInfo &Info,
627627
StringRef Mnemonic, SMLoc NameLoc,
628628
OperandVector &Operands) {
629629
Operands.push_back(AVROperand::CreateToken(Mnemonic, NameLoc));

‎llvm/lib/Target/BPF/AsmParser/BPFAsmParser.cpp

Lines changed: 5 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -34,7 +34,7 @@ class BPFAsmParser : public MCTargetAsmParser {
3434

3535
bool PreMatchCheck(OperandVector &Operands);
3636

37-
bool MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
37+
bool matchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
3838
OperandVector &Operands, MCStreamer &Out,
3939
uint64_t &ErrorInfo,
4040
bool MatchingInlineAsm) override;
@@ -43,7 +43,7 @@ class BPFAsmParser : public MCTargetAsmParser {
4343
ParseStatus tryParseRegister(MCRegister &Reg, SMLoc &StartLoc,
4444
SMLoc &EndLoc) override;
4545

46-
bool ParseInstruction(ParseInstructionInfo &Info, StringRef Name,
46+
bool parseInstruction(ParseInstructionInfo &Info, StringRef Name,
4747
SMLoc NameLoc, OperandVector &Operands) override;
4848

4949
// "=" is used as assignment operator for assembly statment, so can't be used
@@ -304,7 +304,7 @@ bool BPFAsmParser::PreMatchCheck(OperandVector &Operands) {
304304
return false;
305305
}
306306

307-
bool BPFAsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
307+
bool BPFAsmParser::matchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
308308
OperandVector &Operands,
309309
MCStreamer &Out, uint64_t &ErrorInfo,
310310
bool MatchingInlineAsm) {
@@ -483,9 +483,8 @@ ParseStatus BPFAsmParser::parseImmediate(OperandVector &Operands) {
483483
return ParseStatus::Success;
484484
}
485485

486-
/// ParseInstruction - Parse an BPF instruction which is in BPF verifier
487-
/// format.
488-
bool BPFAsmParser::ParseInstruction(ParseInstructionInfo &Info, StringRef Name,
486+
/// Parse an BPF instruction which is in BPF verifier format.
487+
bool BPFAsmParser::parseInstruction(ParseInstructionInfo &Info, StringRef Name,
489488
SMLoc NameLoc, OperandVector &Operands) {
490489
// The first operand could be either register or actually an operator.
491490
unsigned RegNo = MatchRegisterName(Name);

‎llvm/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -134,7 +134,7 @@ class HexagonAsmParser : public MCTargetAsmParser {
134134
OperandVector &InstOperands, uint64_t &ErrorInfo,
135135
bool MatchingInlineAsm);
136136
void eatToEndOfPacket();
137-
bool MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
137+
bool matchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
138138
OperandVector &Operands, MCStreamer &Out,
139139
uint64_t &ErrorInfo,
140140
bool MatchingInlineAsm) override;
@@ -180,12 +180,12 @@ class HexagonAsmParser : public MCTargetAsmParser {
180180
bool parseExpressionOrOperand(OperandVector &Operands);
181181
bool parseExpression(MCExpr const *&Expr);
182182

183-
bool ParseInstruction(ParseInstructionInfo &Info, StringRef Name,
183+
bool parseInstruction(ParseInstructionInfo &Info, StringRef Name,
184184
SMLoc NameLoc, OperandVector &Operands) override {
185185
llvm_unreachable("Unimplemented");
186186
}
187187

188-
bool ParseInstruction(ParseInstructionInfo &Info, StringRef Name, AsmToken ID,
188+
bool parseInstruction(ParseInstructionInfo &Info, StringRef Name, AsmToken ID,
189189
OperandVector &Operands) override;
190190

191191
bool ParseDirective(AsmToken DirectiveID) override;
@@ -614,7 +614,7 @@ void HexagonAsmParser::eatToEndOfPacket() {
614614
InBrackets = false;
615615
}
616616

617-
bool HexagonAsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
617+
bool HexagonAsmParser::matchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
618618
OperandVector &Operands,
619619
MCStreamer &Out,
620620
uint64_t &ErrorInfo,
@@ -1278,7 +1278,7 @@ bool HexagonAsmParser::parseInstruction(OperandVector &Operands) {
12781278
}
12791279
}
12801280

1281-
bool HexagonAsmParser::ParseInstruction(ParseInstructionInfo &Info,
1281+
bool HexagonAsmParser::parseInstruction(ParseInstructionInfo &Info,
12821282
StringRef Name, AsmToken ID,
12831283
OperandVector &Operands) {
12841284
getLexer().UnLex(ID);

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