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[RISCV][CFI] CFIFixup update tests
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7 files changed

+72
-0
lines changed

7 files changed

+72
-0
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‎llvm/test/CodeGen/RISCV/branch-relaxation.ll

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2789,6 +2789,7 @@ define void @relax_jal_spill_32_restore_block_correspondence() {
27892789
; CHECK-RV32-NEXT: .cfi_offset s9, -44
27902790
; CHECK-RV32-NEXT: .cfi_offset s10, -48
27912791
; CHECK-RV32-NEXT: .cfi_offset s11, -52
2792+
; CHECK-RV32-NEXT: .cfi_remember_state
27922793
; CHECK-RV32-NEXT: #APP
27932794
; CHECK-RV32-NEXT: li ra, 1
27942795
; CHECK-RV32-NEXT: #NO_APP
@@ -3006,6 +3007,7 @@ define void @relax_jal_spill_32_restore_block_correspondence() {
30063007
; CHECK-RV32-NEXT: .cfi_def_cfa_offset 0
30073008
; CHECK-RV32-NEXT: ret
30083009
; CHECK-RV32-NEXT: .LBB6_5: # %cond_3
3010+
; CHECK-RV32-NEXT: .cfi_restore_state
30093011
; CHECK-RV32-NEXT: beq t1, t2, .LBB6_4
30103012
; CHECK-RV32-NEXT: # %bb.6: # %space
30113013
; CHECK-RV32-NEXT: #APP
@@ -3045,6 +3047,7 @@ define void @relax_jal_spill_32_restore_block_correspondence() {
30453047
; CHECK-RV64-NEXT: .cfi_offset s9, -88
30463048
; CHECK-RV64-NEXT: .cfi_offset s10, -96
30473049
; CHECK-RV64-NEXT: .cfi_offset s11, -104
3050+
; CHECK-RV64-NEXT: .cfi_remember_state
30483051
; CHECK-RV64-NEXT: #APP
30493052
; CHECK-RV64-NEXT: li ra, 1
30503053
; CHECK-RV64-NEXT: #NO_APP
@@ -3267,6 +3270,7 @@ define void @relax_jal_spill_32_restore_block_correspondence() {
32673270
; CHECK-RV64-NEXT: .cfi_def_cfa_offset 0
32683271
; CHECK-RV64-NEXT: ret
32693272
; CHECK-RV64-NEXT: .LBB6_5: # %cond_3
3273+
; CHECK-RV64-NEXT: .cfi_restore_state
32703274
; CHECK-RV64-NEXT: sext.w t5, t2
32713275
; CHECK-RV64-NEXT: sext.w t6, t1
32723276
; CHECK-RV64-NEXT: beq t6, t5, .LBB6_4

‎llvm/test/CodeGen/RISCV/exception-pointer-register.ll

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -23,6 +23,7 @@ define void @caller(ptr %p) personality ptr @__gxx_personality_v0 {
2323
; RV32I-NEXT: .cfi_offset ra, -4
2424
; RV32I-NEXT: .cfi_offset s0, -8
2525
; RV32I-NEXT: .cfi_offset s1, -12
26+
; RV32I-NEXT: .cfi_remember_state
2627
; RV32I-NEXT: mv s0, a0
2728
; RV32I-NEXT: beqz a0, .LBB0_2
2829
; RV32I-NEXT: # %bb.1: # %bb2
@@ -47,6 +48,7 @@ define void @caller(ptr %p) personality ptr @__gxx_personality_v0 {
4748
; RV32I-NEXT: .cfi_def_cfa_offset 0
4849
; RV32I-NEXT: ret
4950
; RV32I-NEXT: .LBB0_4: # %lpad
51+
; RV32I-NEXT: .cfi_restore_state
5052
; RV32I-NEXT: .Ltmp4:
5153
; RV32I-NEXT: mv s1, a0
5254
; RV32I-NEXT: mv a0, s0
@@ -64,6 +66,7 @@ define void @caller(ptr %p) personality ptr @__gxx_personality_v0 {
6466
; RV64I-NEXT: .cfi_offset ra, -8
6567
; RV64I-NEXT: .cfi_offset s0, -16
6668
; RV64I-NEXT: .cfi_offset s1, -24
69+
; RV64I-NEXT: .cfi_remember_state
6770
; RV64I-NEXT: mv s0, a0
6871
; RV64I-NEXT: beqz a0, .LBB0_2
6972
; RV64I-NEXT: # %bb.1: # %bb2
@@ -88,6 +91,7 @@ define void @caller(ptr %p) personality ptr @__gxx_personality_v0 {
8891
; RV64I-NEXT: .cfi_def_cfa_offset 0
8992
; RV64I-NEXT: ret
9093
; RV64I-NEXT: .LBB0_4: # %lpad
94+
; RV64I-NEXT: .cfi_restore_state
9195
; RV64I-NEXT: .Ltmp4:
9296
; RV64I-NEXT: mv s1, a0
9397
; RV64I-NEXT: mv a0, s0

‎llvm/test/CodeGen/RISCV/lpad.ll

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -144,6 +144,7 @@ define void @invoke(ptr %f) personality ptr @__gxx_personality_v0 {
144144
; RV32-NEXT: .cfi_def_cfa_offset 16
145145
; RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
146146
; RV32-NEXT: .cfi_offset ra, -4
147+
; RV32-NEXT: .cfi_remember_state
147148
; RV32-NEXT: .Ltmp0:
148149
; RV32-NEXT: jalr a0
149150
; RV32-NEXT: .Ltmp1:
@@ -154,6 +155,7 @@ define void @invoke(ptr %f) personality ptr @__gxx_personality_v0 {
154155
; RV32-NEXT: .cfi_def_cfa_offset 0
155156
; RV32-NEXT: ret
156157
; RV32-NEXT: .LBB2_2: # %lpad
158+
; RV32-NEXT: .cfi_restore_state
157159
; RV32-NEXT: .Ltmp2:
158160
; RV32-NEXT: j .LBB2_1
159161
;
@@ -164,6 +166,7 @@ define void @invoke(ptr %f) personality ptr @__gxx_personality_v0 {
164166
; RV64-NEXT: .cfi_def_cfa_offset 16
165167
; RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
166168
; RV64-NEXT: .cfi_offset ra, -8
169+
; RV64-NEXT: .cfi_remember_state
167170
; RV64-NEXT: .Ltmp0:
168171
; RV64-NEXT: jalr a0
169172
; RV64-NEXT: .Ltmp1:
@@ -174,6 +177,7 @@ define void @invoke(ptr %f) personality ptr @__gxx_personality_v0 {
174177
; RV64-NEXT: .cfi_def_cfa_offset 0
175178
; RV64-NEXT: ret
176179
; RV64-NEXT: .LBB2_2: # %lpad
180+
; RV64-NEXT: .cfi_restore_state
177181
; RV64-NEXT: .Ltmp2:
178182
; RV64-NEXT: j .LBB2_1
179183
;
@@ -184,6 +188,7 @@ define void @invoke(ptr %f) personality ptr @__gxx_personality_v0 {
184188
; FIXED-ONE-RV32-NEXT: .cfi_def_cfa_offset 16
185189
; FIXED-ONE-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
186190
; FIXED-ONE-RV32-NEXT: .cfi_offset ra, -4
191+
; FIXED-ONE-RV32-NEXT: .cfi_remember_state
187192
; FIXED-ONE-RV32-NEXT: .Ltmp0:
188193
; FIXED-ONE-RV32-NEXT: lui t2, 1
189194
; FIXED-ONE-RV32-NEXT: jalr a0
@@ -195,6 +200,7 @@ define void @invoke(ptr %f) personality ptr @__gxx_personality_v0 {
195200
; FIXED-ONE-RV32-NEXT: .cfi_def_cfa_offset 0
196201
; FIXED-ONE-RV32-NEXT: ret
197202
; FIXED-ONE-RV32-NEXT: .LBB2_2: # %lpad
203+
; FIXED-ONE-RV32-NEXT: .cfi_restore_state
198204
; FIXED-ONE-RV32-NEXT: .Ltmp2:
199205
; FIXED-ONE-RV32-NEXT: j .LBB2_1
200206
;
@@ -205,6 +211,7 @@ define void @invoke(ptr %f) personality ptr @__gxx_personality_v0 {
205211
; FIXED-ONE-RV64-NEXT: .cfi_def_cfa_offset 16
206212
; FIXED-ONE-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
207213
; FIXED-ONE-RV64-NEXT: .cfi_offset ra, -8
214+
; FIXED-ONE-RV64-NEXT: .cfi_remember_state
208215
; FIXED-ONE-RV64-NEXT: .Ltmp0:
209216
; FIXED-ONE-RV64-NEXT: lui t2, 1
210217
; FIXED-ONE-RV64-NEXT: jalr a0
@@ -216,6 +223,7 @@ define void @invoke(ptr %f) personality ptr @__gxx_personality_v0 {
216223
; FIXED-ONE-RV64-NEXT: .cfi_def_cfa_offset 0
217224
; FIXED-ONE-RV64-NEXT: ret
218225
; FIXED-ONE-RV64-NEXT: .LBB2_2: # %lpad
226+
; FIXED-ONE-RV64-NEXT: .cfi_restore_state
219227
; FIXED-ONE-RV64-NEXT: .Ltmp2:
220228
; FIXED-ONE-RV64-NEXT: j .LBB2_1
221229
entry:

‎llvm/test/CodeGen/RISCV/miss-sp-restore-eh.ll

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -24,6 +24,7 @@ define signext i32 @foo() #1 personality ptr @__gxx_personality_v0 {
2424
; CHECK-NEXT: .cfi_offset s1, -24
2525
; CHECK-NEXT: addi s0, sp, 32
2626
; CHECK-NEXT: .cfi_def_cfa s0, 0
27+
; CHECK-NEXT: .cfi_remember_state
2728
; CHECK-NEXT: .Ltmp0:
2829
; CHECK-NEXT: addi sp, sp, -32
2930
; CHECK-NEXT: li a0, 0
@@ -60,6 +61,7 @@ define signext i32 @foo() #1 personality ptr @__gxx_personality_v0 {
6061
; CHECK-NEXT: .cfi_def_cfa_offset 0
6162
; CHECK-NEXT: ret
6263
; CHECK-NEXT: .LBB0_4: # %ehcleanup
64+
; CHECK-NEXT: .cfi_restore_state
6365
; CHECK-NEXT: call _Unwind_Resume
6466
entry:
6567
invoke void @_Z3fooiiiiiiiiiiPi(i32 signext poison, i32 signext poison, i32 signext poison, i32 signext poison, i32 signext poison, i32 signext poison, i32 signext poison, i32 signext poison, i32 poison, i32 poison, i32 poison)

‎llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-scatter.ll

Lines changed: 26 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -3156,6 +3156,7 @@ define void @mscatter_v8i64(<8 x i64> %val, <8 x ptr> %ptrs, <8 x i1> %m) {
31563156
; RV32ZVE32F-NEXT: .cfi_offset s0, -4
31573157
; RV32ZVE32F-NEXT: .cfi_offset s1, -8
31583158
; RV32ZVE32F-NEXT: .cfi_offset s2, -12
3159+
; RV32ZVE32F-NEXT: .cfi_remember_state
31593160
; RV32ZVE32F-NEXT: lw a1, 56(a0)
31603161
; RV32ZVE32F-NEXT: lw a2, 60(a0)
31613162
; RV32ZVE32F-NEXT: lw a5, 40(a0)
@@ -3212,6 +3213,7 @@ define void @mscatter_v8i64(<8 x i64> %val, <8 x ptr> %ptrs, <8 x i1> %m) {
32123213
; RV32ZVE32F-NEXT: .cfi_def_cfa_offset 0
32133214
; RV32ZVE32F-NEXT: ret
32143215
; RV32ZVE32F-NEXT: .LBB41_10: # %cond.store
3216+
; RV32ZVE32F-NEXT: .cfi_restore_state
32153217
; RV32ZVE32F-NEXT: lw s1, 4(a0)
32163218
; RV32ZVE32F-NEXT: lw a0, 0(a0)
32173219
; RV32ZVE32F-NEXT: vsetvli zero, zero, e32, m4, ta, ma
@@ -3280,6 +3282,7 @@ define void @mscatter_v8i64(<8 x i64> %val, <8 x ptr> %ptrs, <8 x i1> %m) {
32803282
; RV64ZVE32F-NEXT: .cfi_offset s0, -8
32813283
; RV64ZVE32F-NEXT: .cfi_offset s1, -16
32823284
; RV64ZVE32F-NEXT: .cfi_offset s2, -24
3285+
; RV64ZVE32F-NEXT: .cfi_remember_state
32833286
; RV64ZVE32F-NEXT: ld a4, 40(a1)
32843287
; RV64ZVE32F-NEXT: ld a3, 48(a1)
32853288
; RV64ZVE32F-NEXT: ld a2, 56(a1)
@@ -3332,6 +3335,7 @@ define void @mscatter_v8i64(<8 x i64> %val, <8 x ptr> %ptrs, <8 x i1> %m) {
33323335
; RV64ZVE32F-NEXT: .cfi_def_cfa_offset 0
33333336
; RV64ZVE32F-NEXT: ret
33343337
; RV64ZVE32F-NEXT: .LBB41_10: # %cond.store
3338+
; RV64ZVE32F-NEXT: .cfi_restore_state
33353339
; RV64ZVE32F-NEXT: ld a1, 0(a1)
33363340
; RV64ZVE32F-NEXT: ld a0, 0(a0)
33373341
; RV64ZVE32F-NEXT: sd a0, 0(a1)
@@ -3394,6 +3398,7 @@ define void @mscatter_baseidx_v8i8_v8i64(<8 x i64> %val, ptr %base, <8 x i8> %id
33943398
; RV32ZVE32F-NEXT: .cfi_offset s0, -4
33953399
; RV32ZVE32F-NEXT: .cfi_offset s1, -8
33963400
; RV32ZVE32F-NEXT: .cfi_offset s2, -12
3401+
; RV32ZVE32F-NEXT: .cfi_remember_state
33973402
; RV32ZVE32F-NEXT: lw a2, 56(a0)
33983403
; RV32ZVE32F-NEXT: lw a3, 60(a0)
33993404
; RV32ZVE32F-NEXT: lw a6, 40(a0)
@@ -3455,6 +3460,7 @@ define void @mscatter_baseidx_v8i8_v8i64(<8 x i64> %val, ptr %base, <8 x i8> %id
34553460
; RV32ZVE32F-NEXT: .cfi_def_cfa_offset 0
34563461
; RV32ZVE32F-NEXT: ret
34573462
; RV32ZVE32F-NEXT: .LBB42_10: # %cond.store
3463+
; RV32ZVE32F-NEXT: .cfi_restore_state
34583464
; RV32ZVE32F-NEXT: lw a1, 4(a0)
34593465
; RV32ZVE32F-NEXT: lw a0, 0(a0)
34603466
; RV32ZVE32F-NEXT: vmv.x.s s2, v8
@@ -3642,6 +3648,7 @@ define void @mscatter_baseidx_sext_v8i8_v8i64(<8 x i64> %val, ptr %base, <8 x i8
36423648
; RV32ZVE32F-NEXT: .cfi_offset s0, -4
36433649
; RV32ZVE32F-NEXT: .cfi_offset s1, -8
36443650
; RV32ZVE32F-NEXT: .cfi_offset s2, -12
3651+
; RV32ZVE32F-NEXT: .cfi_remember_state
36453652
; RV32ZVE32F-NEXT: lw a2, 56(a0)
36463653
; RV32ZVE32F-NEXT: lw a3, 60(a0)
36473654
; RV32ZVE32F-NEXT: lw a6, 40(a0)
@@ -3703,6 +3710,7 @@ define void @mscatter_baseidx_sext_v8i8_v8i64(<8 x i64> %val, ptr %base, <8 x i8
37033710
; RV32ZVE32F-NEXT: .cfi_def_cfa_offset 0
37043711
; RV32ZVE32F-NEXT: ret
37053712
; RV32ZVE32F-NEXT: .LBB43_10: # %cond.store
3713+
; RV32ZVE32F-NEXT: .cfi_restore_state
37063714
; RV32ZVE32F-NEXT: lw a1, 4(a0)
37073715
; RV32ZVE32F-NEXT: lw a0, 0(a0)
37083716
; RV32ZVE32F-NEXT: vmv.x.s s2, v8
@@ -3892,6 +3900,7 @@ define void @mscatter_baseidx_zext_v8i8_v8i64(<8 x i64> %val, ptr %base, <8 x i8
38923900
; RV32ZVE32F-NEXT: .cfi_offset s0, -4
38933901
; RV32ZVE32F-NEXT: .cfi_offset s1, -8
38943902
; RV32ZVE32F-NEXT: .cfi_offset s2, -12
3903+
; RV32ZVE32F-NEXT: .cfi_remember_state
38953904
; RV32ZVE32F-NEXT: lw a2, 56(a0)
38963905
; RV32ZVE32F-NEXT: lw a3, 60(a0)
38973906
; RV32ZVE32F-NEXT: lw a6, 40(a0)
@@ -3953,6 +3962,7 @@ define void @mscatter_baseidx_zext_v8i8_v8i64(<8 x i64> %val, ptr %base, <8 x i8
39533962
; RV32ZVE32F-NEXT: .cfi_def_cfa_offset 0
39543963
; RV32ZVE32F-NEXT: ret
39553964
; RV32ZVE32F-NEXT: .LBB44_10: # %cond.store
3965+
; RV32ZVE32F-NEXT: .cfi_restore_state
39563966
; RV32ZVE32F-NEXT: lw a1, 4(a0)
39573967
; RV32ZVE32F-NEXT: lw a0, 0(a0)
39583968
; RV32ZVE32F-NEXT: vmv.x.s s2, v8
@@ -4149,6 +4159,7 @@ define void @mscatter_baseidx_v8i16_v8i64(<8 x i64> %val, ptr %base, <8 x i16> %
41494159
; RV32ZVE32F-NEXT: .cfi_offset s0, -4
41504160
; RV32ZVE32F-NEXT: .cfi_offset s1, -8
41514161
; RV32ZVE32F-NEXT: .cfi_offset s2, -12
4162+
; RV32ZVE32F-NEXT: .cfi_remember_state
41524163
; RV32ZVE32F-NEXT: lw a2, 56(a0)
41534164
; RV32ZVE32F-NEXT: lw a3, 60(a0)
41544165
; RV32ZVE32F-NEXT: lw a6, 40(a0)
@@ -4210,6 +4221,7 @@ define void @mscatter_baseidx_v8i16_v8i64(<8 x i64> %val, ptr %base, <8 x i16> %
42104221
; RV32ZVE32F-NEXT: .cfi_def_cfa_offset 0
42114222
; RV32ZVE32F-NEXT: ret
42124223
; RV32ZVE32F-NEXT: .LBB45_10: # %cond.store
4224+
; RV32ZVE32F-NEXT: .cfi_restore_state
42134225
; RV32ZVE32F-NEXT: lw a1, 4(a0)
42144226
; RV32ZVE32F-NEXT: lw a0, 0(a0)
42154227
; RV32ZVE32F-NEXT: vmv.x.s s2, v8
@@ -4398,6 +4410,7 @@ define void @mscatter_baseidx_sext_v8i16_v8i64(<8 x i64> %val, ptr %base, <8 x i
43984410
; RV32ZVE32F-NEXT: .cfi_offset s0, -4
43994411
; RV32ZVE32F-NEXT: .cfi_offset s1, -8
44004412
; RV32ZVE32F-NEXT: .cfi_offset s2, -12
4413+
; RV32ZVE32F-NEXT: .cfi_remember_state
44014414
; RV32ZVE32F-NEXT: lw a2, 56(a0)
44024415
; RV32ZVE32F-NEXT: lw a3, 60(a0)
44034416
; RV32ZVE32F-NEXT: lw a6, 40(a0)
@@ -4459,6 +4472,7 @@ define void @mscatter_baseidx_sext_v8i16_v8i64(<8 x i64> %val, ptr %base, <8 x i
44594472
; RV32ZVE32F-NEXT: .cfi_def_cfa_offset 0
44604473
; RV32ZVE32F-NEXT: ret
44614474
; RV32ZVE32F-NEXT: .LBB46_10: # %cond.store
4475+
; RV32ZVE32F-NEXT: .cfi_restore_state
44624476
; RV32ZVE32F-NEXT: lw a1, 4(a0)
44634477
; RV32ZVE32F-NEXT: lw a0, 0(a0)
44644478
; RV32ZVE32F-NEXT: vmv.x.s s2, v8
@@ -4649,6 +4663,7 @@ define void @mscatter_baseidx_zext_v8i16_v8i64(<8 x i64> %val, ptr %base, <8 x i
46494663
; RV32ZVE32F-NEXT: .cfi_offset s0, -4
46504664
; RV32ZVE32F-NEXT: .cfi_offset s1, -8
46514665
; RV32ZVE32F-NEXT: .cfi_offset s2, -12
4666+
; RV32ZVE32F-NEXT: .cfi_remember_state
46524667
; RV32ZVE32F-NEXT: lw a2, 56(a0)
46534668
; RV32ZVE32F-NEXT: lw a3, 60(a0)
46544669
; RV32ZVE32F-NEXT: lw a6, 40(a0)
@@ -4710,6 +4725,7 @@ define void @mscatter_baseidx_zext_v8i16_v8i64(<8 x i64> %val, ptr %base, <8 x i
47104725
; RV32ZVE32F-NEXT: .cfi_def_cfa_offset 0
47114726
; RV32ZVE32F-NEXT: ret
47124727
; RV32ZVE32F-NEXT: .LBB47_10: # %cond.store
4728+
; RV32ZVE32F-NEXT: .cfi_restore_state
47134729
; RV32ZVE32F-NEXT: lw a1, 4(a0)
47144730
; RV32ZVE32F-NEXT: lw a0, 0(a0)
47154731
; RV32ZVE32F-NEXT: vmv.x.s s2, v8
@@ -4908,6 +4924,7 @@ define void @mscatter_baseidx_v8i32_v8i64(<8 x i64> %val, ptr %base, <8 x i32> %
49084924
; RV32ZVE32F-NEXT: .cfi_offset s0, -4
49094925
; RV32ZVE32F-NEXT: .cfi_offset s1, -8
49104926
; RV32ZVE32F-NEXT: .cfi_offset s2, -12
4927+
; RV32ZVE32F-NEXT: .cfi_remember_state
49114928
; RV32ZVE32F-NEXT: lw a2, 56(a0)
49124929
; RV32ZVE32F-NEXT: lw a3, 60(a0)
49134930
; RV32ZVE32F-NEXT: lw a6, 40(a0)
@@ -4968,6 +4985,7 @@ define void @mscatter_baseidx_v8i32_v8i64(<8 x i64> %val, ptr %base, <8 x i32> %
49684985
; RV32ZVE32F-NEXT: .cfi_def_cfa_offset 0
49694986
; RV32ZVE32F-NEXT: ret
49704987
; RV32ZVE32F-NEXT: .LBB48_10: # %cond.store
4988+
; RV32ZVE32F-NEXT: .cfi_restore_state
49714989
; RV32ZVE32F-NEXT: lw a1, 4(a0)
49724990
; RV32ZVE32F-NEXT: lw a0, 0(a0)
49734991
; RV32ZVE32F-NEXT: vmv.x.s s2, v8
@@ -5155,6 +5173,7 @@ define void @mscatter_baseidx_sext_v8i32_v8i64(<8 x i64> %val, ptr %base, <8 x i
51555173
; RV32ZVE32F-NEXT: .cfi_offset s0, -4
51565174
; RV32ZVE32F-NEXT: .cfi_offset s1, -8
51575175
; RV32ZVE32F-NEXT: .cfi_offset s2, -12
5176+
; RV32ZVE32F-NEXT: .cfi_remember_state
51585177
; RV32ZVE32F-NEXT: lw a2, 56(a0)
51595178
; RV32ZVE32F-NEXT: lw a3, 60(a0)
51605179
; RV32ZVE32F-NEXT: lw a6, 40(a0)
@@ -5215,6 +5234,7 @@ define void @mscatter_baseidx_sext_v8i32_v8i64(<8 x i64> %val, ptr %base, <8 x i
52155234
; RV32ZVE32F-NEXT: .cfi_def_cfa_offset 0
52165235
; RV32ZVE32F-NEXT: ret
52175236
; RV32ZVE32F-NEXT: .LBB49_10: # %cond.store
5237+
; RV32ZVE32F-NEXT: .cfi_restore_state
52185238
; RV32ZVE32F-NEXT: lw a1, 4(a0)
52195239
; RV32ZVE32F-NEXT: lw a0, 0(a0)
52205240
; RV32ZVE32F-NEXT: vmv.x.s s2, v8
@@ -5403,6 +5423,7 @@ define void @mscatter_baseidx_zext_v8i32_v8i64(<8 x i64> %val, ptr %base, <8 x i
54035423
; RV32ZVE32F-NEXT: .cfi_offset s0, -4
54045424
; RV32ZVE32F-NEXT: .cfi_offset s1, -8
54055425
; RV32ZVE32F-NEXT: .cfi_offset s2, -12
5426+
; RV32ZVE32F-NEXT: .cfi_remember_state
54065427
; RV32ZVE32F-NEXT: lw a2, 56(a0)
54075428
; RV32ZVE32F-NEXT: lw a3, 60(a0)
54085429
; RV32ZVE32F-NEXT: lw a6, 40(a0)
@@ -5463,6 +5484,7 @@ define void @mscatter_baseidx_zext_v8i32_v8i64(<8 x i64> %val, ptr %base, <8 x i
54635484
; RV32ZVE32F-NEXT: .cfi_def_cfa_offset 0
54645485
; RV32ZVE32F-NEXT: ret
54655486
; RV32ZVE32F-NEXT: .LBB50_10: # %cond.store
5487+
; RV32ZVE32F-NEXT: .cfi_restore_state
54665488
; RV32ZVE32F-NEXT: lw a1, 4(a0)
54675489
; RV32ZVE32F-NEXT: lw a0, 0(a0)
54685490
; RV32ZVE32F-NEXT: vmv.x.s s2, v8
@@ -5671,6 +5693,7 @@ define void @mscatter_baseidx_v8i64(<8 x i64> %val, ptr %base, <8 x i64> %idxs,
56715693
; RV32ZVE32F-NEXT: .cfi_offset s6, -28
56725694
; RV32ZVE32F-NEXT: .cfi_offset s7, -32
56735695
; RV32ZVE32F-NEXT: .cfi_offset s8, -36
5696+
; RV32ZVE32F-NEXT: .cfi_remember_state
56745697
; RV32ZVE32F-NEXT: lw a3, 56(a0)
56755698
; RV32ZVE32F-NEXT: lw a4, 60(a0)
56765699
; RV32ZVE32F-NEXT: lw a7, 40(a0)
@@ -5759,6 +5782,7 @@ define void @mscatter_baseidx_v8i64(<8 x i64> %val, ptr %base, <8 x i64> %idxs,
57595782
; RV32ZVE32F-NEXT: .cfi_def_cfa_offset 0
57605783
; RV32ZVE32F-NEXT: ret
57615784
; RV32ZVE32F-NEXT: .LBB51_10: # %cond.store
5785+
; RV32ZVE32F-NEXT: .cfi_restore_state
57625786
; RV32ZVE32F-NEXT: lw a1, 4(a0)
57635787
; RV32ZVE32F-NEXT: lw a0, 0(a0)
57645788
; RV32ZVE32F-NEXT: vmv.x.s s2, v8
@@ -5828,6 +5852,7 @@ define void @mscatter_baseidx_v8i64(<8 x i64> %val, ptr %base, <8 x i64> %idxs,
58285852
; RV64ZVE32F-NEXT: .cfi_offset s1, -16
58295853
; RV64ZVE32F-NEXT: .cfi_offset s2, -24
58305854
; RV64ZVE32F-NEXT: .cfi_offset s3, -32
5855+
; RV64ZVE32F-NEXT: .cfi_remember_state
58315856
; RV64ZVE32F-NEXT: ld a5, 40(a0)
58325857
; RV64ZVE32F-NEXT: ld a4, 48(a0)
58335858
; RV64ZVE32F-NEXT: ld a3, 56(a0)
@@ -5884,6 +5909,7 @@ define void @mscatter_baseidx_v8i64(<8 x i64> %val, ptr %base, <8 x i64> %idxs,
58845909
; RV64ZVE32F-NEXT: .cfi_def_cfa_offset 0
58855910
; RV64ZVE32F-NEXT: ret
58865911
; RV64ZVE32F-NEXT: .LBB51_10: # %cond.store
5912+
; RV64ZVE32F-NEXT: .cfi_restore_state
58875913
; RV64ZVE32F-NEXT: ld a2, 0(a2)
58885914
; RV64ZVE32F-NEXT: ld a0, 0(a0)
58895915
; RV64ZVE32F-NEXT: slli a2, a2, 3

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