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1 parent 25c93fb commit 4f5d9daCopy full SHA for 4f5d9da
llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -27060,9 +27060,6 @@ AArch64TargetLowering::shouldExpandAtomicLoadInIR(LoadInst *LI) const {
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// However, with the LSE instructions (or outline-atomics mode, which provides
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// library routines in place of the LSE-instructions), we can directly emit many
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// operations instead.
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-//
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-// Floating-point operations are always emitted to a cmpxchg loop, because they
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-// may trigger a trap which aborts an LLSC sequence.
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TargetLowering::AtomicExpansionKind
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AArch64TargetLowering::shouldExpandAtomicRMWInIR(AtomicRMWInst *AI) const {
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unsigned Size = AI->getType()->getPrimitiveSizeInBits();
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