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[ARM] arm_acle.h add Coprocessor Instrinsics (#75440)
#75424 Add Coprocessor Instrinsics
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clang/lib/Basic/Targets/ARM.cpp

Lines changed: 64 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -17,6 +17,7 @@
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#include "llvm/ADT/StringExtras.h"
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#include "llvm/ADT/StringRef.h"
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#include "llvm/ADT/StringSwitch.h"
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#include "llvm/TargetParser/ARMTargetParser.h"
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using namespace clang;
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using namespace clang::targets;
@@ -837,6 +838,69 @@ void ARMTargetInfo::getTargetDefines(const LangOptions &Opts,
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if (Opts.RWPI)
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Builder.defineMacro("__ARM_RWPI", "1");
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// Macros for enabling co-proc intrinsics
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uint64_t FeatureCoprocBF = 0;
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switch (ArchKind) {
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default:
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break;
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case llvm::ARM::ArchKind::ARMV4:
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case llvm::ARM::ArchKind::ARMV4T:
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// Filter __arm_ldcl and __arm_stcl in acle.h
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FeatureCoprocBF = isThumb() ? 0 : FEATURE_COPROC_B1;
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break;
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case llvm::ARM::ArchKind::ARMV5T:
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FeatureCoprocBF = isThumb() ? 0 : FEATURE_COPROC_B1 | FEATURE_COPROC_B2;
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break;
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case llvm::ARM::ArchKind::ARMV5TE:
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case llvm::ARM::ArchKind::ARMV5TEJ:
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if (!isThumb())
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FeatureCoprocBF =
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FEATURE_COPROC_B1 | FEATURE_COPROC_B2 | FEATURE_COPROC_B3;
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break;
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case llvm::ARM::ArchKind::ARMV6:
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case llvm::ARM::ArchKind::ARMV6K:
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case llvm::ARM::ArchKind::ARMV6KZ:
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case llvm::ARM::ArchKind::ARMV6T2:
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if (!isThumb() || ArchKind == llvm::ARM::ArchKind::ARMV6T2)
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FeatureCoprocBF = FEATURE_COPROC_B1 | FEATURE_COPROC_B2 |
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FEATURE_COPROC_B3 | FEATURE_COPROC_B4;
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break;
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case llvm::ARM::ArchKind::ARMV7A:
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case llvm::ARM::ArchKind::ARMV7R:
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case llvm::ARM::ArchKind::ARMV7M:
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case llvm::ARM::ArchKind::ARMV7S:
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case llvm::ARM::ArchKind::ARMV7EM:
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FeatureCoprocBF = FEATURE_COPROC_B1 | FEATURE_COPROC_B2 |
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FEATURE_COPROC_B3 | FEATURE_COPROC_B4;
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break;
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case llvm::ARM::ArchKind::ARMV8A:
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case llvm::ARM::ArchKind::ARMV8R:
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case llvm::ARM::ArchKind::ARMV8_1A:
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case llvm::ARM::ArchKind::ARMV8_2A:
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case llvm::ARM::ArchKind::ARMV8_3A:
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case llvm::ARM::ArchKind::ARMV8_4A:
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case llvm::ARM::ArchKind::ARMV8_5A:
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case llvm::ARM::ArchKind::ARMV8_6A:
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case llvm::ARM::ArchKind::ARMV8_7A:
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case llvm::ARM::ArchKind::ARMV8_8A:
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case llvm::ARM::ArchKind::ARMV8_9A:
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case llvm::ARM::ArchKind::ARMV9A:
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case llvm::ARM::ArchKind::ARMV9_1A:
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case llvm::ARM::ArchKind::ARMV9_2A:
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case llvm::ARM::ArchKind::ARMV9_3A:
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case llvm::ARM::ArchKind::ARMV9_4A:
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// Filter __arm_cdp, __arm_ldcl, __arm_stcl in arm_acle.h
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FeatureCoprocBF = FEATURE_COPROC_B1 | FEATURE_COPROC_B3;
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break;
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case llvm::ARM::ArchKind::ARMV8MMainline:
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case llvm::ARM::ArchKind::ARMV8_1MMainline:
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FeatureCoprocBF = FEATURE_COPROC_B1 | FEATURE_COPROC_B2 |
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FEATURE_COPROC_B3 | FEATURE_COPROC_B4;
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break;
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}
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Builder.defineMacro("__ARM_FEATURE_COPROC",
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"0x" + Twine::utohexstr(FeatureCoprocBF));
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if (ArchKind == llvm::ARM::ArchKind::XSCALE)
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Builder.defineMacro("__XSCALE__");
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clang/lib/Basic/Targets/ARM.h

Lines changed: 13 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -100,6 +100,19 @@ class LLVM_LIBRARY_VISIBILITY ARMTargetInfo : public TargetInfo {
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};
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uint32_t HW_FP;
102102

103+
enum {
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/// __arm_cdp __arm_ldc, __arm_ldcl, __arm_stc,
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/// __arm_stcl, __arm_mcr and __arm_mrc
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FEATURE_COPROC_B1 = (1 << 0),
107+
/// __arm_cdp2, __arm_ldc2, __arm_stc2, __arm_ldc2l,
108+
/// __arm_stc2l, __arm_mcr2 and __arm_mrc2
109+
FEATURE_COPROC_B2 = (1 << 1),
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/// __arm_mcrr, __arm_mrrc
111+
FEATURE_COPROC_B3 = (1 << 2),
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/// __arm_mcrr2, __arm_mrrc2
113+
FEATURE_COPROC_B4 = (1 << 3),
114+
};
115+
103116
void setABIAAPCS();
104117
void setABIAPCS(bool IsAAPCS16);
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clang/lib/Headers/arm_acle.h

Lines changed: 59 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -756,6 +756,65 @@ __arm_st64bv0(void *__addr, data512_t __value) {
756756
__builtin_arm_mops_memset_tag(__tagged_address, __value, __size)
757757
#endif
758758

759+
/* Coprocessor Intrinsics */
760+
#if defined(__ARM_FEATURE_COPROC)
761+
762+
#if (__ARM_FEATURE_COPROC & 0x1)
763+
764+
#if (__ARM_ARCH < 8)
765+
#define __arm_cdp(coproc, opc1, CRd, CRn, CRm, opc2) \
766+
__builtin_arm_cdp(coproc, opc1, CRd, CRn, CRm, opc2)
767+
#endif /* __ARM_ARCH < 8 */
768+
769+
#define __arm_ldc(coproc, CRd, p) __builtin_arm_ldc(coproc, CRd, p)
770+
#define __arm_stc(coproc, CRd, p) __builtin_arm_stc(coproc, CRd, p)
771+
772+
#define __arm_mcr(coproc, opc1, value, CRn, CRm, opc2) \
773+
__builtin_arm_mcr(coproc, opc1, value, CRn, CRm, opc2)
774+
#define __arm_mrc(coproc, opc1, CRn, CRm, opc2) \
775+
__builtin_arm_mrc(coproc, opc1, CRn, CRm, opc2)
776+
777+
#if (__ARM_ARCH != 4) && (__ARM_ARCH < 8)
778+
#define __arm_ldcl(coproc, CRd, p) __builtin_arm_ldcl(coproc, CRd, p)
779+
#define __arm_stcl(coproc, CRd, p) __builtin_arm_stcl(coproc, CRd, p)
780+
#endif /* (__ARM_ARCH != 4) && (__ARM_ARCH != 8) */
781+
782+
#if (__ARM_ARCH_8M_MAIN__) || (__ARM_ARCH_8_1M_MAIN__)
783+
#define __arm_cdp(coproc, opc1, CRd, CRn, CRm, opc2) \
784+
__builtin_arm_cdp(coproc, opc1, CRd, CRn, CRm, opc2)
785+
#define __arm_ldcl(coproc, CRd, p) __builtin_arm_ldcl(coproc, CRd, p)
786+
#define __arm_stcl(coproc, CRd, p) __builtin_arm_stcl(coproc, CRd, p)
787+
#endif /* ___ARM_ARCH_8M_MAIN__ */
788+
789+
#endif /* __ARM_FEATURE_COPROC & 0x1 */
790+
791+
#if (__ARM_FEATURE_COPROC & 0x2)
792+
#define __arm_cdp2(coproc, opc1, CRd, CRn, CRm, opc2) \
793+
__builtin_arm_cdp2(coproc, opc1, CRd, CRn, CRm, opc2)
794+
#define __arm_ldc2(coproc, CRd, p) __builtin_arm_ldc2(coproc, CRd, p)
795+
#define __arm_stc2(coproc, CRd, p) __builtin_arm_stc2(coproc, CRd, p)
796+
#define __arm_ldc2l(coproc, CRd, p) __builtin_arm_ldc2l(coproc, CRd, p)
797+
#define __arm_stc2l(coproc, CRd, p) __builtin_arm_stc2l(coproc, CRd, p)
798+
#define __arm_mcr2(coproc, opc1, value, CRn, CRm, opc2) \
799+
__builtin_arm_mcr2(coproc, opc1, value, CRn, CRm, opc2)
800+
#define __arm_mrc2(coproc, opc1, CRn, CRm, opc2) \
801+
__builtin_arm_mrc2(coproc, opc1, CRn, CRm, opc2)
802+
#endif
803+
804+
#if (__ARM_FEATURE_COPROC & 0x4)
805+
#define __arm_mcrr(coproc, opc1, value, CRm) \
806+
__builtin_arm_mcrr(coproc, opc1, value, CRm)
807+
#define __arm_mrrc(coproc, opc1, CRm) __builtin_arm_mrrc(coproc, opc1, CRm)
808+
#endif
809+
810+
#if (__ARM_FEATURE_COPROC & 0x8)
811+
#define __arm_mcrr2(coproc, opc1, value, CRm) \
812+
__builtin_arm_mcrr2(coproc, opc1, value, CRm)
813+
#define __arm_mrrc2(coproc, opc1, CRm) __builtin_arm_mrrc2(coproc, opc1, CRm)
814+
#endif
815+
816+
#endif // __ARM_FEATURE_COPROC
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/* Transactional Memory Extension (TME) Intrinsics */
760819
#if defined(__ARM_FEATURE_TME) && __ARM_FEATURE_TME
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