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[AMDGPU] Introduce Code Object V6 (#76954)
Introduce Code Object V6 in Clang, LLD, Flang and LLVM. This is the same as V5 except a new "generic version" flag can be present in EFLAGS. This is related to new generic targets that'll be added in a follow-up patch. It's also likely V6 will have new changes (possibly new metadata entries) added later. Docs change are part of the follow-up patch #76955
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‎clang/include/clang/Basic/DiagnosticDriverKinds.td

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -93,6 +93,10 @@ def err_drv_hipspv_no_hip_path : Error<
9393
"'--hip-path' must be specified when offloading to "
9494
"SPIR-V%select{| unless %1 is given}0.">;
9595

96+
// TODO: Remove when COV6 is fully supported by ROCm.
97+
def warn_drv_amdgpu_cov6: Warning<
98+
"code object v6 is still in development and not ready for production use yet;"
99+
" use at your own risk">;
96100
def err_drv_undetermined_gpu_arch : Error<
97101
"cannot determine %0 architecture: %1; consider passing it via "
98102
"'%2'">;

‎clang/include/clang/Driver/Options.td

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -4801,9 +4801,9 @@ defm amdgpu_ieee : BoolOption<"m", "amdgpu-ieee",
48014801
def mcode_object_version_EQ : Joined<["-"], "mcode-object-version=">, Group<m_Group>,
48024802
HelpText<"Specify code object ABI version. Defaults to 5. (AMDGPU only)">,
48034803
Visibility<[ClangOption, FlangOption, CC1Option, FC1Option]>,
4804-
Values<"none,4,5">,
4804+
Values<"none,4,5,6">,
48054805
NormalizedValuesScope<"llvm::CodeObjectVersionKind">,
4806-
NormalizedValues<["COV_None", "COV_4", "COV_5"]>,
4806+
NormalizedValues<["COV_None", "COV_4", "COV_5", "COV_6"]>,
48074807
MarshallingInfoEnum<TargetOpts<"CodeObjectVersion">, "COV_5">;
48084808

48094809
defm cumode : SimpleMFlag<"cumode",

‎clang/lib/CodeGen/CGBuiltin.cpp

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -17756,9 +17756,9 @@ Value *EmitAMDGPUImplicitArgPtr(CodeGenFunction &CGF) {
1775617756
// \p Index is 0, 1, and 2 for x, y, and z dimension, respectively.
1775717757
/// Emit code based on Code Object ABI version.
1775817758
/// COV_4 : Emit code to use dispatch ptr
17759-
/// COV_5 : Emit code to use implicitarg ptr
17759+
/// COV_5+ : Emit code to use implicitarg ptr
1776017760
/// COV_NONE : Emit code to load a global variable "__oclc_ABI_version"
17761-
/// and use its value for COV_4 or COV_5 approach. It is used for
17761+
/// and use its value for COV_4 or COV_5+ approach. It is used for
1776217762
/// compiling device libraries in an ABI-agnostic way.
1776317763
///
1776417764
/// Note: "__oclc_ABI_version" is supposed to be emitted and intialized by
@@ -17801,7 +17801,7 @@ Value *EmitAMDGPUWorkGroupSize(CodeGenFunction &CGF, unsigned Index) {
1780117801
Address(Result, CGF.Int16Ty, CharUnits::fromQuantity(2)));
1780217802
} else {
1780317803
Value *GEP = nullptr;
17804-
if (Cov == CodeObjectVersionKind::COV_5) {
17804+
if (Cov >= CodeObjectVersionKind::COV_5) {
1780517805
// Indexing the implicit kernarg segment.
1780617806
GEP = CGF.Builder.CreateConstGEP1_32(
1780717807
CGF.Int8Ty, EmitAMDGPUImplicitArgPtr(CGF), 12 + Index * 2);

‎clang/lib/Driver/ToolChains/CommonArgs.cpp

Lines changed: 7 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2650,7 +2650,7 @@ getAMDGPUCodeObjectArgument(const Driver &D, const llvm::opt::ArgList &Args) {
26502650
void tools::checkAMDGPUCodeObjectVersion(const Driver &D,
26512651
const llvm::opt::ArgList &Args) {
26522652
const unsigned MinCodeObjVer = 4;
2653-
const unsigned MaxCodeObjVer = 5;
2653+
const unsigned MaxCodeObjVer = 6;
26542654

26552655
if (auto *CodeObjArg = getAMDGPUCodeObjectArgument(D, Args)) {
26562656
if (CodeObjArg->getOption().getID() ==
@@ -2661,6 +2661,12 @@ void tools::checkAMDGPUCodeObjectVersion(const Driver &D,
26612661
if (Remnant || CodeObjVer < MinCodeObjVer || CodeObjVer > MaxCodeObjVer)
26622662
D.Diag(diag::err_drv_invalid_int_value)
26632663
<< CodeObjArg->getAsString(Args) << CodeObjArg->getValue();
2664+
2665+
// COV6 is only supported by LLVM at the time of writing this, and it's
2666+
// expected to take some time before all ROCm components fully
2667+
// support it. In the meantime, make sure users are aware of this.
2668+
if (CodeObjVer == 6)
2669+
D.Diag(diag::warn_drv_amdgpu_cov6);
26642670
}
26652671
}
26662672
}

‎clang/test/CodeGenCUDA/amdgpu-code-object-version-linking.cu

Lines changed: 37 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -4,6 +4,9 @@
44
// RUN: %clang_cc1 -fcuda-is-device -triple amdgcn-amd-amdhsa -emit-llvm-bc \
55
// RUN: -mcode-object-version=5 -DUSER -x hip -o %t_5.bc %s
66

7+
// RUN: %clang_cc1 -fcuda-is-device -triple amdgcn-amd-amdhsa -emit-llvm-bc \
8+
// RUN: -mcode-object-version=6 -DUSER -x hip -o %t_6.bc %s
9+
710
// RUN: %clang_cc1 -fcuda-is-device -triple amdgcn-amd-amdhsa -emit-llvm-bc \
811
// RUN: -mcode-object-version=none -DDEVICELIB -x hip -o %t_0.bc %s
912

@@ -15,6 +18,10 @@
1518
// RUN: %t_5.bc -mlink-builtin-bitcode %t_0.bc -o - |\
1619
// RUN: FileCheck -check-prefix=LINKED5 %s
1720

21+
// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -fcuda-is-device -emit-llvm -O3 \
22+
// RUN: %t_6.bc -mlink-builtin-bitcode %t_0.bc -o - |\
23+
// RUN: FileCheck -check-prefix=LINKED6 %s
24+
1825
#include "Inputs/cuda.h"
1926

2027
// LINKED4: @__oclc_ABI_version = weak_odr hidden local_unnamed_addr addrspace(4) constant i32 400
@@ -77,6 +84,36 @@
7784
// LINKED5: load i16, ptr addrspace(4) %{{.*}}, align 2, !range [[$WS_RANGE:![0-9]*]], !invariant.load{{.*}}, !noundef
7885
// LINKED5: "amdgpu_code_object_version", i32 500
7986

87+
// LINKED6: __oclc_ABI_version = weak_odr hidden local_unnamed_addr addrspace(4) constant i32 600
88+
// LINKED6-LABEL: bar
89+
// LINKED6-NOT: load i32, ptr addrspacecast (ptr addrspace(4) @__oclc_ABI_version to ptr), align {{.*}}
90+
// LINKED6-NOT: icmp sge i32 %{{.*}}, 500
91+
// LINKED6: call align 8 dereferenceable(256) ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()
92+
// LINKED6: [[GEP_5_X:%.*]] = getelementptr i8, ptr addrspace(4) %{{.*}}, i32 12
93+
// LINKED6: call align 4 dereferenceable(64) ptr addrspace(4) @llvm.amdgcn.dispatch.ptr()
94+
// LINKED6: [[GEP_4_X:%.*]] = getelementptr i8, ptr addrspace(4) %{{.*}}, i32 4
95+
// LINKED6: select i1 true, ptr addrspace(4) [[GEP_5_X]], ptr addrspace(4) [[GEP_4_X]]
96+
// LINKED6: load i16, ptr addrspace(4) %{{.*}}, align 2, !range [[$WS_RANGE:![0-9]*]], !invariant.load{{.*}}, !noundef
97+
98+
// LINKED6-NOT: load i32, ptr addrspacecast (ptr addrspace(4) @__oclc_ABI_version to ptr), align {{.*}}
99+
// LINKED6-NOT: icmp sge i32 %{{.*}}, 500
100+
// LINKED6: call align 8 dereferenceable(256) ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()
101+
// LINKED6: [[GEP_5_Y:%.*]] = getelementptr i8, ptr addrspace(4) %{{.*}}, i32 14
102+
// LINKED6: call align 4 dereferenceable(64) ptr addrspace(4) @llvm.amdgcn.dispatch.ptr()
103+
// LINKED6: [[GEP_4_Y:%.*]] = getelementptr i8, ptr addrspace(4) %{{.*}}, i32 6
104+
// LINKED6: select i1 true, ptr addrspace(4) [[GEP_5_Y]], ptr addrspace(4) [[GEP_4_Y]]
105+
// LINKED6: load i16, ptr addrspace(4) %{{.*}}, align 2, !range [[$WS_RANGE:![0-9]*]], !invariant.load{{.*}}, !noundef
106+
107+
// LINKED6-NOT: load i32, ptr addrspacecast (ptr addrspace(4) @__oclc_ABI_version to ptr), align {{.*}}
108+
// LINKED6-NOT: icmp sge i32 %{{.*}}, 500
109+
// LINKED6: call align 8 dereferenceable(256) ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()
110+
// LINKED6: [[GEP_5_Z:%.*]] = getelementptr i8, ptr addrspace(4) %{{.*}}, i32 16
111+
// LINKED6: call align 4 dereferenceable(64) ptr addrspace(4) @llvm.amdgcn.dispatch.ptr()
112+
// LINKED6: [[GEP_4_Z:%.*]] = getelementptr i8, ptr addrspace(4) %{{.*}}, i32 8
113+
// LINKED6: select i1 true, ptr addrspace(4) [[GEP_5_Z]], ptr addrspace(4) [[GEP_4_Z]]
114+
// LINKED6: load i16, ptr addrspace(4) %{{.*}}, align 2, !range [[$WS_RANGE:![0-9]*]], !invariant.load{{.*}}, !noundef
115+
// LINKED6: "amdgpu_code_object_version", i32 600
116+
80117
#ifdef DEVICELIB
81118
__device__ void bar(int *x, int *y, int *z)
82119
{

‎clang/test/CodeGenCUDA/amdgpu-code-object-version.cu

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -9,6 +9,9 @@
99
// RUN: %clang_cc1 -fcuda-is-device -triple amdgcn-amd-amdhsa -emit-llvm \
1010
// RUN: -mcode-object-version=5 -o - %s | FileCheck -check-prefix=V5 %s
1111

12+
// RUN: %clang_cc1 -fcuda-is-device -triple amdgcn-amd-amdhsa -emit-llvm \
13+
// RUN: -mcode-object-version=6 -o - %s | FileCheck -check-prefix=V6 %s
14+
1215
// RUN: %clang_cc1 -fcuda-is-device -triple amdgcn-amd-amdhsa -emit-llvm \
1316
// RUN: -mcode-object-version=none -o - %s | FileCheck %s -check-prefix=NONE
1417

@@ -17,5 +20,6 @@
1720

1821
// V4: !{{.*}} = !{i32 1, !"amdgpu_code_object_version", i32 400}
1922
// V5: !{{.*}} = !{i32 1, !"amdgpu_code_object_version", i32 500}
23+
// V6: !{{.*}} = !{i32 1, !"amdgpu_code_object_version", i32 600}
2024
// NONE-NOT: !{{.*}} = !{i32 1, !"amdgpu_code_object_version",
2125
// INV: error: invalid value '4.1' in '-mcode-object-version=4.1'

‎clang/test/CodeGenCUDA/amdgpu-workgroup-size.cu

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -7,6 +7,10 @@
77
// RUN: -fcuda-is-device -emit-llvm -o - -x hip %s \
88
// RUN: | FileCheck -check-prefix=COV5 %s
99

10+
// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa \
11+
// RUN: -fcuda-is-device -mcode-object-version=6 -emit-llvm -o - -x hip %s \
12+
// RUN: | FileCheck -check-prefix=COV5 %s
13+
1014
// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa \
1115
// RUN: -fcuda-is-device -mcode-object-version=none -emit-llvm -o - -x hip %s \
1216
// RUN: | FileCheck -check-prefix=COVNONE %s

‎clang/test/Driver/Inputs/rocm/amdgcn/bitcode/oclc_abi_version_600.bc

Whitespace-only changes.

‎clang/test/Driver/hip-code-object-version.hip

Lines changed: 13 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -23,6 +23,19 @@
2323
// V5: "-mllvm" "--amdhsa-code-object-version=5"
2424
// V5: "-targets=host-x86_64-unknown-linux,hipv4-amdgcn-amd-amdhsa--gfx906"
2525

26+
// Check bundle ID for code object version 6.
27+
28+
// RUN: not %clang -### --target=x86_64-linux-gnu \
29+
// RUN: -mcode-object-version=6 \
30+
// RUN: --offload-arch=gfx906 --rocm-path=%S/Inputs/rocm \
31+
// RUN: %s 2>&1 | FileCheck -check-prefix=V6 %s
32+
33+
// V6: warning: code object v6 is still in development and not ready for production use yet; use at your own risk
34+
// V6: "-mcode-object-version=6"
35+
// V6: "-mllvm" "--amdhsa-code-object-version=6"
36+
// V6: "-targets=host-x86_64-unknown-linux,hipv4-amdgcn-amd-amdhsa--gfx906"
37+
38+
2639
// Check bundle ID for code object version default
2740

2841
// RUN: %clang -### --target=x86_64-linux-gnu \

‎clang/test/Driver/hip-device-libs.hip

Lines changed: 17 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -187,13 +187,26 @@
187187
// RUN: --rocm-path=%S/Inputs/rocm %S/Inputs/hip_multiple_inputs/b.hip \
188188
// RUN: 2>&1 | FileCheck %s --check-prefixes=ABI5
189189

190-
// Test -mcode-object-version=5 with old device library without abi_version_400.bc
190+
// Test -mcode-object-version=5 with old device library without abi_version_500.bc
191191
// RUN: not %clang -### --target=x86_64-linux-gnu --offload-arch=gfx900 \
192192
// RUN: -mcode-object-version=5 \
193193
// RUN: --hip-device-lib-path=%S/Inputs/rocm/amdgcn/bitcode-no-abi-ver \
194194
// RUN: --rocm-path=%S/Inputs/rocm %S/Inputs/hip_multiple_inputs/b.hip \
195195
// RUN: 2>&1 | FileCheck %s --check-prefixes=NOABI5
196196

197+
// Test -mcode-object-version=6
198+
// RUN: %clang -### --target=x86_64-linux-gnu --offload-arch=gfx900 \
199+
// RUN: -mcode-object-version=6 \
200+
// RUN: --rocm-path=%S/Inputs/rocm %S/Inputs/hip_multiple_inputs/b.hip \
201+
// RUN: 2>&1 | FileCheck %s --check-prefixes=ABI6
202+
203+
// Test -mcode-object-version=6 with old device library without abi_version_600.bc
204+
// RUN: not %clang -### --target=x86_64-linux-gnu --offload-arch=gfx900 \
205+
// RUN: -mcode-object-version=6 \
206+
// RUN: --hip-device-lib-path=%S/Inputs/rocm/amdgcn/bitcode-no-abi-ver \
207+
// RUN: --rocm-path=%S/Inputs/rocm %S/Inputs/hip_multiple_inputs/b.hip \
208+
// RUN: 2>&1 | FileCheck %s --check-prefixes=NOABI6
209+
197210
// ALL-NOT: error:
198211
// ALL: {{"[^"]*clang[^"]*"}}
199212

@@ -237,7 +250,10 @@
237250
// ABI4: "-mlink-builtin-bitcode" "{{.*}}oclc_abi_version_400.bc"
238251
// ABI5-NOT: error:
239252
// ABI5: "-mlink-builtin-bitcode" "{{.*}}oclc_abi_version_500.bc"
253+
// ABI6-NOT: error:
254+
// ABI6: "-mlink-builtin-bitcode" "{{.*}}oclc_abi_version_600.bc"
240255
// NOABI4-NOT: error:
241256
// NOABI4-NOT: "-mlink-builtin-bitcode" "{{.*}}oclc_abi_version_400.bc"
242257
// NOABI4-NOT: "-mlink-builtin-bitcode" "{{.*}}oclc_abi_version_500.bc"
243258
// NOABI5: error: cannot find ROCm device libraryfor ABI version 5; provide its path via '--rocm-path' or '--rocm-device-lib-path', or pass '-nogpulib' to build without ROCm device library
259+
// NOABI6: error: cannot find ROCm device libraryfor ABI version 6; provide its path via '--rocm-path' or '--rocm-device-lib-path', or pass '-nogpulib' to build without ROCm device library

‎clang/test/Misc/warning-flags.c

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -18,7 +18,7 @@ This test serves two purposes:
1818

1919
The list of warnings below should NEVER grow. It should gradually shrink to 0.
2020

21-
CHECK: Warnings without flags (65):
21+
CHECK: Warnings without flags (66):
2222

2323
CHECK-NEXT: ext_expected_semi_decl_list
2424
CHECK-NEXT: ext_explicit_specialization_storage_class
@@ -43,6 +43,7 @@ CHECK-NEXT: warn_collection_expr_type
4343
CHECK-NEXT: warn_conflicting_variadic
4444
CHECK-NEXT: warn_delete_array_type
4545
CHECK-NEXT: warn_double_const_requires_fp64
46+
CHECK-NEXT: warn_drv_amdgpu_cov6
4647
CHECK-NEXT: warn_drv_assuming_mfloat_abi_is
4748
CHECK-NEXT: warn_drv_clang_unsupported
4849
CHECK-NEXT: warn_drv_pch_not_first_include

‎flang/lib/Frontend/CompilerInvocation.cpp

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -284,6 +284,8 @@ static void parseCodeGenArgs(Fortran::frontend::CodeGenOptions &opts,
284284
if (const llvm::opt::Arg *a = args.getLastArg(
285285
clang::driver::options::OPT_mcode_object_version_EQ)) {
286286
llvm::StringRef s = a->getValue();
287+
if (s == "6")
288+
opts.CodeObjectVersion = llvm::CodeObjectVersionKind::COV_6;
287289
if (s == "5")
288290
opts.CodeObjectVersion = llvm::CodeObjectVersionKind::COV_5;
289291
if (s == "4")

‎flang/test/Lower/AMD/code-object-version.f90

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -3,11 +3,12 @@
33
!RUN: %flang_fc1 -emit-hlfir -triple amdgcn-amd-amdhsa -target-cpu gfx908 -mcode-object-version=none %s -o - | FileCheck --check-prefix=COV_NONE %s
44
!RUN: %flang_fc1 -emit-hlfir -triple amdgcn-amd-amdhsa -target-cpu gfx908 -mcode-object-version=4 %s -o - | FileCheck --check-prefix=COV_4 %s
55
!RUN: %flang_fc1 -emit-hlfir -triple amdgcn-amd-amdhsa -target-cpu gfx908 -mcode-object-version=5 %s -o - | FileCheck --check-prefix=COV_5 %s
6+
!RUN: %flang_fc1 -emit-hlfir -triple amdgcn-amd-amdhsa -target-cpu gfx908 -mcode-object-version=6 %s -o - | FileCheck --check-prefix=COV_6 %s
67

78
!COV_DEFAULT: llvm.mlir.global weak_odr hidden local_unnamed_addr constant @__oclc_ABI_version(400 : i32) {addr_space = 4 : i32} : i32
89
!COV_NONE-NOT: llvm.mlir.global weak_odr hidden local_unnamed_addr constant @__oclc_ABI_version(400 : i32) {addr_space = 4 : i32} : i32
910
!COV_4: llvm.mlir.global weak_odr hidden local_unnamed_addr constant @__oclc_ABI_version(400 : i32) {addr_space = 4 : i32} : i32
1011
!COV_5: llvm.mlir.global weak_odr hidden local_unnamed_addr constant @__oclc_ABI_version(500 : i32) {addr_space = 4 : i32} : i32
12+
!COV_6: llvm.mlir.global weak_odr hidden local_unnamed_addr constant @__oclc_ABI_version(600 : i32) {addr_space = 4 : i32} : i32
1113
subroutine target_simple
1214
end subroutine target_simple
13-

‎lld/ELF/Arch/AMDGPU.cpp

Lines changed: 21 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -25,6 +25,7 @@ class AMDGPU final : public TargetInfo {
2525
private:
2626
uint32_t calcEFlagsV3() const;
2727
uint32_t calcEFlagsV4() const;
28+
uint32_t calcEFlagsV6() const;
2829

2930
public:
3031
AMDGPU();
@@ -106,6 +107,24 @@ uint32_t AMDGPU::calcEFlagsV4() const {
106107
return retMach | retXnack | retSramEcc;
107108
}
108109

110+
uint32_t AMDGPU::calcEFlagsV6() const {
111+
uint32_t flags = calcEFlagsV4();
112+
113+
uint32_t genericVersion =
114+
getEFlags(ctx.objectFiles[0]) & EF_AMDGPU_GENERIC_VERSION;
115+
116+
// Verify that all input files have compatible generic version.
117+
for (InputFile *f : ArrayRef(ctx.objectFiles).slice(1)) {
118+
if (genericVersion != (getEFlags(f) & EF_AMDGPU_GENERIC_VERSION)) {
119+
error("incompatible generic version: " + toString(f));
120+
return 0;
121+
}
122+
}
123+
124+
flags |= genericVersion;
125+
return flags;
126+
}
127+
109128
uint32_t AMDGPU::calcEFlags() const {
110129
if (ctx.objectFiles.empty())
111130
return 0;
@@ -121,6 +140,8 @@ uint32_t AMDGPU::calcEFlags() const {
121140
case ELFABIVERSION_AMDGPU_HSA_V4:
122141
case ELFABIVERSION_AMDGPU_HSA_V5:
123142
return calcEFlagsV4();
143+
case ELFABIVERSION_AMDGPU_HSA_V6:
144+
return calcEFlagsV6();
124145
default:
125146
error("unknown abi version: " + Twine(abiVersion));
126147
return 0;

‎lld/test/ELF/amdgpu-tid.s

Lines changed: 16 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -43,3 +43,19 @@
4343
# SRAMECC-OFF: EF_AMDGPU_FEATURE_SRAMECC_OFF_V4 (0x800)
4444
# SRAMECC-ON: EF_AMDGPU_FEATURE_SRAMECC_ON_V4 (0xC00)
4545
# SRAMECC-INCOMPATIBLE: incompatible sramecc:
46+
47+
# RUN: llvm-mc -triple amdgcn-amd-amdhsa -mcpu=gfx900 --amdhsa-code-object-version=6 --amdgpu-force-generic-version=1 -filetype=obj %s -o %t-genericv1_0.o
48+
# RUN: llvm-mc -triple amdgcn-amd-amdhsa -mcpu=gfx900 --amdhsa-code-object-version=6 --amdgpu-force-generic-version=1 -filetype=obj %s -o %t-genericv1_1.o
49+
# RUN: ld.lld -shared %t-genericv1_0.o %t-genericv1_1.o -o %t-genericv1_2.so
50+
# RUN: llvm-readobj --file-headers %t-genericv1_2.so | FileCheck --check-prefix=GENERICV1 %s
51+
52+
# RUN: llvm-mc -triple amdgcn-amd-amdhsa -mcpu=gfx900 --amdhsa-code-object-version=6 --amdgpu-force-generic-version=2 -filetype=obj %s -o %t-genericv2_0.o
53+
# RUN: llvm-mc -triple amdgcn-amd-amdhsa -mcpu=gfx900 --amdhsa-code-object-version=6 --amdgpu-force-generic-version=2 -filetype=obj %s -o %t-genericv2_1.o
54+
# RUN: ld.lld -shared %t-genericv2_0.o %t-genericv2_1.o -o %t-genericv2_2.so
55+
# RUN: llvm-readobj --file-headers %t-genericv2_2.so | FileCheck --check-prefix=GENERICV2 %s
56+
57+
# RUN: not ld.lld -shared %t-genericv1_0.o %t-genericv2_0.o -o /dev/null 2>&1 | FileCheck --check-prefix=GENERIC-INCOMPATIBLE %s
58+
59+
# GENERICV1: EF_AMDGPU_GENERIC_VERSION_V1 (0x1000000)
60+
# GENERICV2: EF_AMDGPU_GENERIC_VERSION_V2 (0x2000000)
61+
# GENERIC-INCOMPATIBLE: incompatible generic version

‎llvm/include/llvm/BinaryFormat/ELF.h

Lines changed: 8 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -375,7 +375,8 @@ enum {
375375
ELFABIVERSION_AMDGPU_HSA_V2 = 0,
376376
ELFABIVERSION_AMDGPU_HSA_V3 = 1,
377377
ELFABIVERSION_AMDGPU_HSA_V4 = 2,
378-
ELFABIVERSION_AMDGPU_HSA_V5 = 3
378+
ELFABIVERSION_AMDGPU_HSA_V5 = 3,
379+
ELFABIVERSION_AMDGPU_HSA_V6 = 4,
379380
};
380381

381382
#define ELF_RELOC(name, value) name = value,
@@ -842,6 +843,12 @@ enum : unsigned {
842843
EF_AMDGPU_FEATURE_SRAMECC_OFF_V4 = 0x800,
843844
// SRAMECC is on.
844845
EF_AMDGPU_FEATURE_SRAMECC_ON_V4 = 0xc00,
846+
847+
// Generic target versioning. This is contained in the list byte of EFLAGS.
848+
EF_AMDGPU_GENERIC_VERSION = 0xff000000,
849+
EF_AMDGPU_GENERIC_VERSION_OFFSET = 24,
850+
EF_AMDGPU_GENERIC_VERSION_MIN = 1,
851+
EF_AMDGPU_GENERIC_VERSION_MAX = 0xff,
845852
};
846853

847854
// ELF Relocation types for AMDGPU

‎llvm/include/llvm/Support/AMDGPUMetadata.h

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -44,8 +44,15 @@ constexpr uint32_t VersionMajorV5 = 1;
4444
/// HSA metadata minor version for code object V5.
4545
constexpr uint32_t VersionMinorV5 = 2;
4646

47+
/// HSA metadata major version for code object V6.
48+
constexpr uint32_t VersionMajorV6 = 1;
49+
/// HSA metadata minor version for code object V6.
50+
constexpr uint32_t VersionMinorV6 = 3;
51+
4752
/// Old HSA metadata beginning assembler directive for V2. This is only used for
4853
/// diagnostics now.
54+
55+
/// HSA metadata beginning assembler directive.
4956
constexpr char AssemblerDirectiveBegin[] = ".amd_amdgpu_hsa_metadata";
5057

5158
/// Access qualifiers.

‎llvm/include/llvm/Support/ScopedPrinter.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -160,8 +160,8 @@ class ScopedPrinter {
160160
template <typename T, typename TFlag>
161161
void printFlags(StringRef Label, T Value, ArrayRef<EnumEntry<TFlag>> Flags,
162162
TFlag EnumMask1 = {}, TFlag EnumMask2 = {},
163-
TFlag EnumMask3 = {}) {
164-
SmallVector<FlagEntry, 10> SetFlags;
163+
TFlag EnumMask3 = {}, ArrayRef<FlagEntry> ExtraFlags = {}) {
164+
SmallVector<FlagEntry, 10> SetFlags(ExtraFlags.begin(), ExtraFlags.end());
165165

166166
for (const auto &Flag : Flags) {
167167
if (Flag.Value == 0)

‎llvm/include/llvm/Target/TargetOptions.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -129,6 +129,7 @@ namespace llvm {
129129
COV_3 = 300, // Unsupported.
130130
COV_4 = 400,
131131
COV_5 = 500,
132+
COV_6 = 600,
132133
};
133134

134135
class TargetOptions {

‎llvm/lib/ObjectYAML/ELFYAML.cpp

Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -620,6 +620,15 @@ void ScalarBitSetTraits<ELFYAML::ELF_EF>::bitset(IO &IO,
620620
BCase(EF_AMDGPU_FEATURE_XNACK_V3);
621621
BCase(EF_AMDGPU_FEATURE_SRAMECC_V3);
622622
break;
623+
case ELF::ELFABIVERSION_AMDGPU_HSA_V6:
624+
for (unsigned K = ELF::EF_AMDGPU_GENERIC_VERSION_MIN;
625+
K <= ELF::EF_AMDGPU_GENERIC_VERSION_MAX; ++K) {
626+
std::string Key = "EF_AMDGPU_GENERIC_VERSION_V" + std::to_string(K);
627+
IO.maskedBitSetCase(Value, Key.c_str(),
628+
K << ELF::EF_AMDGPU_GENERIC_VERSION_OFFSET,
629+
ELF::EF_AMDGPU_GENERIC_VERSION);
630+
}
631+
[[fallthrough]];
623632
case ELF::ELFABIVERSION_AMDGPU_HSA_V4:
624633
case ELF::ELFABIVERSION_AMDGPU_HSA_V5:
625634
BCaseMask(EF_AMDGPU_FEATURE_XNACK_UNSUPPORTED_V4,

‎llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -335,6 +335,9 @@ bool AMDGPUAsmPrinter::doInitialization(Module &M) {
335335
case AMDGPU::AMDHSA_COV5:
336336
HSAMetadataStream.reset(new HSAMD::MetadataStreamerMsgPackV5());
337337
break;
338+
case AMDGPU::AMDHSA_COV6:
339+
HSAMetadataStream.reset(new HSAMD::MetadataStreamerMsgPackV6());
340+
break;
338341
default:
339342
report_fatal_error("Unexpected code object version");
340343
}

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