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[AMDGPU][True16][MC] test update for v_ldexp_f16 in true16 (#119313)
This is a NFC change. Update mc test for v_ldexp_f16 in true16 format. MC source change was done by previous patch and automatically enabled by t16 pesudo
1 parent 0884908 commit 5270e63

17 files changed

+544
-314
lines changed

‎llvm/lib/Target/AMDGPU/VOP2Instructions.td

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1824,8 +1824,7 @@ defm V_SUBREV_F16_t16 : VOP2_Real_FULL_t16_gfx11_gfx12<0x034, "v_subrev_f16
18241824
defm V_SUBREV_F16_fake16 : VOP2_Real_FULL_t16_gfx11_gfx12<0x034, "v_subrev_f16">;
18251825
defm V_MUL_F16 : VOP2_Real_FULL_t16_and_fake16_gfx11_gfx12<0x035, "v_mul_f16">;
18261826
defm V_FMAC_F16 : VOP2_Real_FULL_t16_and_fake16_gfx11_gfx12<0x036, "v_fmac_f16">;
1827-
defm V_LDEXP_F16_t16 : VOP2_Real_FULL_t16_gfx11_gfx12<0x03b, "v_ldexp_f16">;
1828-
defm V_LDEXP_F16_fake16 : VOP2_Real_FULL_t16_gfx11_gfx12<0x03b, "v_ldexp_f16">;
1827+
defm V_LDEXP_F16 : VOP2_Real_FULL_t16_and_fake16_gfx11_gfx12<0x03b, "v_ldexp_f16">;
18291828
defm V_MAX_F16 : VOP2_Real_FULL_t16_and_fake16_gfx11<0x039, "v_max_f16">;
18301829
defm V_MIN_F16 : VOP2_Real_FULL_t16_and_fake16_gfx11<0x03a, "v_min_f16">;
18311830
defm V_FMAMK_F16 : VOP2Only_Real_MADK_t16_and_fake16_gfx11_gfx12<0x037, "v_fmamk_f16">;

‎llvm/test/MC/AMDGPU/gfx11_asm_vop2.s

Lines changed: 45 additions & 30 deletions
Original file line numberDiff line numberDiff line change
@@ -1042,50 +1042,65 @@ v_fmamk_f32 v5, src_scc, 0xaf123456, v3
10421042
v_fmamk_f32 v255, 0xaf123456, 0xaf123456, v255
10431043
// GFX11: v_fmamk_f32 v255, 0xaf123456, 0xaf123456, v255 ; encoding: [0xff,0xfe,0xff,0x59,0x56,0x34,0x12,0xaf]
10441044

1045-
v_ldexp_f16 v5, v1, v2
1046-
// GFX11: v_ldexp_f16_e32 v5, v1, v2 ; encoding: [0x01,0x05,0x0a,0x76]
1045+
v_ldexp_f16 v5.l, v1.l, v2.l
1046+
// GFX11: v_ldexp_f16_e32 v5.l, v1.l, v2.l ; encoding: [0x01,0x05,0x0a,0x76]
10471047

1048-
v_ldexp_f16 v5, v127, v2
1049-
// GFX11: v_ldexp_f16_e32 v5, v127, v2 ; encoding: [0x7f,0x05,0x0a,0x76]
1048+
v_ldexp_f16 v5.l, v127.l, v2.l
1049+
// GFX11: v_ldexp_f16_e32 v5.l, v127.l, v2.l ; encoding: [0x7f,0x05,0x0a,0x76]
10501050

1051-
v_ldexp_f16 v5, s1, v2
1052-
// GFX11: v_ldexp_f16_e32 v5, s1, v2 ; encoding: [0x01,0x04,0x0a,0x76]
1051+
v_ldexp_f16 v5.l, s1, v2.l
1052+
// GFX11: v_ldexp_f16_e32 v5.l, s1, v2.l ; encoding: [0x01,0x04,0x0a,0x76]
10531053

1054-
v_ldexp_f16 v5, s105, v2
1055-
// GFX11: v_ldexp_f16_e32 v5, s105, v2 ; encoding: [0x69,0x04,0x0a,0x76]
1054+
v_ldexp_f16 v5.l, s105, v2.l
1055+
// GFX11: v_ldexp_f16_e32 v5.l, s105, v2.l ; encoding: [0x69,0x04,0x0a,0x76]
10561056

1057-
v_ldexp_f16 v5, vcc_lo, v2
1058-
// GFX11: v_ldexp_f16_e32 v5, vcc_lo, v2 ; encoding: [0x6a,0x04,0x0a,0x76]
1057+
v_ldexp_f16 v5.l, vcc_lo, v2.l
1058+
// GFX11: v_ldexp_f16_e32 v5.l, vcc_lo, v2.l ; encoding: [0x6a,0x04,0x0a,0x76]
10591059

1060-
v_ldexp_f16 v5, vcc_hi, v2
1061-
// GFX11: v_ldexp_f16_e32 v5, vcc_hi, v2 ; encoding: [0x6b,0x04,0x0a,0x76]
1060+
v_ldexp_f16 v5.l, vcc_hi, v2.l
1061+
// GFX11: v_ldexp_f16_e32 v5.l, vcc_hi, v2.l ; encoding: [0x6b,0x04,0x0a,0x76]
10621062

1063-
v_ldexp_f16 v5, ttmp15, v2
1064-
// GFX11: v_ldexp_f16_e32 v5, ttmp15, v2 ; encoding: [0x7b,0x04,0x0a,0x76]
1063+
v_ldexp_f16 v5.l, ttmp15, v2.l
1064+
// GFX11: v_ldexp_f16_e32 v5.l, ttmp15, v2.l ; encoding: [0x7b,0x04,0x0a,0x76]
10651065

1066-
v_ldexp_f16 v5, m0, v2
1067-
// GFX11: v_ldexp_f16_e32 v5, m0, v2 ; encoding: [0x7d,0x04,0x0a,0x76]
1066+
v_ldexp_f16 v5.l, m0, v2.l
1067+
// GFX11: v_ldexp_f16_e32 v5.l, m0, v2.l ; encoding: [0x7d,0x04,0x0a,0x76]
10681068

1069-
v_ldexp_f16 v5, exec_lo, v2
1070-
// GFX11: v_ldexp_f16_e32 v5, exec_lo, v2 ; encoding: [0x7e,0x04,0x0a,0x76]
1069+
v_ldexp_f16 v5.l, exec_lo, v2.l
1070+
// GFX11: v_ldexp_f16_e32 v5.l, exec_lo, v2.l ; encoding: [0x7e,0x04,0x0a,0x76]
10711071

1072-
v_ldexp_f16 v5, exec_hi, v2
1073-
// GFX11: v_ldexp_f16_e32 v5, exec_hi, v2 ; encoding: [0x7f,0x04,0x0a,0x76]
1072+
v_ldexp_f16 v5.l, exec_hi, v2.l
1073+
// GFX11: v_ldexp_f16_e32 v5.l, exec_hi, v2.l ; encoding: [0x7f,0x04,0x0a,0x76]
10741074

1075-
v_ldexp_f16 v5, null, v2
1076-
// GFX11: v_ldexp_f16_e32 v5, null, v2 ; encoding: [0x7c,0x04,0x0a,0x76]
1075+
v_ldexp_f16 v5.l, null, v2.l
1076+
// GFX11: v_ldexp_f16_e32 v5.l, null, v2.l ; encoding: [0x7c,0x04,0x0a,0x76]
10771077

1078-
v_ldexp_f16 v5, -1, v2
1079-
// GFX11: v_ldexp_f16_e32 v5, -1, v2 ; encoding: [0xc1,0x04,0x0a,0x76]
1078+
v_ldexp_f16 v5.l, -1, v2.l
1079+
// GFX11: v_ldexp_f16_e32 v5.l, -1, v2.l ; encoding: [0xc1,0x04,0x0a,0x76]
10801080

1081-
v_ldexp_f16 v5, 0.5, v2
1082-
// GFX11: v_ldexp_f16_e32 v5, 0.5, v2 ; encoding: [0xf0,0x04,0x0a,0x76]
1081+
v_ldexp_f16 v5.l, 0.5, v2.l
1082+
// GFX11: v_ldexp_f16_e32 v5.l, 0.5, v2.l ; encoding: [0xf0,0x04,0x0a,0x76]
10831083

1084-
v_ldexp_f16 v5, src_scc, v2
1085-
// GFX11: v_ldexp_f16_e32 v5, src_scc, v2 ; encoding: [0xfd,0x04,0x0a,0x76]
1084+
v_ldexp_f16 v5.l, src_scc, v2.l
1085+
// GFX11: v_ldexp_f16_e32 v5.l, src_scc, v2.l ; encoding: [0xfd,0x04,0x0a,0x76]
10861086

1087-
v_ldexp_f16 v127, 0xfe0b, v127
1088-
// GFX11: v_ldexp_f16_e32 v127, 0xfe0b, v127 ; encoding: [0xff,0xfe,0xfe,0x76,0x0b,0xfe,0x00,0x00]
1087+
v_ldexp_f16 v127.l, 0xfe0b, v127.l
1088+
// GFX11: v_ldexp_f16_e32 v127.l, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0xfe,0x76,0x0b,0xfe,0x00,0x00]
1089+
1090+
v_ldexp_f16 v5.l, v1.h, v2.l
1091+
// GFX11: v_ldexp_f16_e32 v5.l, v1.h, v2.l ; encoding: [0x81,0x05,0x0a,0x76]
1092+
1093+
v_ldexp_f16 v5.l, v127.h, v2.l
1094+
// GFX11: v_ldexp_f16_e32 v5.l, v127.h, v2.l ; encoding: [0xff,0x05,0x0a,0x76]
1095+
1096+
v_ldexp_f16 v127.l, 0.5, v127.l
1097+
// GFX11: v_ldexp_f16_e32 v127.l, 0.5, v127.l ; encoding: [0xf0,0xfe,0xfe,0x76]
1098+
1099+
v_ldexp_f16 v5.h, src_scc, v2.l
1100+
// GFX11: v_ldexp_f16_e32 v5.h, src_scc, v2.l ; encoding: [0xfd,0x04,0x0a,0x77]
1101+
1102+
v_ldexp_f16 v127.h, 0xfe0b, v127.l
1103+
// GFX11: v_ldexp_f16_e32 v127.h, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0xfe,0x77,0x0b,0xfe,0x00,0x00]
10891104

10901105
v_lshlrev_b32 v5, v1, v2
10911106
// GFX11: v_lshlrev_b32_e32 v5, v1, v2 ; encoding: [0x01,0x05,0x0a,0x30]

‎llvm/test/MC/AMDGPU/gfx11_asm_vop2_dpp16.s

Lines changed: 37 additions & 28 deletions
Original file line numberDiff line numberDiff line change
@@ -723,47 +723,56 @@ v_fmac_f32 v5, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
723723
v_fmac_f32 v255, -|v255|, -|v255| row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
724724
// GFX11: v_fmac_f32_dpp v255, -|v255|, -|v255| row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0xff,0x57,0xff,0x6f,0xf5,0x30]
725725

726-
v_ldexp_f16 v5, v1, v2 quad_perm:[3,2,1,0]
727-
// GFX11: v_ldexp_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x76,0x01,0x1b,0x00,0xff]
726+
v_ldexp_f16 v5.l, v1.l, v2.l quad_perm:[3,2,1,0]
727+
// GFX11: v_ldexp_f16_dpp v5.l, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x76,0x01,0x1b,0x00,0xff]
728728

729-
v_ldexp_f16 v5, v1, v2 quad_perm:[0,1,2,3]
730-
// GFX11: v_ldexp_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x76,0x01,0xe4,0x00,0xff]
729+
v_ldexp_f16 v5.l, v1.l, v2.l quad_perm:[0,1,2,3]
730+
// GFX11: v_ldexp_f16_dpp v5.l, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x76,0x01,0xe4,0x00,0xff]
731731

732-
v_ldexp_f16 v5, v1, v2 row_mirror
733-
// GFX11: v_ldexp_f16_dpp v5, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x76,0x01,0x40,0x01,0xff]
732+
v_ldexp_f16 v5.l, v1.l, v2.l row_mirror
733+
// GFX11: v_ldexp_f16_dpp v5.l, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x76,0x01,0x40,0x01,0xff]
734734

735-
v_ldexp_f16 v5, v1, v2 row_half_mirror
736-
// GFX11: v_ldexp_f16_dpp v5, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x76,0x01,0x41,0x01,0xff]
735+
v_ldexp_f16 v5.l, v1.l, v2.l row_half_mirror
736+
// GFX11: v_ldexp_f16_dpp v5.l, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x76,0x01,0x41,0x01,0xff]
737737

738-
v_ldexp_f16 v5, v1, v2 row_shl:1
739-
// GFX11: v_ldexp_f16_dpp v5, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x76,0x01,0x01,0x01,0xff]
738+
v_ldexp_f16 v5.l, v1.l, v2.l row_shl:1
739+
// GFX11: v_ldexp_f16_dpp v5.l, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x76,0x01,0x01,0x01,0xff]
740740

741-
v_ldexp_f16 v5, v1, v2 row_shl:15
742-
// GFX11: v_ldexp_f16_dpp v5, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x76,0x01,0x0f,0x01,0xff]
741+
v_ldexp_f16 v5.l, v1.l, v2.l row_shl:15
742+
// GFX11: v_ldexp_f16_dpp v5.l, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x76,0x01,0x0f,0x01,0xff]
743743

744-
v_ldexp_f16 v5, v1, v2 row_shr:1
745-
// GFX11: v_ldexp_f16_dpp v5, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x76,0x01,0x11,0x01,0xff]
744+
v_ldexp_f16 v5.l, v1.l, v2.l row_shr:1
745+
// GFX11: v_ldexp_f16_dpp v5.l, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x76,0x01,0x11,0x01,0xff]
746746

747-
v_ldexp_f16 v5, v1, v2 row_shr:15
748-
// GFX11: v_ldexp_f16_dpp v5, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x76,0x01,0x1f,0x01,0xff]
747+
v_ldexp_f16 v5.l, v1.l, v2.l row_shr:15
748+
// GFX11: v_ldexp_f16_dpp v5.l, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x76,0x01,0x1f,0x01,0xff]
749749

750-
v_ldexp_f16 v5, v1, v2 row_ror:1
751-
// GFX11: v_ldexp_f16_dpp v5, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x76,0x01,0x21,0x01,0xff]
750+
v_ldexp_f16 v5.l, v1.l, v2.l row_ror:1
751+
// GFX11: v_ldexp_f16_dpp v5.l, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x76,0x01,0x21,0x01,0xff]
752752

753-
v_ldexp_f16 v5, v1, v2 row_ror:15
754-
// GFX11: v_ldexp_f16_dpp v5, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x76,0x01,0x2f,0x01,0xff]
753+
v_ldexp_f16 v5.l, v1.l, v2.l row_ror:15
754+
// GFX11: v_ldexp_f16_dpp v5.l, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x76,0x01,0x2f,0x01,0xff]
755755

756-
v_ldexp_f16 v5, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
757-
// GFX11: v_ldexp_f16_dpp v5, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x76,0x01,0x50,0x01,0xff]
756+
v_ldexp_f16 v5.l, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
757+
// GFX11: v_ldexp_f16_dpp v5.l, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x76,0x01,0x50,0x01,0xff]
758758

759-
v_ldexp_f16 v5, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
760-
// GFX11: v_ldexp_f16_dpp v5, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x76,0x01,0x5f,0x01,0x01]
759+
v_ldexp_f16 v5.l, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
760+
// GFX11: v_ldexp_f16_dpp v5.l, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x76,0x01,0x5f,0x01,0x01]
761761

762-
v_ldexp_f16 v5, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
763-
// GFX11: v_ldexp_f16_dpp v5, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x0a,0x76,0x01,0x60,0x09,0x13]
762+
v_ldexp_f16 v5.l, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1
763+
// GFX11: v_ldexp_f16_dpp v5.l, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x0a,0x76,0x01,0x60,0x09,0x13]
764764

765-
v_ldexp_f16 v127, -|v127|, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
766-
// GFX11: v_ldexp_f16_dpp v127, -|v127|, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0xfe,0x76,0x7f,0x6f,0x35,0x30]
765+
v_ldexp_f16 v127.l, -|v127.l|, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1
766+
// GFX11: v_ldexp_f16_dpp v127.l, -|v127.l|, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0xfe,0x76,0x7f,0x6f,0x35,0x30]
767+
768+
v_ldexp_f16 v127.l, v127.l, v127.l row_share:15 row_mask:0x0 bank_mask:0x1
769+
// GFX11: v_ldexp_f16_dpp v127.l, v127.l, v127.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0xfe,0xfe,0x76,0x7f,0x5f,0x01,0x01]
770+
771+
v_ldexp_f16 v5.h, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
772+
// GFX11: v_ldexp_f16_dpp v5.h, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x0b,0x77,0x81,0x60,0x09,0x13]
773+
774+
v_ldexp_f16 v127.h, -|v127.h|, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
775+
// GFX11: v_ldexp_f16_dpp v127.h, -|v127.h|, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0xff,0x77,0xff,0x6f,0x35,0x30]
767776

768777
v_lshlrev_b32 v5, v1, v2 quad_perm:[3,2,1,0]
769778
// GFX11: v_lshlrev_b32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x30,0x01,0x1b,0x00,0xff]

‎llvm/test/MC/AMDGPU/gfx11_asm_vop2_dpp8.s

Lines changed: 15 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -163,14 +163,23 @@ v_fmac_f32 v5, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
163163
v_fmac_f32 v255, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:0
164164
// GFX11: v_fmac_f32_dpp v255, v255, v255 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0xff,0x57,0xff,0x00,0x00,0x00]
165165

166-
v_ldexp_f16 v5, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
167-
// GFX11: v_ldexp_f16_dpp v5, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x0a,0x76,0x01,0x77,0x39,0x05]
166+
v_ldexp_f16 v5.l, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
167+
// GFX11: v_ldexp_f16_dpp v5.l, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x0a,0x76,0x01,0x77,0x39,0x05]
168168

169-
v_ldexp_f16 v5, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
170-
// GFX11: v_ldexp_f16_dpp v5, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x0a,0x76,0x01,0x77,0x39,0x05]
169+
v_ldexp_f16 v5.l, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
170+
// GFX11: v_ldexp_f16_dpp v5.l, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x0a,0x76,0x01,0x77,0x39,0x05]
171171

172-
v_ldexp_f16 v127, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:0
173-
// GFX11: v_ldexp_f16_dpp v127, v127, v127 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0xfe,0x76,0x7f,0x00,0x00,0x00]
172+
v_ldexp_f16 v127.l, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0]
173+
// GFX11: v_ldexp_f16_dpp v127.l, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0xfe,0x76,0x7f,0x00,0x00,0x00]
174+
175+
v_ldexp_f16 v127.l, v127.l, v127.l dpp8:[7,6,5,4,3,2,1,0]
176+
// GFX11: v_ldexp_f16_dpp v127.l, v127.l, v127.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0xfe,0xfe,0x76,0x7f,0x77,0x39,0x05]
177+
178+
v_ldexp_f16 v5.h, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1
179+
// GFX11: v_ldexp_f16_dpp v5.h, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x0b,0x77,0x81,0x77,0x39,0x05]
180+
181+
v_ldexp_f16 v127.h, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:0
182+
// GFX11: v_ldexp_f16_dpp v127.h, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0xff,0x77,0xff,0x00,0x00,0x00]
174183

175184
v_lshlrev_b32 v5, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
176185
// GFX11: v_lshlrev_b32_dpp v5, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x0a,0x30,0x01,0x77,0x39,0x05]

‎llvm/test/MC/AMDGPU/gfx11_asm_vop2_t16_err.s

Lines changed: 27 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -146,12 +146,30 @@ v_fmamk_f16_e32 v5.l, v1.l, 0xfe0b, v255.l
146146
v_fmamk_f16_e32 v5.l, v255.l, 0xfe0b, v3.l
147147
// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
148148

149+
v_ldexp_f16 v5.h, v1.h, v255 dpp8:[7,6,5,4,3,2,1,0]
150+
// GFX11: :[[@LINE-1]]:25: error: invalid operand for instruction
151+
152+
v_ldexp_f16 v5.h, v1.h, v255 quad_perm:[3,2,1,0]
153+
// GFX11: :[[@LINE-1]]:25: error: invalid operand for instruction
154+
155+
v_ldexp_f16_dpp v255.h, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
156+
// GFX11: :[[@LINE-1]]:17: error: invalid operand for instruction
157+
158+
v_ldexp_f16_dpp v255.h, v1.h, v2.h quad_perm:[3,2,1,0]
159+
// GFX11: :[[@LINE-1]]:17: error: invalid operand for instruction
160+
149161
v_ldexp_f16_dpp v255.l, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
150162
// GFX11: :[[@LINE-1]]:17: error: invalid operand for instruction
151163

152164
v_ldexp_f16_dpp v255.l, v1.l, v2.l quad_perm:[3,2,1,0]
153165
// GFX11: :[[@LINE-1]]:17: error: invalid operand for instruction
154166

167+
v_ldexp_f16_dpp v5.h, v255.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
168+
// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
169+
170+
v_ldexp_f16_dpp v5.h, v255.h, v2.h quad_perm:[3,2,1,0]
171+
// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
172+
155173
v_ldexp_f16_dpp v5.l, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
156174
// GFX11: :[[@LINE-1]]:29: error: invalid operand for instruction
157175

@@ -164,9 +182,18 @@ v_ldexp_f16_dpp v5.l, v255.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
164182
v_ldexp_f16_dpp v5.l, v255.l, v2.l quad_perm:[3,2,1,0]
165183
// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
166184

185+
v_ldexp_f16_e32 v255.h, v1.h, v2.h
186+
// GFX11: :[[@LINE-1]]:17: error: invalid operand for instruction
187+
167188
v_ldexp_f16_e32 v255.l, v1.l, v2.l
168189
// GFX11: :[[@LINE-1]]:17: error: invalid operand for instruction
169190

191+
v_ldexp_f16_e32 v5.h, v1.h, v255.h
192+
// GFX11: :[[@LINE-1]]:29: error: invalid operand for instruction
193+
194+
v_ldexp_f16_e32 v5.h, v255.h, v2.h
195+
// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
196+
170197
v_ldexp_f16_e32 v5.l, v1.l, v255.l
171198
// GFX11: :[[@LINE-1]]:29: error: invalid operand for instruction
172199

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