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Add missing comments & use <SelectTypeKind::AnyType>
1 parent e5aaa04 commit 52bf6ea

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2 files changed

+14
-25
lines changed

2 files changed

+14
-25
lines changed

clang/test/Sema/aarch64-sme2-intrinsics/acle_sme2_imm.cpp

Lines changed: 12 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -40,17 +40,17 @@ void test_svluti2_lane_zt_x4(svuint8_t zn_u8, svuint16_t zn_u16, svuint32_t zn_u
4040
svluti2_lane_zt_u32_x4(1, zn_u32, 3); // expected-error {{argument value 1 is outside the valid range [0, 0]}}
4141
// Test index value range
4242
svluti2_lane_zt_u32_x4(0, zn_u32, 4); // expected-error {{argument value 4 is outside the valid range [0, 3]}}
43-
43+
// Test Reg Offset
4444
svluti2_lane_zt_f16_x4(1, zn_f16, 3); // expected-error {{argument value 1 is outside the valid range [0, 0]}}
45-
45+
// Test index value range
4646
svluti2_lane_zt_f16_x4(0, zn_f16, 4); // expected-error {{argument value 4 is outside the valid range [0, 3]}}
47-
47+
// Test Reg Offset
4848
svluti2_lane_zt_bf16_x4(1, zn_bf16, 3); // expected-error {{argument value 1 is outside the valid range [0, 0]}}
49-
49+
// Test index value range
5050
svluti2_lane_zt_bf16_x4(0, zn_bf16, 4); // expected-error {{argument value 4 is outside the valid range [0, 3]}}
51-
51+
// Test Reg Offset
5252
svluti2_lane_zt_f32_x4(1, zn_f32, 3); // expected-error {{argument value 1 is outside the valid range [0, 0]}}
53-
53+
// Test index value range
5454
svluti2_lane_zt_f32_x4(0, zn_f32, 4); // expected-error {{argument value 4 is outside the valid range [0, 3]}}
5555
}
5656

@@ -63,17 +63,17 @@ void test_svluti4_lane_zt_x4(svuint8_t zn_u8, svuint16_t zn_u16, svuint32_t zn_u
6363
svluti4_lane_zt_u32_x4(1, zn_u32, 1); // expected-error {{argument value 1 is outside the valid range [0, 0]}}
6464
// Test index value range
6565
svluti4_lane_zt_u32_x4(0, zn_u32, 2); // expected-error {{argument value 2 is outside the valid range [0, 1]}}
66-
66+
// Test Reg Offset
6767
svluti4_lane_zt_f16_x4(1, zn_f16, 0); // expected-error {{argument value 1 is outside the valid range [0, 0]}}
68-
68+
// Test index value range
6969
svluti4_lane_zt_f16_x4(0, zn_f16, 2); // expected-error {{argument value 2 is outside the valid range [0, 1]}}
70-
70+
// Test Reg Offset
7171
svluti4_lane_zt_bf16_x4(1, zn_bf16, 0); // expected-error {{argument value 1 is outside the valid range [0, 0]}}
72-
72+
// Test index value range
7373
svluti4_lane_zt_bf16_x4(0, zn_bf16, 2); // expected-error {{argument value 2 is outside the valid range [0, 1]}}
74-
74+
// Test Reg Offset
7575
svluti4_lane_zt_f32_x4(1, zn_f32, 1); // expected-error {{argument value 1 is outside the valid range [0, 0]}}
76-
76+
// Test index value range
7777
svluti4_lane_zt_f32_x4(0, zn_f32, 2); // expected-error {{argument value 2 is outside the valid range [0, 1]}}
7878
}
7979

llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp

Lines changed: 2 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -5105,31 +5105,20 @@ void AArch64DAGToDAGISel::Select(SDNode *Node) {
51055105
return;
51065106
}
51075107
case Intrinsic::aarch64_sme_luti2_lane_zt_x4: {
5108-
if (auto Opc = SelectOpcodeFromVT<SelectTypeKind::Int>(
5108+
if (auto Opc = SelectOpcodeFromVT<SelectTypeKind::AnyType>(
51095109
Node->getValueType(0),
51105110
{AArch64::LUTI2_4ZTZI_B, AArch64::LUTI2_4ZTZI_H,
51115111
AArch64::LUTI2_4ZTZI_S}))
51125112
// Second Immediate must be <= 3:
51135113
SelectMultiVectorLuti<3>(Node, 4, Opc);
5114-
else if (auto Opc = SelectOpcodeFromVT<SelectTypeKind::FP>(
5115-
Node->getValueType(0),
5116-
{AArch64::LUTI2_4ZTZI_B, AArch64::LUTI2_4ZTZI_H,
5117-
AArch64::LUTI2_4ZTZI_S}))
5118-
// Second Immediate must be <= 3:
5119-
SelectMultiVectorLuti<3>(Node, 4, Opc);
51205114
return;
51215115
}
51225116
case Intrinsic::aarch64_sme_luti4_lane_zt_x4: {
5123-
if (auto Opc = SelectOpcodeFromVT<SelectTypeKind::Int>(
5117+
if (auto Opc = SelectOpcodeFromVT<SelectTypeKind::AnyType>(
51245118
Node->getValueType(0),
51255119
{0, AArch64::LUTI4_4ZTZI_H, AArch64::LUTI4_4ZTZI_S}))
51265120
// Second Immediate must be <= 1:
51275121
SelectMultiVectorLuti<1>(Node, 4, Opc);
5128-
else if (auto Opc = SelectOpcodeFromVT<SelectTypeKind::FP>(
5129-
Node->getValueType(0),
5130-
{0, AArch64::LUTI4_4ZTZI_H, AArch64::LUTI4_4ZTZI_S}))
5131-
// Second Immediate must be <= 1:
5132-
SelectMultiVectorLuti<1>(Node, 4, Opc);
51335122
return;
51345123
}
51355124
}

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