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1 parent 7f27654 commit 53e48a1Copy full SHA for 53e48a1
llvm/lib/CodeGen/AtomicExpandPass.cpp
@@ -1564,8 +1564,6 @@ bool AtomicExpandImpl::isIdempotentRMW(AtomicRMWInst *RMWI) {
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case AtomicRMWInst::Sub:
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case AtomicRMWInst::Or:
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case AtomicRMWInst::Xor:
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- case AtomicRMWInst::USubCond:
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- case AtomicRMWInst::USubSat:
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return C->isZero();
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case AtomicRMWInst::And:
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return C->isMinusOne();
llvm/lib/Transforms/InstCombine/InstCombineAtomicRMW.cpp
@@ -41,8 +41,6 @@ bool isIdempotentRMW(AtomicRMWInst& RMWI) {
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