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[AMDGPU] Remove AtomicNoRet class and getAtomicNoRetOp table (#83593)
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7 files changed

+95
-180
lines changed

7 files changed

+95
-180
lines changed

‎llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp

Lines changed: 0 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -8168,20 +8168,6 @@ void AMDGPUAsmParser::cvtMubufImpl(MCInst &Inst,
81688168
bool IsAtomicReturn = false;
81698169

81708170
if (IsAtomic) {
8171-
for (unsigned i = FirstOperandIdx, e = Operands.size(); i != e; ++i) {
8172-
AMDGPUOperand &Op = ((AMDGPUOperand &)*Operands[i]);
8173-
if (!Op.isCPol())
8174-
continue;
8175-
IsAtomicReturn = Op.getImm() & AMDGPU::CPol::GLC;
8176-
break;
8177-
}
8178-
8179-
if (!IsAtomicReturn) {
8180-
int NewOpc = AMDGPU::getAtomicNoRetOp(Inst.getOpcode());
8181-
if (NewOpc != -1)
8182-
Inst.setOpcode(NewOpc);
8183-
}
8184-
81858171
IsAtomicReturn = MII.get(Inst.getOpcode()).TSFlags &
81868172
SIInstrFlags::IsAtomicRet;
81878173
}

‎llvm/lib/Target/AMDGPU/BUFInstructions.td

Lines changed: 29 additions & 59 deletions
Original file line numberDiff line numberDiff line change
@@ -747,8 +747,7 @@ class MUBUF_AtomicNoRet_Pseudo<string opName, int addrKind,
747747
(outs),
748748
getMUBUFAtomicIns<addrKindCopy, vdataClassCopy, 0, hasRestrictedSOffset>.ret,
749749
getMUBUFAsmOps<addrKindCopy>.ret,
750-
pattern>,
751-
AtomicNoRet<opName # "_" # getAddrName<addrKindCopy>.ret, 0> {
750+
pattern> {
752751
let PseudoInstr = opName # "_" # getAddrName<addrKindCopy>.ret;
753752
let glc_value = 0;
754753
let dlc_value = 0;
@@ -768,8 +767,7 @@ class MUBUF_AtomicRet_Pseudo<string opName, int addrKind,
768767
(outs vdata_op:$vdata),
769768
getMUBUFAtomicIns<addrKindCopy, vdataClassCopy, 1, hasRestrictedSOffset>.ret,
770769
getMUBUFAsmOps<addrKindCopy>.ret,
771-
pattern>,
772-
AtomicNoRet<opName # "_" # getAddrName<addrKindCopy>.ret, 1> {
770+
pattern> {
773771
let PseudoInstr = opName # "_rtn_" # getAddrName<addrKindCopy>.ret;
774772
let glc_value = 1;
775773
let dlc_value = 0;
@@ -2511,34 +2509,26 @@ multiclass MUBUF_Real_Atomic_gfx11_Renamed_impl<bits<8> op, bit is_return,
25112509
string real_name> {
25122510
defvar Rtn = !if(is_return, "_RTN", "");
25132511
def _BOTHEN#Rtn#_gfx11 :
2514-
MUBUF_Real_Atomic_gfx11_impl<op, NAME # "_BOTHEN" # Rtn, real_name>,
2515-
AtomicNoRet<NAME # "_BOTHEN_gfx11", is_return>;
2512+
MUBUF_Real_Atomic_gfx11_impl<op, NAME # "_BOTHEN" # Rtn, real_name>;
25162513
def _IDXEN#Rtn#_gfx11 :
2517-
MUBUF_Real_Atomic_gfx11_impl<op, NAME # "_IDXEN" # Rtn, real_name>,
2518-
AtomicNoRet<NAME # "_IDXEN_gfx11", is_return>;
2514+
MUBUF_Real_Atomic_gfx11_impl<op, NAME # "_IDXEN" # Rtn, real_name>;
25192515
def _OFFEN#Rtn#_gfx11 :
2520-
MUBUF_Real_Atomic_gfx11_impl<op, NAME # "_OFFEN" # Rtn, real_name>,
2521-
AtomicNoRet<NAME # "_OFFEN_gfx11", is_return>;
2516+
MUBUF_Real_Atomic_gfx11_impl<op, NAME # "_OFFEN" # Rtn, real_name>;
25222517
def _OFFSET#Rtn#_gfx11 :
2523-
MUBUF_Real_Atomic_gfx11_impl<op, NAME # "_OFFSET" # Rtn, real_name>,
2524-
AtomicNoRet<NAME # "_OFFSET_gfx11", is_return>;
2518+
MUBUF_Real_Atomic_gfx11_impl<op, NAME # "_OFFSET" # Rtn, real_name>;
25252519
}
25262520

25272521
multiclass MUBUF_Real_Atomic_gfx12_Renamed_impl<bits<8> op, bit is_return,
25282522
string real_name> {
25292523
defvar Rtn = !if(is_return, "_RTN", "");
25302524
def _BOTHEN#Rtn#_gfx12 :
2531-
MUBUF_Real_Atomic_gfx12_impl<op, NAME # "_VBUFFER_BOTHEN" # Rtn, real_name>,
2532-
AtomicNoRet<NAME # "_BOTHEN_gfx12", is_return>;
2525+
MUBUF_Real_Atomic_gfx12_impl<op, NAME # "_VBUFFER_BOTHEN" # Rtn, real_name>;
25332526
def _IDXEN#Rtn#_gfx12 :
2534-
MUBUF_Real_Atomic_gfx12_impl<op, NAME # "_VBUFFER_IDXEN" # Rtn, real_name>,
2535-
AtomicNoRet<NAME # "_IDXEN_gfx12", is_return>;
2527+
MUBUF_Real_Atomic_gfx12_impl<op, NAME # "_VBUFFER_IDXEN" # Rtn, real_name>;
25362528
def _OFFEN#Rtn#_gfx12 :
2537-
MUBUF_Real_Atomic_gfx12_impl<op, NAME # "_VBUFFER_OFFEN" # Rtn, real_name>,
2538-
AtomicNoRet<NAME # "_OFFEN_gfx12", is_return>;
2529+
MUBUF_Real_Atomic_gfx12_impl<op, NAME # "_VBUFFER_OFFEN" # Rtn, real_name>;
25392530
def _OFFSET#Rtn#_gfx12 :
2540-
MUBUF_Real_Atomic_gfx12_impl<op, NAME # "_VBUFFER_OFFSET" # Rtn, real_name>,
2541-
AtomicNoRet<NAME # "_OFFSET_gfx12", is_return>;
2531+
MUBUF_Real_Atomic_gfx12_impl<op, NAME # "_VBUFFER_OFFSET" # Rtn, real_name>;
25422532
}
25432533

25442534
multiclass MUBUF_Real_Atomic_gfx11_gfx12_Renamed_impl<bits<8> op, bit is_return,
@@ -2695,32 +2685,24 @@ multiclass MUBUF_Real_AllAddr_Lds_gfx10<bits<8> op, bit isTFE = 0> {
26952685
}
26962686
multiclass MUBUF_Real_Atomics_RTN_gfx10<bits<8> op> {
26972687
def _BOTHEN_RTN_gfx10 :
2698-
MUBUF_Real_gfx10<op, !cast<MUBUF_Pseudo>(NAME#"_BOTHEN_RTN")>,
2699-
AtomicNoRet<NAME # "_BOTHEN_gfx10", 1>;
2688+
MUBUF_Real_gfx10<op, !cast<MUBUF_Pseudo>(NAME#"_BOTHEN_RTN")>;
27002689
def _IDXEN_RTN_gfx10 :
2701-
MUBUF_Real_gfx10<op, !cast<MUBUF_Pseudo>(NAME#"_IDXEN_RTN")>,
2702-
AtomicNoRet<NAME # "_IDXEN_gfx10", 1>;
2690+
MUBUF_Real_gfx10<op, !cast<MUBUF_Pseudo>(NAME#"_IDXEN_RTN")>;
27032691
def _OFFEN_RTN_gfx10 :
2704-
MUBUF_Real_gfx10<op, !cast<MUBUF_Pseudo>(NAME#"_OFFEN_RTN")>,
2705-
AtomicNoRet<NAME # "_OFFEN_gfx10", 1>;
2692+
MUBUF_Real_gfx10<op, !cast<MUBUF_Pseudo>(NAME#"_OFFEN_RTN")>;
27062693
def _OFFSET_RTN_gfx10 :
2707-
MUBUF_Real_gfx10<op, !cast<MUBUF_Pseudo>(NAME#"_OFFSET_RTN")>,
2708-
AtomicNoRet<NAME # "_OFFSET_gfx10", 1>;
2694+
MUBUF_Real_gfx10<op, !cast<MUBUF_Pseudo>(NAME#"_OFFSET_RTN")>;
27092695
}
27102696
multiclass MUBUF_Real_Atomics_gfx10<bits<8> op> :
27112697
MUBUF_Real_Atomics_RTN_gfx10<op> {
27122698
def _BOTHEN_gfx10 :
2713-
MUBUF_Real_gfx10<op, !cast<MUBUF_Pseudo>(NAME#"_BOTHEN")>,
2714-
AtomicNoRet<NAME # "_BOTHEN_gfx10", 0>;
2699+
MUBUF_Real_gfx10<op, !cast<MUBUF_Pseudo>(NAME#"_BOTHEN")>;
27152700
def _IDXEN_gfx10 :
2716-
MUBUF_Real_gfx10<op, !cast<MUBUF_Pseudo>(NAME#"_IDXEN")>,
2717-
AtomicNoRet<NAME # "_IDXEN_gfx10", 0>;
2701+
MUBUF_Real_gfx10<op, !cast<MUBUF_Pseudo>(NAME#"_IDXEN")>;
27182702
def _OFFEN_gfx10 :
2719-
MUBUF_Real_gfx10<op, !cast<MUBUF_Pseudo>(NAME#"_OFFEN")>,
2720-
AtomicNoRet<NAME # "_OFFEN_gfx10", 0>;
2703+
MUBUF_Real_gfx10<op, !cast<MUBUF_Pseudo>(NAME#"_OFFEN")>;
27212704
def _OFFSET_gfx10 :
2722-
MUBUF_Real_gfx10<op, !cast<MUBUF_Pseudo>(NAME#"_OFFSET")>,
2723-
AtomicNoRet<NAME # "_OFFSET_gfx10", 0>;
2705+
MUBUF_Real_gfx10<op, !cast<MUBUF_Pseudo>(NAME#"_OFFSET")>;
27242706
}
27252707

27262708
defm BUFFER_STORE_BYTE_D16_HI : MUBUF_Real_AllAddr_gfx10<0x019>;
@@ -2795,36 +2777,26 @@ multiclass MUBUF_Real_AllAddr_Lds_gfx6_gfx7<bits<8> op, bit isTFE = 0> {
27952777
}
27962778
multiclass MUBUF_Real_Atomics_gfx6_gfx7<bits<8> op> {
27972779
def _ADDR64_gfx6_gfx7 :
2798-
MUBUF_Real_gfx6_gfx7<op, !cast<MUBUF_Pseudo>(NAME#"_ADDR64")>,
2799-
AtomicNoRet<NAME # "_ADDR64_gfx6_gfx7", 0>;
2780+
MUBUF_Real_gfx6_gfx7<op, !cast<MUBUF_Pseudo>(NAME#"_ADDR64")>;
28002781
def _BOTHEN_gfx6_gfx7 :
2801-
MUBUF_Real_gfx6_gfx7<op, !cast<MUBUF_Pseudo>(NAME#"_BOTHEN")>,
2802-
AtomicNoRet<NAME # "_BOTHEN_gfx6_gfx7", 0>;
2782+
MUBUF_Real_gfx6_gfx7<op, !cast<MUBUF_Pseudo>(NAME#"_BOTHEN")>;
28032783
def _IDXEN_gfx6_gfx7 :
2804-
MUBUF_Real_gfx6_gfx7<op, !cast<MUBUF_Pseudo>(NAME#"_IDXEN")>,
2805-
AtomicNoRet<NAME # "_IDXEN_gfx6_gfx7", 0>;
2784+
MUBUF_Real_gfx6_gfx7<op, !cast<MUBUF_Pseudo>(NAME#"_IDXEN")>;
28062785
def _OFFEN_gfx6_gfx7 :
2807-
MUBUF_Real_gfx6_gfx7<op, !cast<MUBUF_Pseudo>(NAME#"_OFFEN")>,
2808-
AtomicNoRet<NAME # "_OFFEN_gfx6_gfx7", 0>;
2786+
MUBUF_Real_gfx6_gfx7<op, !cast<MUBUF_Pseudo>(NAME#"_OFFEN")>;
28092787
def _OFFSET_gfx6_gfx7 :
2810-
MUBUF_Real_gfx6_gfx7<op, !cast<MUBUF_Pseudo>(NAME#"_OFFSET")>,
2811-
AtomicNoRet<NAME # "_OFFSET_gfx6_gfx7", 0>;
2788+
MUBUF_Real_gfx6_gfx7<op, !cast<MUBUF_Pseudo>(NAME#"_OFFSET")>;
28122789

28132790
def _ADDR64_RTN_gfx6_gfx7 :
2814-
MUBUF_Real_gfx6_gfx7<op, !cast<MUBUF_Pseudo>(NAME#"_ADDR64_RTN")>,
2815-
AtomicNoRet<NAME # "_ADDR64_gfx6_gfx7", 1>;
2791+
MUBUF_Real_gfx6_gfx7<op, !cast<MUBUF_Pseudo>(NAME#"_ADDR64_RTN")>;
28162792
def _BOTHEN_RTN_gfx6_gfx7 :
2817-
MUBUF_Real_gfx6_gfx7<op, !cast<MUBUF_Pseudo>(NAME#"_BOTHEN_RTN")>,
2818-
AtomicNoRet<NAME # "_BOTHEN_gfx6_gfx7", 1>;
2793+
MUBUF_Real_gfx6_gfx7<op, !cast<MUBUF_Pseudo>(NAME#"_BOTHEN_RTN")>;
28192794
def _IDXEN_RTN_gfx6_gfx7 :
2820-
MUBUF_Real_gfx6_gfx7<op, !cast<MUBUF_Pseudo>(NAME#"_IDXEN_RTN")>,
2821-
AtomicNoRet<NAME # "_IDXEN_gfx6_gfx7", 1>;
2795+
MUBUF_Real_gfx6_gfx7<op, !cast<MUBUF_Pseudo>(NAME#"_IDXEN_RTN")>;
28222796
def _OFFEN_RTN_gfx6_gfx7 :
2823-
MUBUF_Real_gfx6_gfx7<op, !cast<MUBUF_Pseudo>(NAME#"_OFFEN_RTN")>,
2824-
AtomicNoRet<NAME # "_OFFEN_gfx6_gfx7", 1>;
2797+
MUBUF_Real_gfx6_gfx7<op, !cast<MUBUF_Pseudo>(NAME#"_OFFEN_RTN")>;
28252798
def _OFFSET_RTN_gfx6_gfx7 :
2826-
MUBUF_Real_gfx6_gfx7<op, !cast<MUBUF_Pseudo>(NAME#"_OFFSET_RTN")>,
2827-
AtomicNoRet<NAME # "_OFFSET_gfx6_gfx7", 1>;
2799+
MUBUF_Real_gfx6_gfx7<op, !cast<MUBUF_Pseudo>(NAME#"_OFFSET_RTN")>;
28282800
}
28292801

28302802
multiclass MUBUF_Real_AllAddr_gfx6_gfx7_gfx10<bits<8> op> :
@@ -3081,9 +3053,7 @@ class MUBUF_Real_Base_vi <bits<7> op, MUBUF_Pseudo ps, int Enc,
30813053
bit has_sccb = ps.has_sccb> :
30823054
MUBUF_Real<ps>,
30833055
Enc64,
3084-
SIMCInstr<ps.PseudoInstr, Enc>,
3085-
AtomicNoRet<!subst("_RTN","",NAME), !if(ps.IsAtomicNoRet, 0,
3086-
!if(ps.IsAtomicRet, 1, ?))> {
3056+
SIMCInstr<ps.PseudoInstr, Enc> {
30873057

30883058
let Inst{11-0} = !if(ps.has_offset, offset, ?);
30893059
let Inst{12} = ps.offen;

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