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fixup! [AMDGPU] Add llvm.amdgcn.raw.atomic.ptr.buffer.load
1 parent 18fc7ab commit 551a6f8

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6 files changed

+42
-42
lines changed

6 files changed

+42
-42
lines changed

‎llvm/include/llvm/IR/IntrinsicsAMDGPU.td

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1147,7 +1147,7 @@ class AMDGPURawPtrBufferLoad<LLVMType data_ty = llvm_any_ty> : DefaultAttrsIntri
11471147
def int_amdgcn_raw_ptr_buffer_load_format : AMDGPURawPtrBufferLoad<llvm_anyfloat_ty>;
11481148
def int_amdgcn_raw_ptr_buffer_load : AMDGPURawPtrBufferLoad;
11491149

1150-
class AMDGPURawAtomicPtrBufferLoad<LLVMType data_ty = llvm_any_ty> : Intrinsic <
1150+
class AMDGPURawPtrAtomicBufferLoad<LLVMType data_ty = llvm_any_ty> : Intrinsic <
11511151
[data_ty],
11521152
[AMDGPUBufferRsrcTy,// rsrc(SGPR)
11531153
llvm_i32_ty, // offset(VGPR/imm, included in bounds checking and swizzling)
@@ -1158,7 +1158,7 @@ class AMDGPURawAtomicPtrBufferLoad<LLVMType data_ty = llvm_any_ty> : Intrinsic <
11581158
// swizzled buffer (bit 3 = swz))
11591159
[IntrArgMemOnly, NoCapture<ArgIndex<0>>, ImmArg<ArgIndex<3>>, IntrWillReturn, IntrNoCallback, IntrNoFree], "", [SDNPMemOperand]>,
11601160
AMDGPURsrcIntrinsic<0>;
1161-
def int_amdgcn_raw_atomic_ptr_buffer_load : AMDGPURawAtomicPtrBufferLoad;
1161+
def int_amdgcn_raw_ptr_atomic_buffer_load : AMDGPURawPtrAtomicBufferLoad;
11621162

11631163
class AMDGPUStructBufferLoad<LLVMType data_ty = llvm_any_ty> : DefaultAttrsIntrinsic <
11641164
[data_ty],

‎llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -7346,7 +7346,7 @@ bool AMDGPULegalizerInfo::legalizeIntrinsic(LegalizerHelper &Helper,
73467346
case Intrinsic::amdgcn_raw_buffer_load:
73477347
case Intrinsic::amdgcn_raw_ptr_buffer_load:
73487348
case Intrinsic::amdgcn_raw_atomic_buffer_load:
7349-
case Intrinsic::amdgcn_raw_atomic_ptr_buffer_load:
7349+
case Intrinsic::amdgcn_raw_ptr_atomic_buffer_load:
73507350
case Intrinsic::amdgcn_struct_buffer_load:
73517351
case Intrinsic::amdgcn_struct_ptr_buffer_load:
73527352
return legalizeBufferLoad(MI, MRI, B, false, false);

‎llvm/lib/Target/AMDGPU/AMDGPULowerBufferFatPointers.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1094,7 +1094,7 @@ Value *SplitPtrStructs::handleMemoryInst(Instruction *I, Value *Arg, Value *Ptr,
10941094
if (isa<LoadInst>(I))
10951095
IID = Order == AtomicOrdering::NotAtomic
10961096
? Intrinsic::amdgcn_raw_ptr_buffer_load
1097-
: Intrinsic::amdgcn_raw_atomic_ptr_buffer_load;
1097+
: Intrinsic::amdgcn_raw_ptr_atomic_buffer_load;
10981098
else if (isa<StoreInst>(I))
10991099
IID = Intrinsic::amdgcn_raw_ptr_buffer_store;
11001100
else if (auto *RMW = dyn_cast<AtomicRMWInst>(I)) {

‎llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -4985,7 +4985,7 @@ AMDGPURegisterBankInfo::getInstrMapping(const MachineInstr &MI) const {
49854985
case Intrinsic::amdgcn_raw_buffer_load:
49864986
case Intrinsic::amdgcn_raw_ptr_buffer_load:
49874987
case Intrinsic::amdgcn_raw_atomic_buffer_load:
4988-
case Intrinsic::amdgcn_raw_atomic_ptr_buffer_load:
4988+
case Intrinsic::amdgcn_raw_ptr_atomic_buffer_load:
49894989
case Intrinsic::amdgcn_raw_tbuffer_load:
49904990
case Intrinsic::amdgcn_raw_ptr_tbuffer_load: {
49914991
// FIXME: Should make intrinsic ID the last operand of the instruction,

‎llvm/lib/Target/AMDGPU/SIISelLowering.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1273,7 +1273,7 @@ bool SITargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,
12731273
return true;
12741274
}
12751275
case Intrinsic::amdgcn_raw_atomic_buffer_load:
1276-
case Intrinsic::amdgcn_raw_atomic_ptr_buffer_load: {
1276+
case Intrinsic::amdgcn_raw_ptr_atomic_buffer_load: {
12771277
Info.memVT =
12781278
memVTFromLoadIntrReturn(*this, MF.getDataLayout(), CI.getType(),
12791279
std::numeric_limits<unsigned>::max());
@@ -8906,7 +8906,7 @@ SDValue SITargetLowering::LowerINTRINSIC_W_CHAIN(SDValue Op,
89068906
case Intrinsic::amdgcn_raw_buffer_load:
89078907
case Intrinsic::amdgcn_raw_ptr_buffer_load:
89088908
case Intrinsic::amdgcn_raw_atomic_buffer_load:
8909-
case Intrinsic::amdgcn_raw_atomic_ptr_buffer_load:
8909+
case Intrinsic::amdgcn_raw_ptr_atomic_buffer_load:
89108910
case Intrinsic::amdgcn_raw_buffer_load_format:
89118911
case Intrinsic::amdgcn_raw_ptr_buffer_load_format: {
89128912
const bool IsFormat =

‎llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.atomic.ptr.buffer.load.ll renamed to ‎llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.atomic.buffer.load.ll

Lines changed: 35 additions & 35 deletions
Original file line numberDiff line numberDiff line change
@@ -2,8 +2,8 @@
22
; RUN: llc < %s -march=amdgcn -mcpu=gfx1100 -verify-machineinstrs -global-isel=0 | FileCheck %s -check-prefix=CHECK
33
; RUN: llc < %s -march=amdgcn -mcpu=gfx1100 -verify-machineinstrs -global-isel=1 | FileCheck %s -check-prefix=CHECK
44

5-
define amdgpu_kernel void @raw_atomic_ptr_buffer_ptr_load_i32(ptr addrspace(8) %ptr) {
6-
; CHECK-LABEL: raw_atomic_ptr_buffer_ptr_load_i32:
5+
define amdgpu_kernel void @raw_ptr_atomic_buffer_ptr_load_i32(ptr addrspace(8) %ptr) {
6+
; CHECK-LABEL: raw_ptr_atomic_buffer_ptr_load_i32:
77
; CHECK: ; %bb.0: ; %bb
88
; CHECK-NEXT: s_load_b128 s[0:3], s[0:1], 0x24
99
; CHECK-NEXT: s_mov_b32 s4, 0
@@ -23,15 +23,15 @@ bb:
2323
%id = tail call i32 @llvm.amdgcn.workitem.id.x()
2424
br label %bb1
2525
bb1:
26-
%load = call i32 @llvm.amdgcn.raw.atomic.ptr.buffer.load.i32(ptr addrspace(8) %ptr, i32 0, i32 0, i32 1)
26+
%load = call i32 @llvm.amdgcn.raw.ptr.atomic.buffer.load.i32(ptr addrspace(8) %ptr, i32 0, i32 0, i32 1)
2727
%cmp = icmp eq i32 %load, %id
2828
br i1 %cmp, label %bb1, label %bb2
2929
bb2:
3030
ret void
3131
}
3232

33-
define amdgpu_kernel void @raw_atomic_ptr_buffer_load_i32_off(ptr addrspace(8) %ptr) {
34-
; CHECK-LABEL: raw_atomic_ptr_buffer_load_i32_off:
33+
define amdgpu_kernel void @raw_ptr_atomic_buffer_load_i32_off(ptr addrspace(8) %ptr) {
34+
; CHECK-LABEL: raw_ptr_atomic_buffer_load_i32_off:
3535
; CHECK: ; %bb.0: ; %bb
3636
; CHECK-NEXT: s_load_b128 s[0:3], s[0:1], 0x24
3737
; CHECK-NEXT: s_mov_b32 s4, 0
@@ -51,14 +51,14 @@ bb:
5151
%id = tail call i32 @llvm.amdgcn.workitem.id.x()
5252
br label %bb1
5353
bb1:
54-
%load = call i32 @llvm.amdgcn.raw.atomic.ptr.buffer.load.i32(ptr addrspace(8) %ptr, i32 0, i32 0, i32 1)
54+
%load = call i32 @llvm.amdgcn.raw.ptr.atomic.buffer.load.i32(ptr addrspace(8) %ptr, i32 0, i32 0, i32 1)
5555
%cmp = icmp eq i32 %load, %id
5656
br i1 %cmp, label %bb1, label %bb2
5757
bb2:
5858
ret void
5959
}
60-
define amdgpu_kernel void @raw_atomic_ptr_buffer_load_i32_soff(ptr addrspace(8) %ptr) {
61-
; CHECK-LABEL: raw_atomic_ptr_buffer_load_i32_soff:
60+
define amdgpu_kernel void @raw_ptr_atomic_buffer_load_i32_soff(ptr addrspace(8) %ptr) {
61+
; CHECK-LABEL: raw_ptr_atomic_buffer_load_i32_soff:
6262
; CHECK: ; %bb.0: ; %bb
6363
; CHECK-NEXT: s_load_b128 s[0:3], s[0:1], 0x24
6464
; CHECK-NEXT: s_mov_b32 s4, 0
@@ -78,14 +78,14 @@ bb:
7878
%id = tail call i32 @llvm.amdgcn.workitem.id.x()
7979
br label %bb1
8080
bb1:
81-
%load = call i32 @llvm.amdgcn.raw.atomic.ptr.buffer.load.i32(ptr addrspace(8) %ptr, i32 4, i32 4, i32 1)
81+
%load = call i32 @llvm.amdgcn.raw.ptr.atomic.buffer.load.i32(ptr addrspace(8) %ptr, i32 4, i32 4, i32 1)
8282
%cmp = icmp eq i32 %load, %id
8383
br i1 %cmp, label %bb1, label %bb2
8484
bb2:
8585
ret void
8686
}
87-
define amdgpu_kernel void @raw_atomic_ptr_buffer_load_i32_dlc(ptr addrspace(8) %ptr) {
88-
; CHECK-LABEL: raw_atomic_ptr_buffer_load_i32_dlc:
87+
define amdgpu_kernel void @raw_ptr_atomic_buffer_load_i32_dlc(ptr addrspace(8) %ptr) {
88+
; CHECK-LABEL: raw_ptr_atomic_buffer_load_i32_dlc:
8989
; CHECK: ; %bb.0: ; %bb
9090
; CHECK-NEXT: s_load_b128 s[0:3], s[0:1], 0x24
9191
; CHECK-NEXT: s_mov_b32 s4, 0
@@ -105,15 +105,15 @@ bb:
105105
%id = tail call i32 @llvm.amdgcn.workitem.id.x()
106106
br label %bb1
107107
bb1:
108-
%load = call i32 @llvm.amdgcn.raw.atomic.ptr.buffer.load.i32(ptr addrspace(8) %ptr, i32 4, i32 0, i32 4)
108+
%load = call i32 @llvm.amdgcn.raw.ptr.atomic.buffer.load.i32(ptr addrspace(8) %ptr, i32 4, i32 0, i32 4)
109109
%cmp = icmp eq i32 %load, %id
110110
br i1 %cmp, label %bb1, label %bb2
111111
bb2:
112112
ret void
113113
}
114114

115-
define amdgpu_kernel void @raw_nonatomic_ptr_buffer_load_i32(ptr addrspace(8) %ptr) {
116-
; CHECK-LABEL: raw_nonatomic_ptr_buffer_load_i32:
115+
define amdgpu_kernel void @raw_nonptr_atomic_buffer_load_i32(ptr addrspace(8) %ptr) {
116+
; CHECK-LABEL: raw_nonptr_atomic_buffer_load_i32:
117117
; CHECK: ; %bb.0: ; %bb
118118
; CHECK-NEXT: s_load_b128 s[0:3], s[0:1], 0x24
119119
; CHECK-NEXT: s_waitcnt lgkmcnt(0)
@@ -141,8 +141,8 @@ bb2:
141141
ret void
142142
}
143143

144-
define amdgpu_kernel void @raw_atomic_ptr_buffer_load_i64(ptr addrspace(8) %ptr) {
145-
; CHECK-LABEL: raw_atomic_ptr_buffer_load_i64:
144+
define amdgpu_kernel void @raw_ptr_atomic_buffer_load_i64(ptr addrspace(8) %ptr) {
145+
; CHECK-LABEL: raw_ptr_atomic_buffer_load_i64:
146146
; CHECK: ; %bb.0: ; %bb
147147
; CHECK-NEXT: s_load_b128 s[0:3], s[0:1], 0x24
148148
; CHECK-NEXT: v_mov_b32_e32 v1, 0
@@ -164,15 +164,15 @@ bb:
164164
%id.zext = zext i32 %id to i64
165165
br label %bb1
166166
bb1:
167-
%load = call i64 @llvm.amdgcn.raw.atomic.ptr.buffer.load.i64(ptr addrspace(8) %ptr, i32 4, i32 0, i32 1)
167+
%load = call i64 @llvm.amdgcn.raw.ptr.atomic.buffer.load.i64(ptr addrspace(8) %ptr, i32 4, i32 0, i32 1)
168168
%cmp = icmp eq i64 %load, %id.zext
169169
br i1 %cmp, label %bb1, label %bb2
170170
bb2:
171171
ret void
172172
}
173173

174-
define amdgpu_kernel void @raw_atomic_ptr_buffer_load_v2i16(ptr addrspace(8) %ptr) {
175-
; CHECK-LABEL: raw_atomic_ptr_buffer_load_v2i16:
174+
define amdgpu_kernel void @raw_ptr_atomic_buffer_load_v2i16(ptr addrspace(8) %ptr) {
175+
; CHECK-LABEL: raw_ptr_atomic_buffer_load_v2i16:
176176
; CHECK: ; %bb.0: ; %bb
177177
; CHECK-NEXT: s_load_b128 s[0:3], s[0:1], 0x24
178178
; CHECK-NEXT: s_mov_b32 s4, 0
@@ -192,16 +192,16 @@ bb:
192192
%id = tail call i32 @llvm.amdgcn.workitem.id.x()
193193
br label %bb1
194194
bb1:
195-
%load = call <2 x i16> @llvm.amdgcn.raw.atomic.ptr.buffer.load.v2i16(ptr addrspace(8) %ptr, i32 0, i32 0, i32 1)
195+
%load = call <2 x i16> @llvm.amdgcn.raw.ptr.atomic.buffer.load.v2i16(ptr addrspace(8) %ptr, i32 0, i32 0, i32 1)
196196
%bitcast = bitcast <2 x i16> %load to i32
197197
%cmp = icmp eq i32 %bitcast, %id
198198
br i1 %cmp, label %bb1, label %bb2
199199
bb2:
200200
ret void
201201
}
202202

203-
define amdgpu_kernel void @raw_atomic_ptr_buffer_load_v4i16(ptr addrspace(8) %ptr) {
204-
; CHECK-LABEL: raw_atomic_ptr_buffer_load_v4i16:
203+
define amdgpu_kernel void @raw_ptr_atomic_buffer_load_v4i16(ptr addrspace(8) %ptr) {
204+
; CHECK-LABEL: raw_ptr_atomic_buffer_load_v4i16:
205205
; CHECK: ; %bb.0: ; %bb
206206
; CHECK-NEXT: s_load_b128 s[0:3], s[0:1], 0x24
207207
; CHECK-NEXT: s_mov_b32 s4, 0
@@ -224,7 +224,7 @@ bb:
224224
%id = tail call i32 @llvm.amdgcn.workitem.id.x()
225225
br label %bb1
226226
bb1:
227-
%load = call <4 x i16> @llvm.amdgcn.raw.atomic.ptr.buffer.load.v4i16(ptr addrspace(8) %ptr, i32 4, i32 0, i32 1)
227+
%load = call <4 x i16> @llvm.amdgcn.raw.ptr.atomic.buffer.load.v4i16(ptr addrspace(8) %ptr, i32 4, i32 0, i32 1)
228228
%shortened = shufflevector <4 x i16> %load, <4 x i16> poison, <2 x i32> <i32 0, i32 2>
229229
%bitcast = bitcast <2 x i16> %shortened to i32
230230
%cmp = icmp eq i32 %bitcast, %id
@@ -233,8 +233,8 @@ bb2:
233233
ret void
234234
}
235235

236-
define amdgpu_kernel void @raw_atomic_ptr_buffer_load_v4i32(ptr addrspace(8) %ptr) {
237-
; CHECK-LABEL: raw_atomic_ptr_buffer_load_v4i32:
236+
define amdgpu_kernel void @raw_ptr_atomic_buffer_load_v4i32(ptr addrspace(8) %ptr) {
237+
; CHECK-LABEL: raw_ptr_atomic_buffer_load_v4i32:
238238
; CHECK: ; %bb.0: ; %bb
239239
; CHECK-NEXT: s_load_b128 s[0:3], s[0:1], 0x24
240240
; CHECK-NEXT: s_mov_b32 s4, 0
@@ -254,16 +254,16 @@ bb:
254254
%id = tail call i32 @llvm.amdgcn.workitem.id.x()
255255
br label %bb1
256256
bb1:
257-
%load = call <4 x i32> @llvm.amdgcn.raw.atomic.ptr.buffer.load.v4i32(ptr addrspace(8) %ptr, i32 4, i32 0, i32 1)
257+
%load = call <4 x i32> @llvm.amdgcn.raw.ptr.atomic.buffer.load.v4i32(ptr addrspace(8) %ptr, i32 4, i32 0, i32 1)
258258
%extracted = extractelement <4 x i32> %load, i32 3
259259
%cmp = icmp eq i32 %extracted, %id
260260
br i1 %cmp, label %bb1, label %bb2
261261
bb2:
262262
ret void
263263
}
264264

265-
define amdgpu_kernel void @raw_atomic_ptr_buffer_load_ptr(ptr addrspace(8) %ptr) {
266-
; CHECK-LABEL: raw_atomic_ptr_buffer_load_ptr:
265+
define amdgpu_kernel void @raw_ptr_atomic_buffer_load_ptr(ptr addrspace(8) %ptr) {
266+
; CHECK-LABEL: raw_ptr_atomic_buffer_load_ptr:
267267
; CHECK: ; %bb.0: ; %bb
268268
; CHECK-NEXT: s_load_b128 s[0:3], s[0:1], 0x24
269269
; CHECK-NEXT: s_mov_b32 s4, 0
@@ -285,7 +285,7 @@ bb:
285285
%id = tail call i32 @llvm.amdgcn.workitem.id.x()
286286
br label %bb1
287287
bb1:
288-
%load = call ptr @llvm.amdgcn.raw.atomic.ptr.buffer.load.ptr(ptr addrspace(8) %ptr, i32 4, i32 0, i32 1)
288+
%load = call ptr @llvm.amdgcn.raw.ptr.atomic.buffer.load.ptr(ptr addrspace(8) %ptr, i32 4, i32 0, i32 1)
289289
%elem = load i32, ptr %load
290290
%cmp = icmp eq i32 %elem, %id
291291
br i1 %cmp, label %bb1, label %bb2
@@ -294,11 +294,11 @@ bb2:
294294
}
295295

296296
; Function Attrs: nounwind readonly
297-
declare i32 @llvm.amdgcn.raw.atomic.ptr.buffer.load.i32(ptr addrspace(8), i32, i32, i32 immarg)
298-
declare i64 @llvm.amdgcn.raw.atomic.ptr.buffer.load.i64(ptr addrspace(8), i32, i32, i32 immarg)
299-
declare <2 x i16> @llvm.amdgcn.raw.atomic.ptr.buffer.load.v2i16(ptr addrspace(8), i32, i32, i32 immarg)
300-
declare <4 x i16> @llvm.amdgcn.raw.atomic.ptr.buffer.load.v4i16(ptr addrspace(8), i32, i32, i32 immarg)
301-
declare <4 x i32> @llvm.amdgcn.raw.atomic.ptr.buffer.load.v4i32(ptr addrspace(8), i32, i32, i32 immarg)
302-
declare ptr @llvm.amdgcn.raw.atomic.ptr.buffer.load.ptr(ptr addrspace(8), i32, i32, i32 immarg)
297+
declare i32 @llvm.amdgcn.raw.ptr.atom.buffer.load.i32(ptr addrspace(8), i32, i32, i32 immarg)
298+
declare i64 @llvm.amdgcn.raw.ptr.atom.buffer.load.i64(ptr addrspace(8), i32, i32, i32 immarg)
299+
declare <2 x i16> @llvm.amdgcn.raw.ptr.atom.buffer.load.v2i16(ptr addrspace(8), i32, i32, i32 immarg)
300+
declare <4 x i16> @llvm.amdgcn.raw.ptr.atom.buffer.load.v4i16(ptr addrspace(8), i32, i32, i32 immarg)
301+
declare <4 x i32> @llvm.amdgcn.raw.ptr.atom.buffer.load.v4i32(ptr addrspace(8), i32, i32, i32 immarg)
302+
declare ptr @llvm.amdgcn.raw.ptr.atom.buffer.load.ptr(ptr addrspace(8), i32, i32, i32 immarg)
303303
declare i32 @llvm.amdgcn.raw.ptr.buffer.load.i32(ptr addrspace(8), i32, i32, i32 immarg)
304304
declare i32 @llvm.amdgcn.workitem.id.x()

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