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[Clang][RISCV] Add vle16 intrinsic for RVV bfloat16 type
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6 files changed

+191
-20
lines changed

6 files changed

+191
-20
lines changed

‎clang/include/clang/Basic/riscv_vector.td

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -683,6 +683,8 @@ defm vle8: RVVVLEBuiltin<["c"]>;
683683
defm vle16: RVVVLEBuiltin<["s"]>;
684684
let Name = "vle16_v", RequiredFeatures = ["ZvfhminOrZvfh"] in
685685
defm vle16_h: RVVVLEBuiltin<["x"]>;
686+
let Name = "vle16_v", RequiredFeatures = ["Zvfbfmin"] in
687+
defm vle16_b: RVVVLEBuiltin<["b"]>;
686688
defm vle32: RVVVLEBuiltin<["i","f"]>;
687689
defm vle64: RVVVLEBuiltin<["l","d"]>;
688690

‎clang/include/clang/Support/RISCVVIntrinsicUtils.h

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -485,7 +485,7 @@ class RVVIntrinsic {
485485

486486
// RVVRequire should be sync'ed with target features, but only
487487
// required features used in riscv_vector.td.
488-
using RVVRequireT = uint16_t;
488+
using RVVRequireT = uint32_t;
489489
enum RVVRequire : RVVRequireT {
490490
RVV_REQ_None = 0,
491491
RVV_REQ_RV64 = 1 << 0,
@@ -504,8 +504,9 @@ enum RVVRequire : RVVRequireT {
504504
RVV_REQ_Zvknhb = 1 << 13,
505505
RVV_REQ_Zvksed = 1 << 14,
506506
RVV_REQ_Zvksh = 1 << 15,
507+
RVV_REQ_Zvfbfmin = 1 << 16,
507508

508-
LLVM_MARK_AS_BITMASK_ENUM(RVV_REQ_Zvksh)
509+
LLVM_MARK_AS_BITMASK_ENUM(RVV_REQ_Zvfbfmin)
509510
};
510511

511512
// Raw RVV intrinsic info, used to expand later.

‎clang/lib/Sema/SemaRISCVVectorLookup.cpp

Lines changed: 10 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -288,6 +288,16 @@ void RISCVIntrinsicManagerImpl::ConstructRVVIntrinsics(
288288
}
289289
}
290290

291+
if (BaseType == BasicType::BFloat16) {
292+
if (Record.RequiredExtensions & RVV_REQ_Zvfbfmin) {
293+
if (!TI.hasFeature("experimental-zvfbfmin"))
294+
continue;
295+
} else {
296+
llvm_unreachable_internal(
297+
"Non-basic BFloat16 intrinsics are not implemented yet.");
298+
}
299+
}
300+
291301
// Expanded with different LMUL.
292302
for (int Log2LMUL = -3; Log2LMUL <= 3; Log2LMUL++) {
293303
if (!(Record.Log2LMULMask & (1 << (Log2LMUL + 3))))

‎clang/test/CodeGen/RISCV/bfloat16-intrinsics/non-policy/non-overloaded/vle16.c

Lines changed: 132 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,132 @@
1+
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 4
2+
// REQUIRES: riscv-registered-target
3+
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
4+
// RUN: -target-feature +experimental-zvfbfmin \
5+
// RUN: -target-feature +zvfh -disable-O0-optnone \
6+
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
7+
// RUN: FileCheck --check-prefix=CHECK-RV64 %s
8+
9+
#include <riscv_vector.h>
10+
11+
// CHECK-RV64-LABEL: define dso_local <vscale x 1 x bfloat> @test_vle16_v_bf16mf4(
12+
// CHECK-RV64-SAME: ptr noundef [[RS1:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0:[0-9]+]] {
13+
// CHECK-RV64-NEXT: entry:
14+
// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x bfloat> @llvm.riscv.vle.nxv1bf16.i64(<vscale x 1 x bfloat> poison, ptr [[RS1]], i64 [[VL]])
15+
// CHECK-RV64-NEXT: ret <vscale x 1 x bfloat> [[TMP0]]
16+
//
17+
vbfloat16mf4_t test_vle16_v_bf16mf4(const __bf16 *rs1, size_t vl) {
18+
return __riscv_vle16_v_bf16mf4(rs1, vl);
19+
}
20+
21+
// CHECK-RV64-LABEL: define dso_local <vscale x 2 x bfloat> @test_vle16_v_bf16mf2(
22+
// CHECK-RV64-SAME: ptr noundef [[RS1:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
23+
// CHECK-RV64-NEXT: entry:
24+
// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x bfloat> @llvm.riscv.vle.nxv2bf16.i64(<vscale x 2 x bfloat> poison, ptr [[RS1]], i64 [[VL]])
25+
// CHECK-RV64-NEXT: ret <vscale x 2 x bfloat> [[TMP0]]
26+
//
27+
vbfloat16mf2_t test_vle16_v_bf16mf2(const __bf16 *rs1, size_t vl) {
28+
return __riscv_vle16_v_bf16mf2(rs1, vl);
29+
}
30+
31+
// CHECK-RV64-LABEL: define dso_local <vscale x 4 x bfloat> @test_vle16_v_bf16m1(
32+
// CHECK-RV64-SAME: ptr noundef [[RS1:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
33+
// CHECK-RV64-NEXT: entry:
34+
// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x bfloat> @llvm.riscv.vle.nxv4bf16.i64(<vscale x 4 x bfloat> poison, ptr [[RS1]], i64 [[VL]])
35+
// CHECK-RV64-NEXT: ret <vscale x 4 x bfloat> [[TMP0]]
36+
//
37+
vbfloat16m1_t test_vle16_v_bf16m1(const __bf16 *rs1, size_t vl) {
38+
return __riscv_vle16_v_bf16m1(rs1, vl);
39+
}
40+
41+
// CHECK-RV64-LABEL: define dso_local <vscale x 8 x bfloat> @test_vle16_v_bf16m2(
42+
// CHECK-RV64-SAME: ptr noundef [[RS1:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
43+
// CHECK-RV64-NEXT: entry:
44+
// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x bfloat> @llvm.riscv.vle.nxv8bf16.i64(<vscale x 8 x bfloat> poison, ptr [[RS1]], i64 [[VL]])
45+
// CHECK-RV64-NEXT: ret <vscale x 8 x bfloat> [[TMP0]]
46+
//
47+
vbfloat16m2_t test_vle16_v_bf16m2(const __bf16 *rs1, size_t vl) {
48+
return __riscv_vle16_v_bf16m2(rs1, vl);
49+
}
50+
51+
// CHECK-RV64-LABEL: define dso_local <vscale x 16 x bfloat> @test_vle16_v_bf16m4(
52+
// CHECK-RV64-SAME: ptr noundef [[RS1:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
53+
// CHECK-RV64-NEXT: entry:
54+
// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 16 x bfloat> @llvm.riscv.vle.nxv16bf16.i64(<vscale x 16 x bfloat> poison, ptr [[RS1]], i64 [[VL]])
55+
// CHECK-RV64-NEXT: ret <vscale x 16 x bfloat> [[TMP0]]
56+
//
57+
vbfloat16m4_t test_vle16_v_bf16m4(const __bf16 *rs1, size_t vl) {
58+
return __riscv_vle16_v_bf16m4(rs1, vl);
59+
}
60+
61+
// CHECK-RV64-LABEL: define dso_local <vscale x 32 x bfloat> @test_vle16_v_bf16m8(
62+
// CHECK-RV64-SAME: ptr noundef [[RS1:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
63+
// CHECK-RV64-NEXT: entry:
64+
// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 32 x bfloat> @llvm.riscv.vle.nxv32bf16.i64(<vscale x 32 x bfloat> poison, ptr [[RS1]], i64 [[VL]])
65+
// CHECK-RV64-NEXT: ret <vscale x 32 x bfloat> [[TMP0]]
66+
//
67+
vbfloat16m8_t test_vle16_v_bf16m8(const __bf16 *rs1, size_t vl) {
68+
return __riscv_vle16_v_bf16m8(rs1, vl);
69+
}
70+
71+
// CHECK-RV64-LABEL: define dso_local <vscale x 1 x bfloat> @test_vle16_v_bf16mf4_m(
72+
// CHECK-RV64-SAME: <vscale x 1 x i1> [[VM:%.*]], ptr noundef [[RS1:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
73+
// CHECK-RV64-NEXT: entry:
74+
// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x bfloat> @llvm.riscv.vle.mask.nxv1bf16.i64(<vscale x 1 x bfloat> poison, ptr [[RS1]], <vscale x 1 x i1> [[VM]], i64 [[VL]], i64 3)
75+
// CHECK-RV64-NEXT: ret <vscale x 1 x bfloat> [[TMP0]]
76+
//
77+
vbfloat16mf4_t test_vle16_v_bf16mf4_m(vbool64_t vm, const __bf16 *rs1,
78+
size_t vl) {
79+
return __riscv_vle16_v_bf16mf4_m(vm, rs1, vl);
80+
}
81+
82+
// CHECK-RV64-LABEL: define dso_local <vscale x 2 x bfloat> @test_vle16_v_bf16mf2_m(
83+
// CHECK-RV64-SAME: <vscale x 2 x i1> [[VM:%.*]], ptr noundef [[RS1:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
84+
// CHECK-RV64-NEXT: entry:
85+
// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x bfloat> @llvm.riscv.vle.mask.nxv2bf16.i64(<vscale x 2 x bfloat> poison, ptr [[RS1]], <vscale x 2 x i1> [[VM]], i64 [[VL]], i64 3)
86+
// CHECK-RV64-NEXT: ret <vscale x 2 x bfloat> [[TMP0]]
87+
//
88+
vbfloat16mf2_t test_vle16_v_bf16mf2_m(vbool32_t vm, const __bf16 *rs1,
89+
size_t vl) {
90+
return __riscv_vle16_v_bf16mf2_m(vm, rs1, vl);
91+
}
92+
93+
// CHECK-RV64-LABEL: define dso_local <vscale x 4 x bfloat> @test_vle16_v_bf16m1_m(
94+
// CHECK-RV64-SAME: <vscale x 4 x i1> [[VM:%.*]], ptr noundef [[RS1:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
95+
// CHECK-RV64-NEXT: entry:
96+
// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x bfloat> @llvm.riscv.vle.mask.nxv4bf16.i64(<vscale x 4 x bfloat> poison, ptr [[RS1]], <vscale x 4 x i1> [[VM]], i64 [[VL]], i64 3)
97+
// CHECK-RV64-NEXT: ret <vscale x 4 x bfloat> [[TMP0]]
98+
//
99+
vbfloat16m1_t test_vle16_v_bf16m1_m(vbool16_t vm, const __bf16 *rs1,
100+
size_t vl) {
101+
return __riscv_vle16_v_bf16m1_m(vm, rs1, vl);
102+
}
103+
104+
// CHECK-RV64-LABEL: define dso_local <vscale x 8 x bfloat> @test_vle16_v_bf16m2_m(
105+
// CHECK-RV64-SAME: <vscale x 8 x i1> [[VM:%.*]], ptr noundef [[RS1:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
106+
// CHECK-RV64-NEXT: entry:
107+
// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x bfloat> @llvm.riscv.vle.mask.nxv8bf16.i64(<vscale x 8 x bfloat> poison, ptr [[RS1]], <vscale x 8 x i1> [[VM]], i64 [[VL]], i64 3)
108+
// CHECK-RV64-NEXT: ret <vscale x 8 x bfloat> [[TMP0]]
109+
//
110+
vbfloat16m2_t test_vle16_v_bf16m2_m(vbool8_t vm, const __bf16 *rs1, size_t vl) {
111+
return __riscv_vle16_v_bf16m2_m(vm, rs1, vl);
112+
}
113+
114+
// CHECK-RV64-LABEL: define dso_local <vscale x 16 x bfloat> @test_vle16_v_bf16m4_m(
115+
// CHECK-RV64-SAME: <vscale x 16 x i1> [[VM:%.*]], ptr noundef [[RS1:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
116+
// CHECK-RV64-NEXT: entry:
117+
// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 16 x bfloat> @llvm.riscv.vle.mask.nxv16bf16.i64(<vscale x 16 x bfloat> poison, ptr [[RS1]], <vscale x 16 x i1> [[VM]], i64 [[VL]], i64 3)
118+
// CHECK-RV64-NEXT: ret <vscale x 16 x bfloat> [[TMP0]]
119+
//
120+
vbfloat16m4_t test_vle16_v_bf16m4_m(vbool4_t vm, const __bf16 *rs1, size_t vl) {
121+
return __riscv_vle16_v_bf16m4_m(vm, rs1, vl);
122+
}
123+
124+
// CHECK-RV64-LABEL: define dso_local <vscale x 32 x bfloat> @test_vle16_v_bf16m8_m(
125+
// CHECK-RV64-SAME: <vscale x 32 x i1> [[VM:%.*]], ptr noundef [[RS1:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
126+
// CHECK-RV64-NEXT: entry:
127+
// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 32 x bfloat> @llvm.riscv.vle.mask.nxv32bf16.i64(<vscale x 32 x bfloat> poison, ptr [[RS1]], <vscale x 32 x i1> [[VM]], i64 [[VL]], i64 3)
128+
// CHECK-RV64-NEXT: ret <vscale x 32 x bfloat> [[TMP0]]
129+
//
130+
vbfloat16m8_t test_vle16_v_bf16m8_m(vbool2_t vm, const __bf16 *rs1, size_t vl) {
131+
return __riscv_vle16_v_bf16m8_m(vm, rs1, vl);
132+
}

‎clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/zvfbfmin-error.c

Lines changed: 24 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,24 @@
1+
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
2+
// REQUIRES: riscv-registered-target
3+
// RUN: %clang_cc1 -triple riscv64 -target-feature +v \
4+
// RUN: -target-feature +experimental-zvfbfmin -disable-O0-optnone \
5+
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
6+
// RUN: FileCheck --check-prefix=CHECK-ZVFBFMIN %s
7+
8+
// RUN: not %clang_cc1 -triple riscv64 -target-feature +v \
9+
// RUN: -target-feature +zvfhmin -emit-llvm-only %s 2>&1 | \
10+
// RUN: FileCheck %s --check-prefix=CHECK-ZVFBFMIN-ERR
11+
12+
#include <riscv_vector.h>
13+
14+
// CHECK-ZVFBFMIN-LABEL: @test_vle16_v_bf16mf4(
15+
// CHECK-ZVFBFMIN-NEXT: entry:
16+
// CHECK-ZVFBFMIN-NEXT: [[TMP0:%.*]] = call <vscale x 1 x bfloat> @llvm.riscv.vle.nxv1bf16.i64(<vscale x 1 x bfloat> poison, ptr [[RS1:%.*]], i64 [[VL:%.*]])
17+
// CHECK-ZVFBFMIN-NEXT: ret <vscale x 1 x bfloat> [[TMP0]]
18+
//
19+
20+
// CHECK-ZVFBFMIN-ERR: error: call to undeclared function '__riscv_vle16_v_bf16mf4'
21+
22+
vbfloat16mf4_t test_vle16_v_bf16mf4(const __bf16 *rs1, size_t vl) {
23+
return __riscv_vle16_v_bf16mf4(rs1, vl);
24+
}

‎clang/utils/TableGen/RISCVVEmitter.cpp

Lines changed: 20 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -656,24 +656,26 @@ void RVVEmitter::createRVVIntrinsics(
656656

657657
SR.RequiredExtensions = 0;
658658
for (auto RequiredFeature : RequiredFeatures) {
659-
RVVRequire RequireExt = StringSwitch<RVVRequire>(RequiredFeature)
660-
.Case("RV64", RVV_REQ_RV64)
661-
.Case("ZvfhminOrZvfh", RVV_REQ_ZvfhminOrZvfh)
662-
.Case("Xsfvcp", RVV_REQ_Xsfvcp)
663-
.Case("Xsfvfnrclipxfqf", RVV_REQ_Xsfvfnrclipxfqf)
664-
.Case("Xsfvfwmaccqqq", RVV_REQ_Xsfvfwmaccqqq)
665-
.Case("Xsfvqmaccdod", RVV_REQ_Xsfvqmaccdod)
666-
.Case("Xsfvqmaccqoq", RVV_REQ_Xsfvqmaccqoq)
667-
.Case("Zvbb", RVV_REQ_Zvbb)
668-
.Case("Zvbc", RVV_REQ_Zvbc)
669-
.Case("Zvkb", RVV_REQ_Zvkb)
670-
.Case("Zvkg", RVV_REQ_Zvkg)
671-
.Case("Zvkned", RVV_REQ_Zvkned)
672-
.Case("Zvknha", RVV_REQ_Zvknha)
673-
.Case("Zvknhb", RVV_REQ_Zvknhb)
674-
.Case("Zvksed", RVV_REQ_Zvksed)
675-
.Case("Zvksh", RVV_REQ_Zvksh)
676-
.Default(RVV_REQ_None);
659+
RVVRequire RequireExt =
660+
StringSwitch<RVVRequire>(RequiredFeature)
661+
.Case("RV64", RVV_REQ_RV64)
662+
.Case("ZvfhminOrZvfh", RVV_REQ_ZvfhminOrZvfh)
663+
.Case("Xsfvcp", RVV_REQ_Xsfvcp)
664+
.Case("Xsfvfnrclipxfqf", RVV_REQ_Xsfvfnrclipxfqf)
665+
.Case("Xsfvfwmaccqqq", RVV_REQ_Xsfvfwmaccqqq)
666+
.Case("Xsfvqmaccdod", RVV_REQ_Xsfvqmaccdod)
667+
.Case("Xsfvqmaccqoq", RVV_REQ_Xsfvqmaccqoq)
668+
.Case("Zvbb", RVV_REQ_Zvbb)
669+
.Case("Zvbc", RVV_REQ_Zvbc)
670+
.Case("Zvkb", RVV_REQ_Zvkb)
671+
.Case("Zvkg", RVV_REQ_Zvkg)
672+
.Case("Zvkned", RVV_REQ_Zvkned)
673+
.Case("Zvknha", RVV_REQ_Zvknha)
674+
.Case("Zvknhb", RVV_REQ_Zvknhb)
675+
.Case("Zvksed", RVV_REQ_Zvksed)
676+
.Case("Zvksh", RVV_REQ_Zvksh)
677+
.Case("Zvfbfmin", RVV_REQ_Zvfbfmin)
678+
.Default(RVV_REQ_None);
677679
assert(RequireExt != RVV_REQ_None && "Unrecognized required feature?");
678680
SR.RequiredExtensions |= RequireExt;
679681
}

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