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[VPlan] Check captured operand when simplifying redundant OR.
Follow-up to 0f607f to actually use the captured operand X instead of Y.
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-50
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3 files changed

+25
-50
lines changed

‎llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -994,9 +994,10 @@ static void simplifyRecipe(VPRecipeBase &R, VPTypeAnalysis &TypeInfo) {
994994
return;
995995
}
996996

997+
// OR x, 1 -> 1.
997998
if (match(&R, m_c_BinaryOr(m_VPValue(X), m_AllOnes()))) {
998999
R.getVPSingleValue()->replaceAllUsesWith(
999-
R.getOperand(0) == Y ? R.getOperand(1) : R.getOperand(0));
1000+
R.getOperand(0) == X ? R.getOperand(1) : R.getOperand(0));
10001001
R.eraseFromParent();
10011002
return;
10021003
}

‎llvm/test/Transforms/LoopVectorize/SystemZ/pr47665.ll

Lines changed: 16 additions & 41 deletions
Original file line numberDiff line numberDiff line change
@@ -7,111 +7,86 @@ define void @test(ptr %p, i40 %a) {
77
; CHECK-NEXT: entry:
88
; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
99
; CHECK: vector.ph:
10-
; CHECK-NEXT: [[BROADCAST_SPLATINSERT1:%.*]] = insertelement <16 x i40> poison, i40 [[A]], i64 0
11-
; CHECK-NEXT: [[BROADCAST_SPLAT2:%.*]] = shufflevector <16 x i40> [[BROADCAST_SPLATINSERT1]], <16 x i40> poison, <16 x i32> zeroinitializer
12-
; CHECK-NEXT: [[TMP1:%.*]] = shl <16 x i40> [[BROADCAST_SPLAT2]], splat (i40 24)
13-
; CHECK-NEXT: [[TMP2:%.*]] = ashr <16 x i40> [[TMP1]], splat (i40 28)
14-
; CHECK-NEXT: [[TMP3:%.*]] = trunc <16 x i40> [[TMP2]] to <16 x i32>
15-
; CHECK-NEXT: [[TMP4:%.*]] = trunc <16 x i32> [[TMP3]] to <16 x i1>
16-
; CHECK-NEXT: [[TMP5:%.*]] = icmp eq <16 x i1> [[TMP4]], zeroinitializer
17-
; CHECK-NEXT: [[TMP6:%.*]] = icmp ult <16 x i1> zeroinitializer, [[TMP5]]
18-
; CHECK-NEXT: [[TMP8:%.*]] = icmp sgt <16 x i1> [[TMP6]], zeroinitializer
1910
; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]
2011
; CHECK: vector.body:
2112
; CHECK-NEXT: br i1 true, label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]]
2213
; CHECK: pred.store.if:
23-
; CHECK-NEXT: [[TMP10:%.*]] = extractelement <16 x i1> [[TMP8]], i32 0
24-
; CHECK-NEXT: store i1 [[TMP10]], ptr [[P]], align 1
14+
; CHECK-NEXT: store i1 false, ptr [[P]], align 1
2515
; CHECK-NEXT: br label [[PRED_STORE_CONTINUE]]
2616
; CHECK: pred.store.continue:
2717
; CHECK-NEXT: br i1 true, label [[PRED_STORE_IF1:%.*]], label [[PRED_STORE_CONTINUE2:%.*]]
2818
; CHECK: pred.store.if1:
29-
; CHECK-NEXT: [[TMP9:%.*]] = extractelement <16 x i1> [[TMP8]], i32 1
30-
; CHECK-NEXT: store i1 [[TMP9]], ptr [[P]], align 1
19+
; CHECK-NEXT: store i1 false, ptr [[P]], align 1
3120
; CHECK-NEXT: br label [[PRED_STORE_CONTINUE2]]
3221
; CHECK: pred.store.continue2:
3322
; CHECK-NEXT: br i1 true, label [[PRED_STORE_IF3:%.*]], label [[PRED_STORE_CONTINUE4:%.*]]
3423
; CHECK: pred.store.if3:
35-
; CHECK-NEXT: [[TMP12:%.*]] = extractelement <16 x i1> [[TMP8]], i32 2
36-
; CHECK-NEXT: store i1 [[TMP12]], ptr [[P]], align 1
24+
; CHECK-NEXT: store i1 false, ptr [[P]], align 1
3725
; CHECK-NEXT: br label [[PRED_STORE_CONTINUE4]]
3826
; CHECK: pred.store.continue4:
3927
; CHECK-NEXT: br i1 true, label [[PRED_STORE_IF5:%.*]], label [[PRED_STORE_CONTINUE6:%.*]]
4028
; CHECK: pred.store.if5:
41-
; CHECK-NEXT: [[TMP14:%.*]] = extractelement <16 x i1> [[TMP8]], i32 3
42-
; CHECK-NEXT: store i1 [[TMP14]], ptr [[P]], align 1
29+
; CHECK-NEXT: store i1 false, ptr [[P]], align 1
4330
; CHECK-NEXT: br label [[PRED_STORE_CONTINUE6]]
4431
; CHECK: pred.store.continue6:
4532
; CHECK-NEXT: br i1 true, label [[PRED_STORE_IF7:%.*]], label [[PRED_STORE_CONTINUE8:%.*]]
4633
; CHECK: pred.store.if7:
47-
; CHECK-NEXT: [[TMP16:%.*]] = extractelement <16 x i1> [[TMP8]], i32 4
48-
; CHECK-NEXT: store i1 [[TMP16]], ptr [[P]], align 1
34+
; CHECK-NEXT: store i1 false, ptr [[P]], align 1
4935
; CHECK-NEXT: br label [[PRED_STORE_CONTINUE8]]
5036
; CHECK: pred.store.continue8:
5137
; CHECK-NEXT: br i1 true, label [[PRED_STORE_IF9:%.*]], label [[PRED_STORE_CONTINUE10:%.*]]
5238
; CHECK: pred.store.if9:
53-
; CHECK-NEXT: [[TMP18:%.*]] = extractelement <16 x i1> [[TMP8]], i32 5
54-
; CHECK-NEXT: store i1 [[TMP18]], ptr [[P]], align 1
39+
; CHECK-NEXT: store i1 false, ptr [[P]], align 1
5540
; CHECK-NEXT: br label [[PRED_STORE_CONTINUE10]]
5641
; CHECK: pred.store.continue10:
5742
; CHECK-NEXT: br i1 true, label [[PRED_STORE_IF11:%.*]], label [[PRED_STORE_CONTINUE12:%.*]]
5843
; CHECK: pred.store.if11:
59-
; CHECK-NEXT: [[TMP20:%.*]] = extractelement <16 x i1> [[TMP8]], i32 6
60-
; CHECK-NEXT: store i1 [[TMP20]], ptr [[P]], align 1
44+
; CHECK-NEXT: store i1 false, ptr [[P]], align 1
6145
; CHECK-NEXT: br label [[PRED_STORE_CONTINUE12]]
6246
; CHECK: pred.store.continue12:
6347
; CHECK-NEXT: br i1 true, label [[PRED_STORE_IF13:%.*]], label [[PRED_STORE_CONTINUE14:%.*]]
6448
; CHECK: pred.store.if13:
65-
; CHECK-NEXT: [[TMP22:%.*]] = extractelement <16 x i1> [[TMP8]], i32 7
66-
; CHECK-NEXT: store i1 [[TMP22]], ptr [[P]], align 1
49+
; CHECK-NEXT: store i1 false, ptr [[P]], align 1
6750
; CHECK-NEXT: br label [[PRED_STORE_CONTINUE14]]
6851
; CHECK: pred.store.continue14:
6952
; CHECK-NEXT: br i1 true, label [[PRED_STORE_IF15:%.*]], label [[PRED_STORE_CONTINUE16:%.*]]
7053
; CHECK: pred.store.if15:
71-
; CHECK-NEXT: [[TMP24:%.*]] = extractelement <16 x i1> [[TMP8]], i32 8
72-
; CHECK-NEXT: store i1 [[TMP24]], ptr [[P]], align 1
54+
; CHECK-NEXT: store i1 false, ptr [[P]], align 1
7355
; CHECK-NEXT: br label [[PRED_STORE_CONTINUE16]]
7456
; CHECK: pred.store.continue16:
7557
; CHECK-NEXT: br i1 true, label [[PRED_STORE_IF17:%.*]], label [[PRED_STORE_CONTINUE18:%.*]]
7658
; CHECK: pred.store.if17:
77-
; CHECK-NEXT: [[TMP26:%.*]] = extractelement <16 x i1> [[TMP8]], i32 9
78-
; CHECK-NEXT: store i1 [[TMP26]], ptr [[P]], align 1
59+
; CHECK-NEXT: store i1 false, ptr [[P]], align 1
7960
; CHECK-NEXT: br label [[PRED_STORE_CONTINUE18]]
8061
; CHECK: pred.store.continue18:
8162
; CHECK-NEXT: br i1 false, label [[PRED_STORE_IF19:%.*]], label [[PRED_STORE_CONTINUE20:%.*]]
8263
; CHECK: pred.store.if19:
83-
; CHECK-NEXT: [[TMP28:%.*]] = extractelement <16 x i1> [[TMP8]], i32 10
84-
; CHECK-NEXT: store i1 [[TMP28]], ptr [[P]], align 1
64+
; CHECK-NEXT: store i1 false, ptr [[P]], align 1
8565
; CHECK-NEXT: br label [[PRED_STORE_CONTINUE20]]
8666
; CHECK: pred.store.continue20:
8767
; CHECK-NEXT: br i1 false, label [[PRED_STORE_IF21:%.*]], label [[PRED_STORE_CONTINUE22:%.*]]
8868
; CHECK: pred.store.if21:
89-
; CHECK-NEXT: [[TMP30:%.*]] = extractelement <16 x i1> [[TMP8]], i32 11
90-
; CHECK-NEXT: store i1 [[TMP30]], ptr [[P]], align 1
69+
; CHECK-NEXT: store i1 false, ptr [[P]], align 1
9170
; CHECK-NEXT: br label [[PRED_STORE_CONTINUE22]]
9271
; CHECK: pred.store.continue22:
9372
; CHECK-NEXT: br i1 false, label [[PRED_STORE_IF23:%.*]], label [[PRED_STORE_CONTINUE24:%.*]]
9473
; CHECK: pred.store.if23:
95-
; CHECK-NEXT: [[TMP32:%.*]] = extractelement <16 x i1> [[TMP8]], i32 12
96-
; CHECK-NEXT: store i1 [[TMP32]], ptr [[P]], align 1
74+
; CHECK-NEXT: store i1 false, ptr [[P]], align 1
9775
; CHECK-NEXT: br label [[PRED_STORE_CONTINUE24]]
9876
; CHECK: pred.store.continue24:
9977
; CHECK-NEXT: br i1 false, label [[PRED_STORE_IF25:%.*]], label [[PRED_STORE_CONTINUE26:%.*]]
10078
; CHECK: pred.store.if25:
101-
; CHECK-NEXT: [[TMP34:%.*]] = extractelement <16 x i1> [[TMP8]], i32 13
102-
; CHECK-NEXT: store i1 [[TMP34]], ptr [[P]], align 1
79+
; CHECK-NEXT: store i1 false, ptr [[P]], align 1
10380
; CHECK-NEXT: br label [[PRED_STORE_CONTINUE26]]
10481
; CHECK: pred.store.continue26:
10582
; CHECK-NEXT: br i1 false, label [[PRED_STORE_IF27:%.*]], label [[PRED_STORE_CONTINUE28:%.*]]
10683
; CHECK: pred.store.if27:
107-
; CHECK-NEXT: [[TMP36:%.*]] = extractelement <16 x i1> [[TMP8]], i32 14
108-
; CHECK-NEXT: store i1 [[TMP36]], ptr [[P]], align 1
84+
; CHECK-NEXT: store i1 false, ptr [[P]], align 1
10985
; CHECK-NEXT: br label [[PRED_STORE_CONTINUE28]]
11086
; CHECK: pred.store.continue28:
11187
; CHECK-NEXT: br i1 false, label [[PRED_STORE_IF29:%.*]], label [[PRED_STORE_CONTINUE30:%.*]]
11288
; CHECK: pred.store.if29:
113-
; CHECK-NEXT: [[TMP38:%.*]] = extractelement <16 x i1> [[TMP8]], i32 15
114-
; CHECK-NEXT: store i1 [[TMP38]], ptr [[P]], align 1
89+
; CHECK-NEXT: store i1 false, ptr [[P]], align 1
11590
; CHECK-NEXT: br label [[PRED_STORE_CONTINUE30]]
11691
; CHECK: pred.store.continue30:
11792
; CHECK-NEXT: br label [[MIDDLE_BLOCK:%.*]]

‎llvm/test/Transforms/LoopVectorize/X86/constant-fold.ll

Lines changed: 7 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -67,17 +67,16 @@ define void @redundant_or_1(ptr %dst, i1 %c.0, i1 %c.1) {
6767
; CHECK: vector.ph:
6868
; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i1> poison, i1 [[C_0:%.*]], i64 0
6969
; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i1> [[BROADCAST_SPLATINSERT]], <4 x i1> poison, <4 x i32> zeroinitializer
70-
; CHECK-NEXT: [[TMP0:%.*]] = xor <4 x i1> [[BROADCAST_SPLAT]], splat (i1 true)
7170
; CHECK-NEXT: [[BROADCAST_SPLATINSERT1:%.*]] = insertelement <4 x i1> poison, i1 [[C_1:%.*]], i64 0
7271
; CHECK-NEXT: [[BROADCAST_SPLAT2:%.*]] = shufflevector <4 x i1> [[BROADCAST_SPLATINSERT1]], <4 x i1> poison, <4 x i32> zeroinitializer
72+
; CHECK-NEXT: [[TMP0:%.*]] = xor <4 x i1> [[BROADCAST_SPLAT2]], splat (i1 true)
73+
; CHECK-NEXT: [[TMP4:%.*]] = select i1 true, <4 x i1> [[BROADCAST_SPLAT]], <4 x i1> zeroinitializer
7374
; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]
7475
; CHECK: vector.body:
7576
; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[PRED_STORE_CONTINUE8:%.*]] ]
76-
; CHECK-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[PRED_STORE_CONTINUE8]] ]
77-
; CHECK-NEXT: [[TMP1:%.*]] = icmp ule <4 x i32> [[VEC_IND]], splat (i32 2)
77+
; CHECK-NEXT: [[VEC_IND:%.*]] = phi <4 x i8> [ <i8 0, i8 1, i8 2, i8 3>, [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[PRED_STORE_CONTINUE8]] ]
78+
; CHECK-NEXT: [[TMP1:%.*]] = icmp ule <4 x i8> [[VEC_IND]], splat (i8 2)
7879
; CHECK-NEXT: [[TMP2:%.*]] = select <4 x i1> [[TMP1]], <4 x i1> [[TMP0]], <4 x i1> zeroinitializer
79-
; CHECK-NEXT: [[TMP3:%.*]] = icmp eq <4 x i32> [[VEC_IND]], splat (i32 2)
80-
; CHECK-NEXT: [[TMP4:%.*]] = select <4 x i1> [[TMP3]], <4 x i1> [[BROADCAST_SPLAT2]], <4 x i1> zeroinitializer
8180
; CHECK-NEXT: [[TMP5:%.*]] = select <4 x i1> [[TMP2]], <4 x i1> [[TMP4]], <4 x i1> zeroinitializer
8281
; CHECK-NEXT: [[TMP6:%.*]] = extractelement <4 x i1> [[TMP5]], i32 0
8382
; CHECK-NEXT: br i1 [[TMP6]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]]
@@ -111,7 +110,7 @@ define void @redundant_or_1(ptr %dst, i1 %c.0, i1 %c.1) {
111110
; CHECK-NEXT: store i32 0, ptr [[TMP17]], align 4
112111
; CHECK-NEXT: br label [[PRED_STORE_CONTINUE8]]
113112
; CHECK: pred.store.continue8:
114-
; CHECK-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
113+
; CHECK-NEXT: [[VEC_IND_NEXT]] = add <4 x i8> [[VEC_IND]], splat (i8 4)
115114
; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 4
116115
; CHECK-NEXT: br i1 true, label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP3:![0-9]+]]
117116
; CHECK: middle.block:
@@ -121,11 +120,11 @@ define void @redundant_or_1(ptr %dst, i1 %c.0, i1 %c.1) {
121120
; CHECK-NEXT: br label [[LOOP_HEADER:%.*]]
122121
; CHECK: loop.header:
123122
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ]
124-
; CHECK-NEXT: br i1 [[C_0]], label [[LOOP_LATCH]], label [[THEN_1:%.*]]
123+
; CHECK-NEXT: br i1 [[C_1]], label [[LOOP_LATCH]], label [[THEN_1:%.*]]
125124
; CHECK: then.1:
126125
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[IV]], 2
127126
; CHECK-NEXT: [[OR:%.*]] = or i1 [[CMP]], true
128-
; CHECK-NEXT: [[COND:%.*]] = select i1 [[OR]], i1 [[C_1]], i1 false
127+
; CHECK-NEXT: [[COND:%.*]] = select i1 [[OR]], i1 [[C_0]], i1 false
129128
; CHECK-NEXT: br i1 [[COND]], label [[THEN_2:%.*]], label [[LOOP_LATCH]]
130129
; CHECK: then.2:
131130
; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds i32, ptr [[DST]], i32 [[IV]]

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