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Commit 55963c4

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fix getSource for splat
1 parent 69ddef7 commit 55963c4

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2 files changed

+2
-12
lines changed

2 files changed

+2
-12
lines changed

llvm/lib/Target/RISCV/RISCVISelLowering.cpp

Lines changed: 1 addition & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -13598,17 +13598,6 @@ struct NodeExtensionHelper {
1359813598
case RISCVISD::VZEXT_VL:
1359913599
case RISCVISD::FP_EXTEND_VL:
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return OrigOperand.getOperand(0);
13601-
case ISD::SPLAT_VECTOR: {
13602-
SDValue Op = OrigOperand.getOperand(0);
13603-
unsigned Opc = Op.getOpcode();
13604-
if (SupportsSExt && Opc == ISD::SIGN_EXTEND_INREG)
13605-
return Op.getOperand(0);
13606-
13607-
if (SupportsZExt && Opc == ISD::AND)
13608-
return Op.getOperand(0);
13609-
13610-
return Op;
13611-
}
1361213601
default:
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return OrigOperand;
1361413603
}
@@ -13662,7 +13651,7 @@ struct NodeExtensionHelper {
1366213651
case RISCVISD::FP_EXTEND_VL:
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return DAG.getNode(ExtOpc, DL, NarrowVT, Source, Mask, VL);
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case ISD::SPLAT_VECTOR:
13665-
return DAG.getSplat(NarrowVT, DL, Source);
13654+
return DAG.getSplat(NarrowVT, DL, Source.getOperand(0));
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case RISCVISD::VMV_V_X_VL:
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return DAG.getNode(RISCVISD::VMV_V_X_VL, DL, NarrowVT,
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DAG.getUNDEF(NarrowVT), Source.getOperand(1), VL);

llvm/test/CodeGen/RISCV/rvv/vwadd-sdnode.ll

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1484,6 +1484,7 @@ define <vscale x 8 x i64> @vwadd_vx_splat_zext(<vscale x 8 x i32> %va, i32 %b) {
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;
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; RV64-LABEL: vwadd_vx_splat_zext:
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; RV64: # %bb.0:
1487+
; RV64-NEXT: andi a0, a0, -1
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; RV64-NEXT: vsetvli a1, zero, e32, m4, ta, ma
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; RV64-NEXT: vwaddu.vx v16, v8, a0
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; RV64-NEXT: vmv8r.v v8, v16

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