@@ -217,7 +217,7 @@ class SIMemOpInfo final {
217
217
218
218
class SIMemOpAccess final {
219
219
private:
220
- AMDGPUMachineModuleInfo *MMI = nullptr ;
220
+ const AMDGPUMachineModuleInfo *MMI = nullptr ;
221
221
222
222
// / Reports unsupported message \p Msg for \p MI to LLVM context.
223
223
void reportUnsupported (const MachineBasicBlock::iterator &MI,
@@ -241,7 +241,7 @@ class SIMemOpAccess final {
241
241
public:
242
242
// / Construct class to support accessing the machine memory operands
243
243
// / of instructions in the machine function \p MF.
244
- SIMemOpAccess (MachineFunction &MF );
244
+ SIMemOpAccess (const AMDGPUMachineModuleInfo &MMI );
245
245
246
246
// / \returns Load info if \p MI is a load operation, "std::nullopt" otherwise.
247
247
std::optional<SIMemOpInfo>
@@ -694,6 +694,8 @@ class SIMemoryLegalizer final : public MachineFunctionPass {
694
694
SIMemoryLegalizer () : MachineFunctionPass(ID) {}
695
695
696
696
void getAnalysisUsage (AnalysisUsage &AU) const override {
697
+ AU.addRequired <MachineModuleInfoWrapperPass>();
698
+ AU.addPreserved <MachineModuleInfoWrapperPass>();
697
699
AU.setPreservesCFG ();
698
700
MachineFunctionPass::getAnalysisUsage (AU);
699
701
}
@@ -806,9 +808,8 @@ SIAtomicAddrSpace SIMemOpAccess::toSIAtomicAddrSpace(unsigned AS) const {
806
808
return SIAtomicAddrSpace::OTHER;
807
809
}
808
810
809
- SIMemOpAccess::SIMemOpAccess (MachineFunction &MF) {
810
- MMI = &MF.getMMI ().getObjFileInfo <AMDGPUMachineModuleInfo>();
811
- }
811
+ SIMemOpAccess::SIMemOpAccess (const AMDGPUMachineModuleInfo &MMI_)
812
+ : MMI(&MMI_) {}
812
813
813
814
std::optional<SIMemOpInfo> SIMemOpAccess::constructFromMIWithMMO (
814
815
const MachineBasicBlock::iterator &MI) const {
@@ -2802,7 +2803,10 @@ bool SIMemoryLegalizer::expandAtomicCmpxchgOrRmw(const SIMemOpInfo &MOI,
2802
2803
bool SIMemoryLegalizer::runOnMachineFunction (MachineFunction &MF) {
2803
2804
bool Changed = false ;
2804
2805
2805
- SIMemOpAccess MOA (MF);
2806
+ const MachineModuleInfo &MMI =
2807
+ getAnalysis<MachineModuleInfoWrapperPass>().getMMI ();
2808
+
2809
+ SIMemOpAccess MOA (MMI.getObjFileInfo <AMDGPUMachineModuleInfo>());
2806
2810
CC = SICacheControl::create (MF.getSubtarget <GCNSubtarget>());
2807
2811
2808
2812
for (auto &MBB : MF) {
0 commit comments