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Revert "Revert "[Clang] Generate test checks (NFC)""
This reverts commit 3bb7ecc. The revert breaks AMDGPU backend tests (which I didn't have enabled locally), and I don't want to risk more breakages before the weekend, so just restore things as they were.
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// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 3
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// RUN: %clang -target powerpc-linux-gnu -emit-llvm -S -mabi=ibmlongdouble \
2-
// RUN: -O0 %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-BE
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// RUN: -O0 %s -o - | FileCheck %s --check-prefixes=CHECK-BE32
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// RUN: %clang -target powerpc64-linux-gnu -emit-llvm -S -mabi=ibmlongdouble \
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// RUN: -O0 %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-BE
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// RUN: -O0 %s -o - | FileCheck %s --check-prefixes=CHECK-BE64
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// RUN: %clang -target powerpc64le-linux-gnu -emit-llvm -S -mabi=ibmlongdouble \
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// RUN: -O0 %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-LE
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// RUN: -O0 %s -o - | FileCheck %s --check-prefixes=CHECK-LE
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bool b;
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double d = -1.0;
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long double ld = -1.0L;
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// CHECK-BE32-LABEL: define dso_local void @_Z12test_signbitv(
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// CHECK-BE32-SAME: ) #[[ATTR0:[0-9]+]] {
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// CHECK-BE32-NEXT: entry:
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// CHECK-BE32-NEXT: [[FROMBOOL:%.*]] = zext i1 icmp slt (i64 trunc (i128 lshr (i128 bitcast (ppc_fp128 0xM3FF00000000000000000000000000000 to i128), i128 64) to i64), i64 0) to i8
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// CHECK-BE32-NEXT: store i8 [[FROMBOOL]], ptr @b, align 1
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// CHECK-BE32-NEXT: [[TMP0:%.*]] = load ppc_fp128, ptr @ld, align 16
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// CHECK-BE32-NEXT: [[TMP1:%.*]] = bitcast ppc_fp128 [[TMP0]] to i128
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// CHECK-BE32-NEXT: [[TMP2:%.*]] = lshr i128 [[TMP1]], 64
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// CHECK-BE32-NEXT: [[TMP3:%.*]] = trunc i128 [[TMP2]] to i64
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// CHECK-BE32-NEXT: [[TMP4:%.*]] = icmp slt i64 [[TMP3]], 0
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// CHECK-BE32-NEXT: [[FROMBOOL1:%.*]] = zext i1 [[TMP4]] to i8
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// CHECK-BE32-NEXT: store i8 [[FROMBOOL1]], ptr @b, align 1
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// CHECK-BE32-NEXT: store i8 0, ptr @b, align 1
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// CHECK-BE32-NEXT: [[TMP5:%.*]] = load double, ptr @d, align 8
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// CHECK-BE32-NEXT: [[CONV:%.*]] = fptrunc double [[TMP5]] to float
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// CHECK-BE32-NEXT: [[TMP6:%.*]] = bitcast float [[CONV]] to i32
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// CHECK-BE32-NEXT: [[TMP7:%.*]] = icmp slt i32 [[TMP6]], 0
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// CHECK-BE32-NEXT: [[FROMBOOL2:%.*]] = zext i1 [[TMP7]] to i8
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// CHECK-BE32-NEXT: store i8 [[FROMBOOL2]], ptr @b, align 1
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// CHECK-BE32-NEXT: [[FROMBOOL3:%.*]] = zext i1 icmp slt (i64 trunc (i128 lshr (i128 bitcast (ppc_fp128 0xM3FF00000000000000000000000000000 to i128), i128 64) to i64), i64 0) to i8
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// CHECK-BE32-NEXT: store i8 [[FROMBOOL3]], ptr @b, align 1
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// CHECK-BE32-NEXT: [[TMP8:%.*]] = load ppc_fp128, ptr @ld, align 16
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// CHECK-BE32-NEXT: [[TMP9:%.*]] = bitcast ppc_fp128 [[TMP8]] to i128
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// CHECK-BE32-NEXT: [[TMP10:%.*]] = lshr i128 [[TMP9]], 64
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// CHECK-BE32-NEXT: [[TMP11:%.*]] = trunc i128 [[TMP10]] to i64
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// CHECK-BE32-NEXT: [[TMP12:%.*]] = icmp slt i64 [[TMP11]], 0
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// CHECK-BE32-NEXT: [[FROMBOOL4:%.*]] = zext i1 [[TMP12]] to i8
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// CHECK-BE32-NEXT: store i8 [[FROMBOOL4]], ptr @b, align 1
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// CHECK-BE32-NEXT: ret void
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//
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// CHECK-BE64-LABEL: define dso_local void @_Z12test_signbitv(
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// CHECK-BE64-SAME: ) #[[ATTR0:[0-9]+]] {
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// CHECK-BE64-NEXT: entry:
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// CHECK-BE64-NEXT: [[FROMBOOL:%.*]] = zext i1 icmp slt (i64 trunc (i128 lshr (i128 bitcast (ppc_fp128 0xM3FF00000000000000000000000000000 to i128), i128 64) to i64), i64 0) to i8
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// CHECK-BE64-NEXT: store i8 [[FROMBOOL]], ptr @b, align 1
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// CHECK-BE64-NEXT: [[TMP0:%.*]] = load ppc_fp128, ptr @ld, align 16
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// CHECK-BE64-NEXT: [[TMP1:%.*]] = bitcast ppc_fp128 [[TMP0]] to i128
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// CHECK-BE64-NEXT: [[TMP2:%.*]] = lshr i128 [[TMP1]], 64
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// CHECK-BE64-NEXT: [[TMP3:%.*]] = trunc i128 [[TMP2]] to i64
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// CHECK-BE64-NEXT: [[TMP4:%.*]] = icmp slt i64 [[TMP3]], 0
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// CHECK-BE64-NEXT: [[FROMBOOL1:%.*]] = zext i1 [[TMP4]] to i8
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// CHECK-BE64-NEXT: store i8 [[FROMBOOL1]], ptr @b, align 1
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// CHECK-BE64-NEXT: store i8 0, ptr @b, align 1
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// CHECK-BE64-NEXT: [[TMP5:%.*]] = load double, ptr @d, align 8
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// CHECK-BE64-NEXT: [[CONV:%.*]] = fptrunc double [[TMP5]] to float
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// CHECK-BE64-NEXT: [[TMP6:%.*]] = bitcast float [[CONV]] to i32
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// CHECK-BE64-NEXT: [[TMP7:%.*]] = icmp slt i32 [[TMP6]], 0
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// CHECK-BE64-NEXT: [[FROMBOOL2:%.*]] = zext i1 [[TMP7]] to i8
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// CHECK-BE64-NEXT: store i8 [[FROMBOOL2]], ptr @b, align 1
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// CHECK-BE64-NEXT: [[FROMBOOL3:%.*]] = zext i1 icmp slt (i64 trunc (i128 lshr (i128 bitcast (ppc_fp128 0xM3FF00000000000000000000000000000 to i128), i128 64) to i64), i64 0) to i8
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// CHECK-BE64-NEXT: store i8 [[FROMBOOL3]], ptr @b, align 1
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// CHECK-BE64-NEXT: [[TMP8:%.*]] = load ppc_fp128, ptr @ld, align 16
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// CHECK-BE64-NEXT: [[TMP9:%.*]] = bitcast ppc_fp128 [[TMP8]] to i128
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// CHECK-BE64-NEXT: [[TMP10:%.*]] = lshr i128 [[TMP9]], 64
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// CHECK-BE64-NEXT: [[TMP11:%.*]] = trunc i128 [[TMP10]] to i64
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// CHECK-BE64-NEXT: [[TMP12:%.*]] = icmp slt i64 [[TMP11]], 0
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// CHECK-BE64-NEXT: [[FROMBOOL4:%.*]] = zext i1 [[TMP12]] to i8
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// CHECK-BE64-NEXT: store i8 [[FROMBOOL4]], ptr @b, align 1
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// CHECK-BE64-NEXT: ret void
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//
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// CHECK-LE-LABEL: define dso_local void @_Z12test_signbitv(
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// CHECK-LE-SAME: ) #[[ATTR0:[0-9]+]] {
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// CHECK-LE-NEXT: entry:
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// CHECK-LE-NEXT: [[FROMBOOL:%.*]] = zext i1 icmp slt (i64 trunc (i128 bitcast (ppc_fp128 0xM3FF00000000000000000000000000000 to i128) to i64), i64 0) to i8
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// CHECK-LE-NEXT: store i8 [[FROMBOOL]], ptr @b, align 1
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// CHECK-LE-NEXT: [[TMP0:%.*]] = load ppc_fp128, ptr @ld, align 16
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// CHECK-LE-NEXT: [[TMP1:%.*]] = bitcast ppc_fp128 [[TMP0]] to i128
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// CHECK-LE-NEXT: [[TMP2:%.*]] = trunc i128 [[TMP1]] to i64
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// CHECK-LE-NEXT: [[TMP3:%.*]] = icmp slt i64 [[TMP2]], 0
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// CHECK-LE-NEXT: [[FROMBOOL1:%.*]] = zext i1 [[TMP3]] to i8
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// CHECK-LE-NEXT: store i8 [[FROMBOOL1]], ptr @b, align 1
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// CHECK-LE-NEXT: store i8 0, ptr @b, align 1
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// CHECK-LE-NEXT: [[TMP4:%.*]] = load double, ptr @d, align 8
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// CHECK-LE-NEXT: [[CONV:%.*]] = fptrunc double [[TMP4]] to float
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// CHECK-LE-NEXT: [[TMP5:%.*]] = bitcast float [[CONV]] to i32
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// CHECK-LE-NEXT: [[TMP6:%.*]] = icmp slt i32 [[TMP5]], 0
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// CHECK-LE-NEXT: [[FROMBOOL2:%.*]] = zext i1 [[TMP6]] to i8
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// CHECK-LE-NEXT: store i8 [[FROMBOOL2]], ptr @b, align 1
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// CHECK-LE-NEXT: [[FROMBOOL3:%.*]] = zext i1 icmp slt (i64 trunc (i128 bitcast (ppc_fp128 0xM3FF00000000000000000000000000000 to i128) to i64), i64 0) to i8
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// CHECK-LE-NEXT: store i8 [[FROMBOOL3]], ptr @b, align 1
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// CHECK-LE-NEXT: [[TMP7:%.*]] = load ppc_fp128, ptr @ld, align 16
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// CHECK-LE-NEXT: [[TMP8:%.*]] = bitcast ppc_fp128 [[TMP7]] to i128
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// CHECK-LE-NEXT: [[TMP9:%.*]] = trunc i128 [[TMP8]] to i64
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// CHECK-LE-NEXT: [[TMP10:%.*]] = icmp slt i64 [[TMP9]], 0
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// CHECK-LE-NEXT: [[FROMBOOL4:%.*]] = zext i1 [[TMP10]] to i8
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// CHECK-LE-NEXT: store i8 [[FROMBOOL4]], ptr @b, align 1
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// CHECK-LE-NEXT: ret void
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//
11100
void test_signbit()
12101
{
13102
b = __builtin_signbit(1.0L);
14-
// CHECK: i128
15-
// CHECK-LE-NOT: lshr
16-
// CHECK-BE: lshr
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// CHECK: bitcast
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// CHECK: ppc_fp128
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b = __builtin_signbit(ld);
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// CHECK: bitcast
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// CHECK: ppc_fp128
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// CHECK-LE-NOT: lshr
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// CHECK-BE: lshr
25105

26106
b = __builtin_signbitf(1.0);
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// CHECK: store i8 0
28107

29108
b = __builtin_signbitf(d);
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// CHECK: bitcast
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// CHECK-LE-NOT: lshr
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// CHECK-BE-NOT: lshr
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b = __builtin_signbitl(1.0L);
35-
// CHECK: i128
36-
// CHECK-LE-NOT: lshr
37-
// CHECK-BE: lshr
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// CHECK: bitcast
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// CHECK: ppc_fp128
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41112
b = __builtin_signbitl(ld);
42-
// CHECK: bitcast
43-
// CHECK: ppc_fp128
44-
// CHECK-LE-NOT: lshr
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// CHECK-BE: lshr
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}

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