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[CVP] Infer nneg on zext when forming from non-negative sext. (#70715)
Builds on #67982 which recently introduced the nneg flag on a zext instruction.
1 parent 71bf052 commit 55c9f24

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4 files changed

+6
-5
lines changed

4 files changed

+6
-5
lines changed

llvm/lib/Transforms/Scalar/CorrelatedValuePropagation.cpp

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1017,6 +1017,7 @@ static bool processSExt(SExtInst *SDI, LazyValueInfo *LVI) {
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auto *ZExt = CastInst::CreateZExtOrBitCast(Base, SDI->getType(), "", SDI);
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ZExt->takeName(SDI);
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ZExt->setDebugLoc(SDI->getDebugLoc());
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ZExt->setNonNeg();
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SDI->replaceAllUsesWith(ZExt);
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SDI->eraseFromParent();
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llvm/test/Transforms/CorrelatedValuePropagation/cond-at-use.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -519,7 +519,7 @@ define i16 @ashr_convert(i16 noundef %x, i16 %y) {
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define i32 @sext_convert(i16 noundef %x) {
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; CHECK-LABEL: @sext_convert(
522-
; CHECK-NEXT: [[EXT:%.*]] = zext i16 [[X:%.*]] to i32
522+
; CHECK-NEXT: [[EXT:%.*]] = zext nneg i16 [[X:%.*]] to i32
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; CHECK-NEXT: [[CMP:%.*]] = icmp sge i16 [[X]], 0
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; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i32 [[EXT]], i32 24
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; CHECK-NEXT: ret i32 [[SEL]]

llvm/test/Transforms/CorrelatedValuePropagation/sext.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -18,7 +18,7 @@ define void @test1(i32 %n) {
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; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[A]], -1
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; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_END:%.*]]
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; CHECK: for.body:
21-
; CHECK-NEXT: [[EXT_WIDE1:%.*]] = zext i32 [[A]] to i64
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; CHECK-NEXT: [[EXT_WIDE1:%.*]] = zext nneg i32 [[A]] to i64
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; CHECK-NEXT: call void @use64(i64 [[EXT_WIDE1]])
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; CHECK-NEXT: [[EXT]] = trunc i64 [[EXT_WIDE1]] to i32
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; CHECK-NEXT: br label [[FOR_COND]]
@@ -85,7 +85,7 @@ define void @test3(i32 %n) {
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; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[N:%.*]], -1
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; CHECK-NEXT: br i1 [[CMP]], label [[BB:%.*]], label [[EXIT:%.*]]
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; CHECK: bb:
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; CHECK-NEXT: [[EXT_WIDE1:%.*]] = zext i32 [[N]] to i64
88+
; CHECK-NEXT: [[EXT_WIDE1:%.*]] = zext nneg i32 [[N]] to i64
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; CHECK-NEXT: call void @use64(i64 [[EXT_WIDE1]])
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; CHECK-NEXT: [[EXT:%.*]] = trunc i64 [[EXT_WIDE1]] to i32
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; CHECK-NEXT: br label [[EXIT]]

llvm/test/Transforms/PhaseOrdering/AArch64/loopflatten.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -12,8 +12,8 @@ define dso_local void @_Z3fooPiii(ptr %A, i32 %N, i32 %M) #0 {
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; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[CMP3]], i1 [[CMP21]], i1 false
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; CHECK-NEXT: br i1 [[OR_COND]], label [[FOR_COND1_PREHEADER_LR_PH_SPLIT_US:%.*]], label [[FOR_COND_CLEANUP:%.*]]
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; CHECK: for.cond1.preheader.lr.ph.split.us:
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; CHECK-NEXT: [[TMP0:%.*]] = zext i32 [[M]] to i64
16-
; CHECK-NEXT: [[TMP1:%.*]] = zext i32 [[N]] to i64
15+
; CHECK-NEXT: [[TMP0:%.*]] = zext nneg i32 [[M]] to i64
16+
; CHECK-NEXT: [[TMP1:%.*]] = zext nneg i32 [[N]] to i64
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; CHECK-NEXT: [[FLATTEN_TRIPCOUNT:%.*]] = mul nuw nsw i64 [[TMP0]], [[TMP1]]
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; CHECK-NEXT: br label [[FOR_COND1_PREHEADER_US:%.*]]
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; CHECK: for.cond1.preheader.us:

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