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[PowerPC] Split tests into asm and mir parts (NFC)
To allow both to be generated.
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4 files changed

+686
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‎llvm/test/CodeGen/PowerPC/aix32-cc-abi-vaarg-mir.ll

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; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
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; RUN: llc -O2 -mtriple powerpc-ibm-aix-xcoff -mcpu=ppc -stop-after=machine-cp -verify-machineinstrs < %s | FileCheck %s
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define i32 @int_va_arg(i32 %a, ...) local_unnamed_addr {
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; CHECK-LABEL: name: int_va_arg
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; CHECK: bb.0.entry:
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; CHECK-NEXT: liveins: $r3, $r4, $r5, $r6, $r7, $r8, $r9, $r10
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: renamable $r11 = ADDI %fixed-stack.0, 0
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; CHECK-NEXT: STW killed renamable $r4, 0, %fixed-stack.0 :: (store (s32) into %fixed-stack.0)
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; CHECK-NEXT: STW killed renamable $r6, 8, %fixed-stack.0 :: (store (s32))
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; CHECK-NEXT: STW killed renamable $r7, 12, %fixed-stack.0 :: (store (s32))
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; CHECK-NEXT: STW killed renamable $r8, 16, %fixed-stack.0 :: (store (s32))
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; CHECK-NEXT: STW killed renamable $r9, 20, %fixed-stack.0 :: (store (s32))
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; CHECK-NEXT: STW killed renamable $r10, 24, %fixed-stack.0 :: (store (s32))
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; CHECK-NEXT: STW renamable $r11, 0, %stack.0.arg1 :: (store (s32) into %ir.arg1)
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; CHECK-NEXT: STW killed renamable $r11, 0, %stack.1.arg2 :: (store (s32) into %ir.arg2)
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; CHECK-NEXT: renamable $r4 = ADDI %fixed-stack.0, 4
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; CHECK-NEXT: STW renamable $r4, 0, %stack.0.arg1 :: (store (s32) into %ir.arg1)
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; CHECK-NEXT: renamable $r6 = LWZ 0, %fixed-stack.0 :: (load (s32) from %ir.argp.cur)
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; CHECK-NEXT: STW killed renamable $r4, 0, %stack.1.arg2 :: (store (s32) into %ir.arg2)
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; CHECK-NEXT: renamable $r4 = LWZ 0, %fixed-stack.0 :: (load (s32) from %ir.argp.cur2)
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; CHECK-NEXT: renamable $r3 = nsw ADD4 killed renamable $r6, killed renamable $r3
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; CHECK-NEXT: renamable $r4 = RLWINM killed renamable $r4, 1, 0, 30
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; CHECK-NEXT: renamable $r3 = nsw ADD4 killed renamable $r3, killed renamable $r4
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; CHECK-NEXT: STW killed renamable $r5, 4, %fixed-stack.0 :: (store (s32) into %fixed-stack.0 + 4)
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; CHECK-NEXT: BLR implicit $lr, implicit $rm, implicit $r3
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entry:
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%arg1 = alloca ptr, align 4
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%arg2 = alloca ptr, align 4
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call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %arg1)
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call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %arg2)
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call void @llvm.va_start(ptr nonnull %arg1)
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call void @llvm.va_copy(ptr nonnull %arg2, ptr nonnull %arg1)
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%argp.cur = load ptr, ptr %arg1, align 4
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%argp.next = getelementptr inbounds i8, ptr %argp.cur, i32 4
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store ptr %argp.next, ptr %arg1, align 4
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%0 = load i32, ptr %argp.cur, align 4
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%add = add nsw i32 %0, %a
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%argp.cur2 = load ptr, ptr %arg2, align 4
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%argp.next3 = getelementptr inbounds i8, ptr %argp.cur2, i32 4
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store ptr %argp.next3, ptr %arg2, align 4
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%1 = load i32, ptr %argp.cur2, align 4
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%mul = shl i32 %1, 1
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%add4 = add nsw i32 %add, %mul
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call void @llvm.va_end(ptr nonnull %arg1)
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call void @llvm.va_end(ptr nonnull %arg2)
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call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %arg2)
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call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %arg1)
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ret i32 %add4
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}
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declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture)
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declare void @llvm.va_start(ptr)
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declare void @llvm.va_copy(ptr, ptr)
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declare void @llvm.va_end(ptr)
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declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture)
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define i32 @int_stack_va_arg(i32 %one, i32 %two, i32 %three, i32 %four, i32 %five, i32 %six, i32 %seven, i32 %eight, ...) local_unnamed_addr {
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; CHECK-LABEL: name: int_stack_va_arg
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; CHECK: bb.0.entry:
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; CHECK-NEXT: liveins: $r3, $r4, $r5, $r6, $r7, $r8, $r9, $r10
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: renamable $r11 = LI 4
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; CHECK-NEXT: renamable $r3 = nsw ADD4 killed renamable $r4, killed renamable $r3
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; CHECK-NEXT: renamable $r4 = ADDI %fixed-stack.0, 0
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; CHECK-NEXT: renamable $r4 = RLWIMI killed renamable $r4, killed renamable $r11, 0, 29, 29
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; CHECK-NEXT: renamable $r3 = nsw ADD4 killed renamable $r3, killed renamable $r5
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; CHECK-NEXT: STW killed renamable $r4, 0, %stack.0.arg1 :: (store (s32) into %ir.arg1)
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; CHECK-NEXT: renamable $r3 = nsw ADD4 killed renamable $r3, killed renamable $r6
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; CHECK-NEXT: renamable $r4 = LWZ 0, %fixed-stack.0 :: (load (s32) from %ir.argp.cur9, align 8)
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; CHECK-NEXT: renamable $r3 = nsw ADD4 killed renamable $r3, killed renamable $r7
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; CHECK-NEXT: renamable $r3 = nsw ADD4 killed renamable $r3, killed renamable $r8
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; CHECK-NEXT: renamable $r3 = nsw ADD4 killed renamable $r3, killed renamable $r9
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; CHECK-NEXT: renamable $r3 = nsw ADD4 killed renamable $r3, killed renamable $r10
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; CHECK-NEXT: renamable $r3 = nsw ADD4 killed renamable $r3, renamable $r4
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; CHECK-NEXT: renamable $r4 = RLWINM killed renamable $r4, 1, 0, 30
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; CHECK-NEXT: renamable $r3 = nsw ADD4 killed renamable $r3, killed renamable $r4
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; CHECK-NEXT: BLR implicit $lr, implicit $rm, implicit $r3
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entry:
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%arg1 = alloca ptr, align 4
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%arg2 = alloca ptr, align 4
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call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %arg1)
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call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %arg2)
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call void @llvm.va_start(ptr nonnull %arg1)
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call void @llvm.va_copy(ptr nonnull %arg2, ptr nonnull %arg1)
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%add = add nsw i32 %two, %one
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%add2 = add nsw i32 %add, %three
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%add3 = add nsw i32 %add2, %four
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%add4 = add nsw i32 %add3, %five
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%add5 = add nsw i32 %add4, %six
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%add6 = add nsw i32 %add5, %seven
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%add7 = add nsw i32 %add6, %eight
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%argp.cur = load ptr, ptr %arg1, align 4
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%argp.next = getelementptr inbounds i8, ptr %argp.cur, i32 4
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store ptr %argp.next, ptr %arg1, align 4
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%0 = load i32, ptr %argp.cur, align 4
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%add8 = add nsw i32 %add7, %0
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%argp.cur9 = load ptr, ptr %arg2, align 4
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%argp.next10 = getelementptr inbounds i8, ptr %argp.cur9, i32 4
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store ptr %argp.next10, ptr %arg2, align 4
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%1 = load i32, ptr %argp.cur9, align 4
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%mul = shl i32 %1, 1
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%add11 = add nsw i32 %add8, %mul
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call void @llvm.va_end(ptr nonnull %arg1)
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call void @llvm.va_end(ptr nonnull %arg2)
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call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %arg2)
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call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %arg1)
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ret i32 %add11
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}
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define double @double_va_arg(double %a, ...) local_unnamed_addr {
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; CHECK-LABEL: name: double_va_arg
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; CHECK: bb.0.entry:
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; CHECK-NEXT: liveins: $f1, $r5, $r6, $r7, $r8, $r9, $r10
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: renamable $r3 = ADDI %fixed-stack.0, 0
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; CHECK-NEXT: STW killed renamable $r7, 8, %fixed-stack.0 :: (store (s32), align 8)
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; CHECK-NEXT: STW renamable $r5, 0, %fixed-stack.0 :: (store (s32) into %fixed-stack.0, align 16)
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; CHECK-NEXT: STW renamable $r6, 4, %fixed-stack.0 :: (store (s32) into %fixed-stack.0 + 4)
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; CHECK-NEXT: STW killed renamable $r8, 12, %fixed-stack.0 :: (store (s32))
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; CHECK-NEXT: STW killed renamable $r9, 16, %fixed-stack.0 :: (store (s32) into %fixed-stack.0 + 16, align 16)
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; CHECK-NEXT: STW killed renamable $r10, 20, %fixed-stack.0 :: (store (s32))
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; CHECK-NEXT: STW renamable $r3, 0, %stack.0.arg1 :: (store (s32) into %ir.arg1)
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; CHECK-NEXT: STW killed renamable $r3, 0, %stack.1.arg2 :: (store (s32) into %ir.arg2)
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; CHECK-NEXT: STW renamable $r5, 0, %stack.2 :: (store (s32) into %stack.2, align 8)
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; CHECK-NEXT: STW renamable $r6, 4, %stack.2 :: (store (s32) into %stack.2 + 4)
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; CHECK-NEXT: renamable $f0 = LFD 0, %stack.2 :: (load (s64) from %stack.2)
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; CHECK-NEXT: STW killed renamable $r5, 0, %stack.3 :: (store (s32) into %stack.3, align 8)
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; CHECK-NEXT: STW killed renamable $r6, 4, %stack.3 :: (store (s32) into %stack.3 + 4)
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; CHECK-NEXT: renamable $f2 = LFD 0, %stack.3 :: (load (s64) from %stack.3)
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; CHECK-NEXT: renamable $f0 = nofpexcept FADD killed renamable $f0, killed renamable $f1, implicit $rm
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; CHECK-NEXT: renamable $f1 = nofpexcept FADD killed renamable $f2, renamable $f2, implicit $rm
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; CHECK-NEXT: renamable $f1 = nofpexcept FADD killed renamable $f0, killed renamable $f1, implicit $rm
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; CHECK-NEXT: BLR implicit $lr, implicit $rm, implicit $f1
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entry:
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%arg1 = alloca ptr, align 4
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%arg2 = alloca ptr, align 4
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call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %arg1)
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call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %arg2)
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call void @llvm.va_start(ptr nonnull %arg1)
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call void @llvm.va_copy(ptr nonnull %arg2, ptr nonnull %arg1)
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%argp.cur = load ptr, ptr %arg1, align 4
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%argp.next = getelementptr inbounds i8, ptr %argp.cur, i32 8
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store ptr %argp.next, ptr %arg1, align 4
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%0 = load double, ptr %argp.cur, align 4
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%add = fadd double %0, %a
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%argp.cur2 = load ptr, ptr %arg2, align 4
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%argp.next3 = getelementptr inbounds i8, ptr %argp.cur2, i32 8
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store ptr %argp.next3, ptr %arg2, align 4
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%1 = load double, ptr %argp.cur2, align 4
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%mul = fmul double %1, 2.000000e+00
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%add4 = fadd double %add, %mul
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call void @llvm.va_end(ptr nonnull %arg1)
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call void @llvm.va_end(ptr nonnull %arg2)
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call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %arg2)
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call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %arg1)
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ret double %add4
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}
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define double @double_stack_va_arg(double %one, double %two, double %three, double %four, double %five, double %six, double %seven, double %eight, double %nine, double %ten, double %eleven, double %twelve, double %thirteen, ...) local_unnamed_addr {
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; CHECK-LABEL: name: double_stack_va_arg
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; CHECK: bb.0.entry:
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; CHECK-NEXT: liveins: $f1, $f2, $f3, $f4, $f5, $f6, $f7, $f8, $f9, $f10, $f11, $f12, $f13
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: renamable $r3 = ADDI %fixed-stack.0, 0
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; CHECK-NEXT: STW killed renamable $r3, 0, %stack.0.arg1 :: (store (s32) into %ir.arg1)
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; CHECK-NEXT: renamable $r3 = LWZ 0, %fixed-stack.0 :: (load (s32) from %ir.argp.cur142, align 16)
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; CHECK-NEXT: renamable $f0 = nofpexcept FADD killed renamable $f1, killed renamable $f2, implicit $rm
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; CHECK-NEXT: renamable $f0 = nofpexcept FADD killed renamable $f0, killed renamable $f3, implicit $rm
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; CHECK-NEXT: STW renamable $r3, 0, %stack.2 :: (store (s32) into %stack.2, align 8)
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; CHECK-NEXT: renamable $f0 = nofpexcept FADD killed renamable $f0, killed renamable $f4, implicit $rm
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; CHECK-NEXT: renamable $r4 = LWZ 4, %fixed-stack.0 :: (load (s32) from %ir.argp.cur142 + 4)
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; CHECK-NEXT: renamable $f0 = nofpexcept FADD killed renamable $f0, killed renamable $f5, implicit $rm
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; CHECK-NEXT: renamable $f0 = nofpexcept FADD killed renamable $f0, killed renamable $f6, implicit $rm
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; CHECK-NEXT: renamable $f0 = nofpexcept FADD killed renamable $f0, killed renamable $f7, implicit $rm
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; CHECK-NEXT: STW renamable $r4, 4, %stack.2 :: (store (s32) into %stack.2 + 4)
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; CHECK-NEXT: renamable $f0 = nofpexcept FADD killed renamable $f0, killed renamable $f8, implicit $rm
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; CHECK-NEXT: renamable $f1 = LFD 0, %stack.2 :: (load (s64) from %stack.2)
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; CHECK-NEXT: renamable $f0 = nofpexcept FADD killed renamable $f0, killed renamable $f9, implicit $rm
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; CHECK-NEXT: STW killed renamable $r3, 0, %stack.3 :: (store (s32) into %stack.3, align 8)
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; CHECK-NEXT: renamable $f0 = nofpexcept FADD killed renamable $f0, killed renamable $f10, implicit $rm
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; CHECK-NEXT: STW killed renamable $r4, 4, %stack.3 :: (store (s32) into %stack.3 + 4)
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; CHECK-NEXT: renamable $f0 = nofpexcept FADD killed renamable $f0, killed renamable $f11, implicit $rm
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; CHECK-NEXT: renamable $f2 = LFD 0, %stack.3 :: (load (s64) from %stack.3)
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; CHECK-NEXT: renamable $f0 = nofpexcept FADD killed renamable $f0, killed renamable $f12, implicit $rm
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; CHECK-NEXT: renamable $f0 = nofpexcept FADD killed renamable $f0, killed renamable $f13, implicit $rm
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; CHECK-NEXT: renamable $f0 = nofpexcept FADD killed renamable $f0, killed renamable $f1, implicit $rm
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; CHECK-NEXT: renamable $f1 = nofpexcept FADD killed renamable $f2, renamable $f2, implicit $rm
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; CHECK-NEXT: renamable $f1 = nofpexcept FADD killed renamable $f0, killed renamable $f1, implicit $rm
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; CHECK-NEXT: BLR implicit $lr, implicit $rm, implicit $f1
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entry:
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%arg1 = alloca ptr, align 4
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%arg2 = alloca ptr, align 4
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call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %arg1)
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call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %arg2)
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call void @llvm.va_start(ptr nonnull %arg1)
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call void @llvm.va_copy(ptr nonnull %arg2, ptr nonnull %arg1)
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%add = fadd double %one, %two
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%add2 = fadd double %add, %three
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%add3 = fadd double %add2, %four
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%add4 = fadd double %add3, %five
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%add5 = fadd double %add4, %six
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%add6 = fadd double %add5, %seven
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%add7 = fadd double %add6, %eight
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%add8 = fadd double %add7, %nine
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%add9 = fadd double %add8, %ten
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%add10 = fadd double %add9, %eleven
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%add11 = fadd double %add10, %twelve
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%add12 = fadd double %add11, %thirteen
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%argp.cur1 = load ptr, ptr %arg1, align 4
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%0 = load double, ptr %argp.cur1, align 4
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%add13 = fadd double %add12, %0
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%argp.cur142 = load ptr, ptr %arg2, align 4
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%1 = load double, ptr %argp.cur142, align 4
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%mul = fmul double %1, 2.000000e+00
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%add16 = fadd double %add13, %mul
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call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %arg2)
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call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %arg1)
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ret double %add16
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}

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