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davemgreendavemgreen
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[GlobalISel][AArch64] Generate ptrtoint/inttoptr as opposed to bitcast in unmerge combine. (#115225)
When combining unmerge we could end up with ptr to i64 bitcasts. Make sure they are created as ptrtoint/inttoptr instead.
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3 files changed

+226
-79
lines changed

3 files changed

+226
-79
lines changed

‎llvm/include/llvm/CodeGen/GlobalISel/LegalizationArtifactCombiner.h

Lines changed: 8 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1218,8 +1218,14 @@ class LegalizationArtifactCombiner {
12181218
} else {
12191219
LLT MergeSrcTy = MRI.getType(MergeI->getOperand(1).getReg());
12201220

1221-
if (!ConvertOp && DestTy != MergeSrcTy)
1222-
ConvertOp = TargetOpcode::G_BITCAST;
1221+
if (!ConvertOp && DestTy != MergeSrcTy) {
1222+
if (DestTy.isPointer())
1223+
ConvertOp = TargetOpcode::G_INTTOPTR;
1224+
else if (MergeSrcTy.isPointer())
1225+
ConvertOp = TargetOpcode::G_PTRTOINT;
1226+
else
1227+
ConvertOp = TargetOpcode::G_BITCAST;
1228+
}
12231229

12241230
if (ConvertOp) {
12251231
Builder.setInstr(MI);

‎llvm/test/CodeGen/AArch64/GlobalISel/legalize-unmerge-values.mir

Lines changed: 90 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -1,13 +1,21 @@
11
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2-
# RUN: llc -mtriple=aarch64 -O0 -run-pass=legalizer %s -o - | FileCheck %s
2+
# RUN: llc -mtriple=aarch64 -O0 -run-pass=legalizer %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-O0
3+
# RUN: llc -mtriple=aarch64 -run-pass=legalizer %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-O2
34

45
---
56
name: test_unmerge_s4_constant
67
body: |
78
bb.0:
8-
; CHECK-LABEL: name: test_unmerge_s4_constant
9-
; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
10-
; CHECK: $x0 = COPY [[C]](s64)
9+
; CHECK-O0-LABEL: name: test_unmerge_s4_constant
10+
; CHECK-O0: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
11+
; CHECK-O0-NEXT: $x0 = COPY [[C]](s64)
12+
;
13+
; CHECK-O2-LABEL: name: test_unmerge_s4_constant
14+
; CHECK-O2: [[C:%[0-9]+]]:_(s8) = G_CONSTANT i8 0
15+
; CHECK-O2-NEXT: [[TRUNC:%[0-9]+]]:_(s4) = G_TRUNC [[C]](s8)
16+
; CHECK-O2-NEXT: [[COPY:%[0-9]+]]:_(s4) = COPY [[TRUNC]](s4)
17+
; CHECK-O2-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
18+
; CHECK-O2-NEXT: $x0 = COPY [[C1]](s64)
1119
%0:_(s8) = G_CONSTANT i8 0
1220
%1:_(s4), %2:_(s4)= G_UNMERGE_VALUES %0
1321
%3:_(s64) = G_ANYEXT %1
@@ -21,15 +29,17 @@ body: |
2129
bb.0:
2230
liveins: $w0
2331
; CHECK-LABEL: name: test_unmerge_s4
24-
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
25-
; CHECK: [[UV:%[0-9]+]]:_(s8), [[UV1:%[0-9]+]]:_(s8), [[UV2:%[0-9]+]]:_(s8), [[UV3:%[0-9]+]]:_(s8) = G_UNMERGE_VALUES [[COPY]](s32)
26-
; CHECK: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[UV]](s8)
27-
; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4
28-
; CHECK: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[ZEXT]], [[C]](s64)
29-
; CHECK: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[UV]](s8)
30-
; CHECK: [[ANYEXT1:%[0-9]+]]:_(s64) = G_ANYEXT [[LSHR]](s32)
31-
; CHECK: $x0 = COPY [[ANYEXT]](s64)
32-
; CHECK: $x1 = COPY [[ANYEXT1]](s64)
32+
; CHECK: liveins: $w0
33+
; CHECK-NEXT: {{ $}}
34+
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
35+
; CHECK-NEXT: [[UV:%[0-9]+]]:_(s8), [[UV1:%[0-9]+]]:_(s8), [[UV2:%[0-9]+]]:_(s8), [[UV3:%[0-9]+]]:_(s8) = G_UNMERGE_VALUES [[COPY]](s32)
36+
; CHECK-NEXT: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[UV]](s8)
37+
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4
38+
; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[ZEXT]], [[C]](s64)
39+
; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[UV]](s8)
40+
; CHECK-NEXT: [[ANYEXT1:%[0-9]+]]:_(s64) = G_ANYEXT [[LSHR]](s32)
41+
; CHECK-NEXT: $x0 = COPY [[ANYEXT]](s64)
42+
; CHECK-NEXT: $x1 = COPY [[ANYEXT1]](s64)
3343
%0:_(s32) = COPY $w0
3444
%1:_(s8) = G_TRUNC %0
3545
%2:_(s4), %3:_(s4)= G_UNMERGE_VALUES %1
@@ -39,3 +49,70 @@ body: |
3949
$x1 = COPY %5
4050
4151
...
52+
53+
---
54+
name: test_unmerge_unmerge_s64
55+
body: |
56+
bb.0:
57+
liveins: $x0,$d0,$d1,$d2
58+
; CHECK-LABEL: name: test_unmerge_unmerge_s64
59+
; CHECK: liveins: $x0, $d0, $d1, $d2
60+
; CHECK-NEXT: {{ $}}
61+
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x0
62+
; CHECK-NEXT: $x0 = COPY [[COPY]](s64)
63+
; CHECK-NEXT: $x1 = COPY [[COPY]](s64)
64+
; CHECK-NEXT: $x2 = COPY [[COPY]](s64)
65+
%0:_(s64) = COPY $x0
66+
%1:_(<3 x s64>) = G_BUILD_VECTOR %0:_(s64), %0:_(s64), %0:_(s64)
67+
%2:_(s64), %3:_(s64), %4:_(s64) = G_UNMERGE_VALUES %1:_(<3 x s64>)
68+
$x0 = COPY %2:_(s64)
69+
$x1 = COPY %3:_(s64)
70+
$x2 = COPY %3:_(s64)
71+
72+
...
73+
74+
---
75+
name: test_unmerge_unmerge_to_p0
76+
body: |
77+
bb.0:
78+
liveins: $x0,$d0,$d1,$d2
79+
; CHECK-LABEL: name: test_unmerge_unmerge_to_p0
80+
; CHECK: liveins: $x0, $d0, $d1, $d2
81+
; CHECK-NEXT: {{ $}}
82+
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x0
83+
; CHECK-NEXT: [[INTTOPTR:%[0-9]+]]:_(p0) = G_INTTOPTR [[COPY]](s64)
84+
; CHECK-NEXT: [[INTTOPTR1:%[0-9]+]]:_(p0) = G_INTTOPTR [[COPY]](s64)
85+
; CHECK-NEXT: $x0 = COPY [[INTTOPTR]](p0)
86+
; CHECK-NEXT: $x1 = COPY [[INTTOPTR1]](p0)
87+
; CHECK-NEXT: $x2 = COPY [[INTTOPTR1]](p0)
88+
%0:_(s64) = COPY $x0
89+
%1:_(<3 x s64>) = G_BUILD_VECTOR %0:_(s64), %0:_(s64), %0:_(s64)
90+
%2:_(p0), %3:_(p0), %4:_(p0) = G_UNMERGE_VALUES %1:_(<3 x s64>)
91+
$x0 = COPY %2:_(p0)
92+
$x1 = COPY %3:_(p0)
93+
$x2 = COPY %3:_(p0)
94+
95+
...
96+
97+
---
98+
name: test_unmerge_unmerge_from_p0
99+
body: |
100+
bb.0:
101+
liveins: $x0,$d0,$d1,$d2
102+
; CHECK-LABEL: name: test_unmerge_unmerge_from_p0
103+
; CHECK: liveins: $x0, $d0, $d1, $d2
104+
; CHECK-NEXT: {{ $}}
105+
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
106+
; CHECK-NEXT: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[COPY]](p0)
107+
; CHECK-NEXT: [[PTRTOINT1:%[0-9]+]]:_(s64) = G_PTRTOINT [[COPY]](p0)
108+
; CHECK-NEXT: $d0 = COPY [[PTRTOINT]](s64)
109+
; CHECK-NEXT: $d1 = COPY [[PTRTOINT1]](s64)
110+
; CHECK-NEXT: $d2 = COPY [[PTRTOINT1]](s64)
111+
%0:_(p0) = COPY $x0
112+
%1:_(<3 x p0>) = G_BUILD_VECTOR %0:_(p0), %0:_(p0), %0:_(p0)
113+
%2:_(s64), %3:_(s64), %4:_(s64) = G_UNMERGE_VALUES %1:_(<3 x p0>)
114+
$d0 = COPY %2:_(s64)
115+
$d1 = COPY %3:_(s64)
116+
$d2 = COPY %3:_(s64)
117+
118+
...

‎llvm/test/CodeGen/AArch64/ptradd.ll

Lines changed: 128 additions & 64 deletions
Original file line numberDiff line numberDiff line change
@@ -1,12 +1,6 @@
11
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
22
; RUN: llc < %s -mtriple=aarch64 -verify-machineinstrs -global-isel=0 | FileCheck %s --check-prefixes=CHECK,CHECK-SD
3-
; RUN: llc < %s -mtriple=aarch64 -verify-machineinstrs -global-isel=1 -global-isel-abort=2 2>&1 | FileCheck %s --check-prefixes=CHECK,CHECK-GI
4-
5-
; CHECK-GI: warning: Instruction selection used fallback path for vector_gep_v3i32
6-
; CHECK-GI-NEXT: warning: Instruction selection used fallback path for vector_gep_v3i64
7-
; CHECK-GI-NEXT: warning: Instruction selection used fallback path for vector_gep_v3i64_base
8-
; CHECK-GI-NEXT: warning: Instruction selection used fallback path for vector_gep_v3i64_c10
9-
; CHECK-GI-NEXT: warning: Instruction selection used fallback path for vector_gep_v3i64_cm10
3+
; RUN: llc < %s -mtriple=aarch64 -verify-machineinstrs -global-isel=1 | FileCheck %s --check-prefixes=CHECK,CHECK-GI
104

115
define ptr @scalar_gep_i32(ptr %b, i32 %off) {
126
; CHECK-LABEL: scalar_gep_i32:
@@ -78,20 +72,38 @@ entry:
7872
}
7973

8074
define <3 x ptr> @vector_gep_v3i32(<3 x ptr> %b, <3 x i32> %off) {
81-
; CHECK-LABEL: vector_gep_v3i32:
82-
; CHECK: // %bb.0: // %entry
83-
; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0
84-
; CHECK-NEXT: // kill: def $d1 killed $d1 def $q1
85-
; CHECK-NEXT: ext v4.16b, v3.16b, v3.16b, #8
86-
; CHECK-NEXT: // kill: def $d2 killed $d2 def $q2
87-
; CHECK-NEXT: mov v0.d[1], v1.d[0]
88-
; CHECK-NEXT: saddw v2.2d, v2.2d, v4.2s
89-
; CHECK-NEXT: saddw v0.2d, v0.2d, v3.2s
90-
; CHECK-NEXT: // kill: def $d2 killed $d2 killed $q2
91-
; CHECK-NEXT: ext v1.16b, v0.16b, v0.16b, #8
92-
; CHECK-NEXT: // kill: def $d0 killed $d0 killed $q0
93-
; CHECK-NEXT: // kill: def $d1 killed $d1 killed $q1
94-
; CHECK-NEXT: ret
75+
; CHECK-SD-LABEL: vector_gep_v3i32:
76+
; CHECK-SD: // %bb.0: // %entry
77+
; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0
78+
; CHECK-SD-NEXT: // kill: def $d1 killed $d1 def $q1
79+
; CHECK-SD-NEXT: ext v4.16b, v3.16b, v3.16b, #8
80+
; CHECK-SD-NEXT: // kill: def $d2 killed $d2 def $q2
81+
; CHECK-SD-NEXT: mov v0.d[1], v1.d[0]
82+
; CHECK-SD-NEXT: saddw v2.2d, v2.2d, v4.2s
83+
; CHECK-SD-NEXT: saddw v0.2d, v0.2d, v3.2s
84+
; CHECK-SD-NEXT: // kill: def $d2 killed $d2 killed $q2
85+
; CHECK-SD-NEXT: ext v1.16b, v0.16b, v0.16b, #8
86+
; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0
87+
; CHECK-SD-NEXT: // kill: def $d1 killed $d1 killed $q1
88+
; CHECK-SD-NEXT: ret
89+
;
90+
; CHECK-GI-LABEL: vector_gep_v3i32:
91+
; CHECK-GI: // %bb.0: // %entry
92+
; CHECK-GI-NEXT: smov x9, v3.s[0]
93+
; CHECK-GI-NEXT: fmov x8, d0
94+
; CHECK-GI-NEXT: mov v0.d[0], x8
95+
; CHECK-GI-NEXT: smov x8, v3.s[1]
96+
; CHECK-GI-NEXT: mov v4.d[0], x9
97+
; CHECK-GI-NEXT: fmov x9, d1
98+
; CHECK-GI-NEXT: mov v0.d[1], x9
99+
; CHECK-GI-NEXT: fmov x9, d2
100+
; CHECK-GI-NEXT: mov v4.d[1], x8
101+
; CHECK-GI-NEXT: mov w8, v3.s[2]
102+
; CHECK-GI-NEXT: add v0.2d, v0.2d, v4.2d
103+
; CHECK-GI-NEXT: add x8, x9, w8, sxtw
104+
; CHECK-GI-NEXT: fmov d2, x8
105+
; CHECK-GI-NEXT: mov d1, v0.d[1]
106+
; CHECK-GI-NEXT: ret
95107
entry:
96108
%g = getelementptr i8, <3 x ptr> %b, <3 x i32> %off
97109
ret <3 x ptr> %g
@@ -143,12 +155,29 @@ entry:
143155
}
144156

145157
define <3 x ptr> @vector_gep_v3i64(<3 x ptr> %b, <3 x i64> %off) {
146-
; CHECK-LABEL: vector_gep_v3i64:
147-
; CHECK: // %bb.0: // %entry
148-
; CHECK-NEXT: add d0, d0, d3
149-
; CHECK-NEXT: add d1, d1, d4
150-
; CHECK-NEXT: add d2, d2, d5
151-
; CHECK-NEXT: ret
158+
; CHECK-SD-LABEL: vector_gep_v3i64:
159+
; CHECK-SD: // %bb.0: // %entry
160+
; CHECK-SD-NEXT: add d0, d0, d3
161+
; CHECK-SD-NEXT: add d1, d1, d4
162+
; CHECK-SD-NEXT: add d2, d2, d5
163+
; CHECK-SD-NEXT: ret
164+
;
165+
; CHECK-GI-LABEL: vector_gep_v3i64:
166+
; CHECK-GI: // %bb.0: // %entry
167+
; CHECK-GI-NEXT: fmov x8, d0
168+
; CHECK-GI-NEXT: // kill: def $d3 killed $d3 def $q3
169+
; CHECK-GI-NEXT: // kill: def $d4 killed $d4 def $q4
170+
; CHECK-GI-NEXT: fmov x9, d5
171+
; CHECK-GI-NEXT: mov v3.d[1], v4.d[0]
172+
; CHECK-GI-NEXT: mov v0.d[0], x8
173+
; CHECK-GI-NEXT: fmov x8, d1
174+
; CHECK-GI-NEXT: mov v0.d[1], x8
175+
; CHECK-GI-NEXT: fmov x8, d2
176+
; CHECK-GI-NEXT: add x8, x8, x9
177+
; CHECK-GI-NEXT: add v0.2d, v0.2d, v3.2d
178+
; CHECK-GI-NEXT: fmov d2, x8
179+
; CHECK-GI-NEXT: mov d1, v0.d[1]
180+
; CHECK-GI-NEXT: ret
152181
entry:
153182
%g = getelementptr i8, <3 x ptr> %b, <3 x i64> %off
154183
ret <3 x ptr> %g
@@ -221,19 +250,32 @@ entry:
221250
}
222251

223252
define <3 x ptr> @vector_gep_v3i64_base(ptr %b, <3 x i64> %off) {
224-
; CHECK-LABEL: vector_gep_v3i64_base:
225-
; CHECK: // %bb.0: // %entry
226-
; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0
227-
; CHECK-NEXT: // kill: def $d1 killed $d1 def $q1
228-
; CHECK-NEXT: fmov d3, x0
229-
; CHECK-NEXT: mov v0.d[1], v1.d[0]
230-
; CHECK-NEXT: dup v1.2d, x0
231-
; CHECK-NEXT: add d2, d3, d2
232-
; CHECK-NEXT: add v0.2d, v1.2d, v0.2d
233-
; CHECK-NEXT: ext v1.16b, v0.16b, v0.16b, #8
234-
; CHECK-NEXT: // kill: def $d0 killed $d0 killed $q0
235-
; CHECK-NEXT: // kill: def $d1 killed $d1 killed $q1
236-
; CHECK-NEXT: ret
253+
; CHECK-SD-LABEL: vector_gep_v3i64_base:
254+
; CHECK-SD: // %bb.0: // %entry
255+
; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0
256+
; CHECK-SD-NEXT: // kill: def $d1 killed $d1 def $q1
257+
; CHECK-SD-NEXT: fmov d3, x0
258+
; CHECK-SD-NEXT: mov v0.d[1], v1.d[0]
259+
; CHECK-SD-NEXT: dup v1.2d, x0
260+
; CHECK-SD-NEXT: add d2, d3, d2
261+
; CHECK-SD-NEXT: add v0.2d, v1.2d, v0.2d
262+
; CHECK-SD-NEXT: ext v1.16b, v0.16b, v0.16b, #8
263+
; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0
264+
; CHECK-SD-NEXT: // kill: def $d1 killed $d1 killed $q1
265+
; CHECK-SD-NEXT: ret
266+
;
267+
; CHECK-GI-LABEL: vector_gep_v3i64_base:
268+
; CHECK-GI: // %bb.0: // %entry
269+
; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q0
270+
; CHECK-GI-NEXT: // kill: def $d1 killed $d1 def $q1
271+
; CHECK-GI-NEXT: fmov x8, d2
272+
; CHECK-GI-NEXT: mov v0.d[1], v1.d[0]
273+
; CHECK-GI-NEXT: dup v1.2d, x0
274+
; CHECK-GI-NEXT: add x8, x0, x8
275+
; CHECK-GI-NEXT: fmov d2, x8
276+
; CHECK-GI-NEXT: add v0.2d, v1.2d, v0.2d
277+
; CHECK-GI-NEXT: mov d1, v0.d[1]
278+
; CHECK-GI-NEXT: ret
237279
entry:
238280
%g = getelementptr i8, ptr %b, <3 x i64> %off
239281
ret <3 x ptr> %g
@@ -292,18 +334,29 @@ entry:
292334
}
293335

294336
define <3 x ptr> @vector_gep_v3i64_c10(ptr %b) {
295-
; CHECK-LABEL: vector_gep_v3i64_c10:
296-
; CHECK: // %bb.0: // %entry
297-
; CHECK-NEXT: mov w8, #10 // =0xa
298-
; CHECK-NEXT: dup v0.2d, x0
299-
; CHECK-NEXT: fmov d3, x0
300-
; CHECK-NEXT: dup v2.2d, x8
301-
; CHECK-NEXT: add v0.2d, v0.2d, v2.2d
302-
; CHECK-NEXT: add d2, d3, d2
303-
; CHECK-NEXT: ext v1.16b, v0.16b, v0.16b, #8
304-
; CHECK-NEXT: // kill: def $d0 killed $d0 killed $q0
305-
; CHECK-NEXT: // kill: def $d1 killed $d1 killed $q1
306-
; CHECK-NEXT: ret
337+
; CHECK-SD-LABEL: vector_gep_v3i64_c10:
338+
; CHECK-SD: // %bb.0: // %entry
339+
; CHECK-SD-NEXT: mov w8, #10 // =0xa
340+
; CHECK-SD-NEXT: dup v0.2d, x0
341+
; CHECK-SD-NEXT: fmov d3, x0
342+
; CHECK-SD-NEXT: dup v2.2d, x8
343+
; CHECK-SD-NEXT: add v0.2d, v0.2d, v2.2d
344+
; CHECK-SD-NEXT: add d2, d3, d2
345+
; CHECK-SD-NEXT: ext v1.16b, v0.16b, v0.16b, #8
346+
; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0
347+
; CHECK-SD-NEXT: // kill: def $d1 killed $d1 killed $q1
348+
; CHECK-SD-NEXT: ret
349+
;
350+
; CHECK-GI-LABEL: vector_gep_v3i64_c10:
351+
; CHECK-GI: // %bb.0: // %entry
352+
; CHECK-GI-NEXT: adrp x8, .LCPI19_0
353+
; CHECK-GI-NEXT: dup v0.2d, x0
354+
; CHECK-GI-NEXT: ldr q1, [x8, :lo12:.LCPI19_0]
355+
; CHECK-GI-NEXT: add x8, x0, #10
356+
; CHECK-GI-NEXT: fmov d2, x8
357+
; CHECK-GI-NEXT: add v0.2d, v0.2d, v1.2d
358+
; CHECK-GI-NEXT: mov d1, v0.d[1]
359+
; CHECK-GI-NEXT: ret
307360
entry:
308361
%g = getelementptr i8, ptr %b, <3 x i64> <i64 10, i64 10, i64 10>
309362
ret <3 x ptr> %g
@@ -373,18 +426,29 @@ entry:
373426
}
374427

375428
define <3 x ptr> @vector_gep_v3i64_cm10(ptr %b) {
376-
; CHECK-LABEL: vector_gep_v3i64_cm10:
377-
; CHECK: // %bb.0: // %entry
378-
; CHECK-NEXT: mov x8, #-10 // =0xfffffffffffffff6
379-
; CHECK-NEXT: dup v0.2d, x0
380-
; CHECK-NEXT: fmov d3, x0
381-
; CHECK-NEXT: dup v2.2d, x8
382-
; CHECK-NEXT: add v0.2d, v0.2d, v2.2d
383-
; CHECK-NEXT: add d2, d3, d2
384-
; CHECK-NEXT: ext v1.16b, v0.16b, v0.16b, #8
385-
; CHECK-NEXT: // kill: def $d0 killed $d0 killed $q0
386-
; CHECK-NEXT: // kill: def $d1 killed $d1 killed $q1
387-
; CHECK-NEXT: ret
429+
; CHECK-SD-LABEL: vector_gep_v3i64_cm10:
430+
; CHECK-SD: // %bb.0: // %entry
431+
; CHECK-SD-NEXT: mov x8, #-10 // =0xfffffffffffffff6
432+
; CHECK-SD-NEXT: dup v0.2d, x0
433+
; CHECK-SD-NEXT: fmov d3, x0
434+
; CHECK-SD-NEXT: dup v2.2d, x8
435+
; CHECK-SD-NEXT: add v0.2d, v0.2d, v2.2d
436+
; CHECK-SD-NEXT: add d2, d3, d2
437+
; CHECK-SD-NEXT: ext v1.16b, v0.16b, v0.16b, #8
438+
; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0
439+
; CHECK-SD-NEXT: // kill: def $d1 killed $d1 killed $q1
440+
; CHECK-SD-NEXT: ret
441+
;
442+
; CHECK-GI-LABEL: vector_gep_v3i64_cm10:
443+
; CHECK-GI: // %bb.0: // %entry
444+
; CHECK-GI-NEXT: adrp x8, .LCPI23_0
445+
; CHECK-GI-NEXT: dup v0.2d, x0
446+
; CHECK-GI-NEXT: ldr q1, [x8, :lo12:.LCPI23_0]
447+
; CHECK-GI-NEXT: sub x8, x0, #10
448+
; CHECK-GI-NEXT: fmov d2, x8
449+
; CHECK-GI-NEXT: add v0.2d, v0.2d, v1.2d
450+
; CHECK-GI-NEXT: mov d1, v0.d[1]
451+
; CHECK-GI-NEXT: ret
388452
entry:
389453
%g = getelementptr i8, ptr %b, <3 x i64> <i64 -10, i64 -10, i64 -10>
390454
ret <3 x ptr> %g

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