Skip to content

Commit 56f1643

Browse files
[RISCV][VLOPT] Add fp-reductions to getOperandInfo
1 parent e93181b commit 56f1643

File tree

2 files changed

+55
-1
lines changed

2 files changed

+55
-1
lines changed

llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp

Lines changed: 6 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -723,7 +723,12 @@ static OperandInfo getOperandInfo(const MachineOperand &MO,
723723
case RISCV::VREDMINU_VS:
724724
case RISCV::VREDOR_VS:
725725
case RISCV::VREDSUM_VS:
726-
case RISCV::VREDXOR_VS: {
726+
case RISCV::VREDXOR_VS:
727+
// Vector Single-Width Floating-Point Reduction Instructions
728+
case RISCV::VFREDMAX_VS:
729+
case RISCV::VFREDMIN_VS:
730+
case RISCV::VFREDOSUM_VS:
731+
case RISCV::VFREDUSUM_VS: {
727732
if (MO.getOperandNo() == 2)
728733
return OperandInfo(MIVLMul, MILog2SEW);
729734
return OperandInfo(MILog2SEW);

llvm/test/CodeGen/RISCV/rvv/vl-opt-op-info.mir

Lines changed: 49 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1337,3 +1337,52 @@ body: |
13371337
%y:vr = PseudoVREDSUM_VS_M1_E8 $noreg, $noreg, %x, 1, 3 /* e8 */, 0
13381338
%z:vr = PseudoVADD_VV_M1 $noreg, %x, $noreg, 2, 3 /* e8 */, 0
13391339
...
1340+
name: vfred_vs2
1341+
body: |
1342+
bb.0:
1343+
; CHECK-LABEL: name: vred_vs2
1344+
; CHECK: %x:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, 1, 3 /* e8 */, 0 /* tu, mu */
1345+
; CHECK-NEXT: %y:vr = PseudoVREDAND_VS_M1_E8 $noreg, %x, $noreg, 1, 3 /* e8 */, 0 /* tu, mu */
1346+
%x:vr = nofpexcept PseudoVFCVT_X_F_V_M1 $noreg, $noreg, 0, -1, 5 /* e32 */, 0
1347+
%y:vr = PseudoVFREDMAX_VS_M1_E32 $noreg, %x, $noreg, 1, 5 /* e32 */, 0
1348+
...
1349+
---
1350+
name: vfred_vs1
1351+
body: |
1352+
bb.0:
1353+
; CHECK-LABEL: name: vfred_vs1
1354+
; CHECK: %x:vr = nofpexcept PseudoVFCVT_X_F_V_M1 $noreg, $noreg, 0, 1, 5 /* e32 */, 0 /* tu, mu */
1355+
; CHECK-NEXT: %y:vr = PseudoVFREDMAX_VS_M1_E32 $noreg, $noreg, %x, 1, 5 /* e32 */, 0 /* tu, mu */
1356+
%x:vr = nofpexcept PseudoVFCVT_X_F_V_M1 $noreg, $noreg, 0, -1, 5 /* e32 */, 0
1357+
%y:vr = PseudoVFREDMAX_VS_M1_E32 $noreg, $noreg, %x, 1, 5 /* e32 */, 0
1358+
...
1359+
---
1360+
name: vfred_vs1_vs2
1361+
body: |
1362+
bb.0:
1363+
; CHECK-LABEL: name: vfred_vs1_vs2
1364+
; CHECK: %x:vr = nofpexcept PseudoVFCVT_X_F_V_M1 $noreg, $noreg, 0, 1, 5 /* e32 */, 0 /* tu, mu */
1365+
; CHECK-NEXT: %y:vr = PseudoVFREDMAX_VS_M1_E32 $noreg, %x, %x, 1, 5 /* e32 */, 0 /* tu, mu */
1366+
%x:vr = nofpexcept PseudoVFCVT_X_F_V_M1 $noreg, $noreg, 0, -1, 5 /* e32 */, 0
1367+
%y:vr = PseudoVFREDMAX_VS_M1_E32 $noreg, %x, %x, 1, 5 /* e32 */, 0
1368+
...
1369+
---
1370+
name: vfred_vs1_vs2_incompatible_eew
1371+
body: |
1372+
bb.0:
1373+
; CHECK-LABEL: name: vfred_vs1_vs2_incompatible_eew
1374+
; CHECK: %x:vr = nofpexcept PseudoVFCVT_X_F_V_M1 $noreg, $noreg, 0, -1, 3 /* e8 */, 0 /* tu, mu */
1375+
; CHECK-NEXT: %y:vr = PseudoVFREDMAX_VS_M1_E32 $noreg, %x, %x, 1, 5 /* e32 */, 0 /* tu, mu */
1376+
%x:vr = nofpexcept PseudoVFCVT_X_F_V_M1 $noreg, $noreg, 0, -1, 3 /* e8 */, 0
1377+
%y:vr = PseudoVFREDMAX_VS_M1_E32 $noreg, %x, %x, 1, 5 /* e32 */, 0
1378+
...
1379+
---
1380+
name: vfred_vs1_vs2_incompatible_emul
1381+
body: |
1382+
bb.0:
1383+
; CHECK-LABEL: name: vfred_vs1_vs2_incompatible_emul
1384+
; CHECK: %x:vr = nofpexcept PseudoVFCVT_X_F_V_M1 $noreg, $noreg, 0, -1, 5 /* e32 */, 0 /* tu, mu */
1385+
; CHECK-NEXT: %y:vr = PseudoVFREDMAX_VS_MF2_E32 $noreg, %x, %x, 1, 5 /* e32 */, 0 /* tu, mu */
1386+
%x:vr = nofpexcept PseudoVFCVT_X_F_V_M1 $noreg, $noreg, 0, -1, 5 /* e32 */, 0
1387+
%y:vr = PseudoVFREDMAX_VS_MF2_E32 $noreg, %x, %x, 1, 5 /* e32 */, 0
1388+
...

0 commit comments

Comments
 (0)