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AMDGPU: Stop handling legacy amdgpu-unsafe-fp-atomics attribute
This is now autoupgraded to annotate atomicrmw instructions in old bitcode.
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4 files changed

+88
-196
lines changed

4 files changed

+88
-196
lines changed

llvm/lib/Target/AMDGPU/SIISelLowering.cpp

Lines changed: 1 addition & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -16165,14 +16165,7 @@ static bool globalMemoryFPAtomicIsLegal(const GCNSubtarget &Subtarget,
1616516165
} else if (Subtarget.supportsAgentScopeFineGrainedRemoteMemoryAtomics())
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return true;
1616716167

16168-
if (RMW->hasMetadata("amdgpu.no.fine.grained.memory"))
16169-
return true;
16170-
16171-
// TODO: Auto-upgrade this attribute to the metadata in function body and stop
16172-
// checking it.
16173-
return RMW->getFunction()
16174-
->getFnAttribute("amdgpu-unsafe-fp-atomics")
16175-
.getValueAsBool();
16168+
return RMW->hasMetadata("amdgpu.no.fine.grained.memory");
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}
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/// \return Action to perform on AtomicRMWInsts for integer operations.

llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-mmra.ll

Lines changed: 3 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -124,7 +124,7 @@ define i16 @test_cmpxchg_i16_global_agent_align4(ptr addrspace(1) %out, i16 %in,
124124
ret i16 %extract
125125
}
126126

127-
define void @syncscope_workgroup_nortn(ptr %addr, float %val) #0 {
127+
define void @syncscope_workgroup_nortn(ptr %addr, float %val) {
128128
; GFX90A-LABEL: define void @syncscope_workgroup_nortn(
129129
; GFX90A-SAME: ptr [[ADDR:%.*]], float [[VAL:%.*]]) #[[ATTR1:[0-9]+]] {
130130
; GFX90A-NEXT: [[IS_SHARED:%.*]] = call i1 @llvm.amdgcn.is.shared(ptr [[ADDR]])
@@ -157,7 +157,7 @@ define void @syncscope_workgroup_nortn(ptr %addr, float %val) #0 {
157157
; GFX1100-NEXT: [[RES:%.*]] = atomicrmw fadd ptr [[ADDR]], float [[VAL]] syncscope("workgroup") seq_cst, align 4, !mmra [[META0]]
158158
; GFX1100-NEXT: ret void
159159
;
160-
%res = atomicrmw fadd ptr %addr, float %val syncscope("workgroup") seq_cst, !mmra !2
160+
%res = atomicrmw fadd ptr %addr, float %val syncscope("workgroup") seq_cst, !mmra !2, !amdgpu.no.fine.grained.memory !3, !amdgpu.ignore.denormal.mode !3
161161
ret void
162162
}
163163

@@ -186,11 +186,10 @@ define i32 @atomic_load_global_align1(ptr addrspace(1) %ptr) {
186186
ret i32 %val
187187
}
188188

189-
attributes #0 = { "amdgpu-unsafe-fp-atomics"="true" }
190-
191189
!0 = !{!"foo", !"bar"}
192190
!1 = !{!"bux", !"baz"}
193191
!2 = !{!0, !1}
192+
!3 = !{}
194193
;.
195194
; GFX90A: [[META0]] = !{[[META1:![0-9]+]], [[META2:![0-9]+]]}
196195
; GFX90A: [[META1]] = !{!"foo", !"bar"}

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