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VyacheslavLevytskyyVyacheslavLevytskyy
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[SPIR-V]: Add SPIR-V extension: SPV_KHR_cooperative_matrix (#96091)
This PR adds SPIR-V extension SPV_KHR_cooperative_matrix that "adds a new set of types known as "cooperative matrix" types, where the storage for and computations performed on the matrix are spread across a set of invocations such as a subgroup" (see https://github.com/KhronosGroup/SPIRV-Registry/blob/main/extensions/KHR/SPV_KHR_cooperative_matrix.asciidoc). This PR also fixes #96170, a new test cases is attached (llvm/test/CodeGen/SPIRV/transcoding/OpPtrCastToGeneric.ll).
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11 files changed

+232
-13
lines changed

11 files changed

+232
-13
lines changed

‎llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp

Lines changed: 72 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -558,24 +558,29 @@ static Register buildMemSemanticsReg(Register SemanticsRegister,
558558

559559
static bool buildOpFromWrapper(MachineIRBuilder &MIRBuilder, unsigned Opcode,
560560
const SPIRV::IncomingCall *Call,
561-
Register TypeReg = Register(0)) {
561+
Register TypeReg,
562+
ArrayRef<uint32_t> ImmArgs = {}) {
562563
MachineRegisterInfo *MRI = MIRBuilder.getMRI();
563564
auto MIB = MIRBuilder.buildInstr(Opcode);
564565
if (TypeReg.isValid())
565566
MIB.addDef(Call->ReturnRegister).addUse(TypeReg);
566-
for (Register ArgReg : Call->Arguments) {
567+
unsigned Sz = Call->Arguments.size() - ImmArgs.size();
568+
for (unsigned i = 0; i < Sz; ++i) {
569+
Register ArgReg = Call->Arguments[i];
567570
if (!MRI->getRegClassOrNull(ArgReg))
568571
MRI->setRegClass(ArgReg, &SPIRV::IDRegClass);
569572
MIB.addUse(ArgReg);
570573
}
574+
for (uint32_t ImmArg : ImmArgs)
575+
MIB.addImm(ImmArg);
571576
return true;
572577
}
573578

574579
/// Helper function for translating atomic init to OpStore.
575580
static bool buildAtomicInitInst(const SPIRV::IncomingCall *Call,
576581
MachineIRBuilder &MIRBuilder) {
577582
if (Call->isSpirvOp())
578-
return buildOpFromWrapper(MIRBuilder, SPIRV::OpStore, Call);
583+
return buildOpFromWrapper(MIRBuilder, SPIRV::OpStore, Call, Register(0));
579584

580585
assert(Call->Arguments.size() == 2 &&
581586
"Need 2 arguments for atomic init translation");
@@ -633,7 +638,7 @@ static bool buildAtomicStoreInst(const SPIRV::IncomingCall *Call,
633638
MachineIRBuilder &MIRBuilder,
634639
SPIRVGlobalRegistry *GR) {
635640
if (Call->isSpirvOp())
636-
return buildOpFromWrapper(MIRBuilder, SPIRV::OpAtomicStore, Call);
641+
return buildOpFromWrapper(MIRBuilder, SPIRV::OpAtomicStore, Call, Register(0));
637642

638643
Register ScopeRegister =
639644
buildConstantIntReg(SPIRV::Scope::Device, MIRBuilder, GR);
@@ -870,7 +875,7 @@ static bool buildBarrierInst(const SPIRV::IncomingCall *Call, unsigned Opcode,
870875
MachineIRBuilder &MIRBuilder,
871876
SPIRVGlobalRegistry *GR) {
872877
if (Call->isSpirvOp())
873-
return buildOpFromWrapper(MIRBuilder, Opcode, Call);
878+
return buildOpFromWrapper(MIRBuilder, Opcode, Call, Register(0));
874879

875880
MachineRegisterInfo *MRI = MIRBuilder.getMRI();
876881
unsigned MemFlags = getIConstVal(Call->Arguments[0], MRI);
@@ -1824,6 +1829,45 @@ static bool generateSelectInst(const SPIRV::IncomingCall *Call,
18241829
return true;
18251830
}
18261831

1832+
static bool generateConstructInst(const SPIRV::IncomingCall *Call,
1833+
MachineIRBuilder &MIRBuilder,
1834+
SPIRVGlobalRegistry *GR) {
1835+
return buildOpFromWrapper(MIRBuilder, SPIRV::OpCompositeConstruct, Call,
1836+
GR->getSPIRVTypeID(Call->ReturnType));
1837+
}
1838+
1839+
static bool generateCoopMatrInst(const SPIRV::IncomingCall *Call,
1840+
MachineIRBuilder &MIRBuilder,
1841+
SPIRVGlobalRegistry *GR) {
1842+
const SPIRV::DemangledBuiltin *Builtin = Call->Builtin;
1843+
unsigned Opcode =
1844+
SPIRV::lookupNativeBuiltin(Builtin->Name, Builtin->Set)->Opcode;
1845+
bool IsSet = Opcode != SPIRV::OpCooperativeMatrixStoreKHR;
1846+
unsigned ArgSz = Call->Arguments.size();
1847+
unsigned LiteralIdx = 0;
1848+
if (Opcode == SPIRV::OpCooperativeMatrixLoadKHR && ArgSz > 3)
1849+
LiteralIdx = 3;
1850+
else if (Opcode == SPIRV::OpCooperativeMatrixStoreKHR && ArgSz > 4)
1851+
LiteralIdx = 4;
1852+
SmallVector<uint32_t, 1> ImmArgs;
1853+
MachineRegisterInfo *MRI = MIRBuilder.getMRI();
1854+
if (LiteralIdx > 0)
1855+
ImmArgs.push_back(getConstFromIntrinsic(Call->Arguments[LiteralIdx], MRI));
1856+
Register TypeReg = GR->getSPIRVTypeID(Call->ReturnType);
1857+
if (Opcode == SPIRV::OpCooperativeMatrixLengthKHR) {
1858+
SPIRVType *CoopMatrType = GR->getSPIRVTypeForVReg(Call->Arguments[0]);
1859+
if (!CoopMatrType)
1860+
report_fatal_error("Can't find a register's type definition");
1861+
MIRBuilder.buildInstr(Opcode)
1862+
.addDef(Call->ReturnRegister)
1863+
.addUse(TypeReg)
1864+
.addUse(CoopMatrType->getOperand(0).getReg());
1865+
return true;
1866+
}
1867+
return buildOpFromWrapper(MIRBuilder, Opcode, Call,
1868+
IsSet ? TypeReg : Register(0), ImmArgs);
1869+
}
1870+
18271871
static bool generateSpecConstantInst(const SPIRV::IncomingCall *Call,
18281872
MachineIRBuilder &MIRBuilder,
18291873
SPIRVGlobalRegistry *GR) {
@@ -2382,6 +2426,8 @@ std::optional<bool> lowerBuiltin(const StringRef DemangledCall,
23822426
return generateSampleImageInst(DemangledCall, Call.get(), MIRBuilder, GR);
23832427
case SPIRV::Select:
23842428
return generateSelectInst(Call.get(), MIRBuilder);
2429+
case SPIRV::Construct:
2430+
return generateConstructInst(Call.get(), MIRBuilder, GR);
23852431
case SPIRV::SpecConstant:
23862432
return generateSpecConstantInst(Call.get(), MIRBuilder, GR);
23872433
case SPIRV::Enqueue:
@@ -2400,6 +2446,8 @@ std::optional<bool> lowerBuiltin(const StringRef DemangledCall,
24002446
return generateGroupUniformInst(Call.get(), MIRBuilder, GR);
24012447
case SPIRV::KernelClock:
24022448
return generateKernelClockInst(Call.get(), MIRBuilder, GR);
2449+
case SPIRV::CoopMatr:
2450+
return generateCoopMatrInst(Call.get(), MIRBuilder, GR);
24032451
}
24042452
return false;
24052453
}
@@ -2524,6 +2572,22 @@ static SPIRVType *getPipeType(const TargetExtType *ExtensionType,
25242572
ExtensionType->getIntParameter(0)));
25252573
}
25262574

2575+
static SPIRVType *getCoopMatrType(const TargetExtType *ExtensionType,
2576+
MachineIRBuilder &MIRBuilder,
2577+
SPIRVGlobalRegistry *GR) {
2578+
assert(ExtensionType->getNumIntParameters() == 4 &&
2579+
"Invalid number of parameters for SPIR-V coop matrices builtin!");
2580+
assert(ExtensionType->getNumTypeParameters() == 1 &&
2581+
"SPIR-V coop matrices builtin type must have a type parameter!");
2582+
const SPIRVType *ElemType =
2583+
GR->getOrCreateSPIRVType(ExtensionType->getTypeParameter(0), MIRBuilder);
2584+
// Create or get an existing type from GlobalRegistry.
2585+
return GR->getOrCreateOpTypeCoopMatr(
2586+
MIRBuilder, ExtensionType, ElemType, ExtensionType->getIntParameter(0),
2587+
ExtensionType->getIntParameter(1), ExtensionType->getIntParameter(2),
2588+
ExtensionType->getIntParameter(3));
2589+
}
2590+
25272591
static SPIRVType *
25282592
getImageType(const TargetExtType *ExtensionType,
25292593
const SPIRV::AccessQualifier::AccessQualifier Qualifier,
@@ -2654,6 +2718,9 @@ SPIRVType *lowerBuiltinType(const Type *OpaqueType,
26542718
case SPIRV::OpTypeSampledImage:
26552719
TargetType = getSampledImageType(BuiltinType, MIRBuilder, GR);
26562720
break;
2721+
case SPIRV::OpTypeCooperativeMatrixKHR:
2722+
TargetType = getCoopMatrType(BuiltinType, MIRBuilder, GR);
2723+
break;
26572724
default:
26582725
TargetType =
26592726
getNonParameterizedType(BuiltinType, TypeRecord, MIRBuilder, GR);

‎llvm/lib/Target/SPIRV/SPIRVBuiltins.td

Lines changed: 12 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -60,6 +60,8 @@ def AtomicFloating : BuiltinGroup;
6060
def GroupUniform : BuiltinGroup;
6161
def KernelClock : BuiltinGroup;
6262
def CastToPtr : BuiltinGroup;
63+
def Construct : BuiltinGroup;
64+
def CoopMatr : BuiltinGroup;
6365

6466
//===----------------------------------------------------------------------===//
6567
// Class defining a demangled builtin record. The information in the record
@@ -114,6 +116,9 @@ def : DemangledBuiltin<"__spirv_ImageSampleExplicitLod", OpenCL_std, SampleImage
114116
// Select builtin record:
115117
def : DemangledBuiltin<"__spirv_Select", OpenCL_std, Select, 3, 3>;
116118

119+
// Composite Construct builtin record:
120+
def : DemangledBuiltin<"__spirv_CompositeConstruct", OpenCL_std, Construct, 1, 0>;
121+
117122
//===----------------------------------------------------------------------===//
118123
// Class defining an extended builtin record used for lowering into an
119124
// OpExtInst instruction.
@@ -608,6 +613,12 @@ defm : DemangledNativeBuiltin<"__spirv_OpGenericCastToPtrExplicit_ToGlobal", Ope
608613
defm : DemangledNativeBuiltin<"__spirv_OpGenericCastToPtrExplicit_ToLocal", OpenCL_std, CastToPtr, 2, 2, OpGenericCastToPtr>;
609614
defm : DemangledNativeBuiltin<"__spirv_OpGenericCastToPtrExplicit_ToPrivate", OpenCL_std, CastToPtr, 2, 2, OpGenericCastToPtr>;
610615

616+
// Cooperative Matrix builtin records:
617+
defm : DemangledNativeBuiltin<"__spirv_CooperativeMatrixLoadKHR", OpenCL_std, CoopMatr, 2, 0, OpCooperativeMatrixLoadKHR>;
618+
defm : DemangledNativeBuiltin<"__spirv_CooperativeMatrixStoreKHR", OpenCL_std, CoopMatr, 3, 0, OpCooperativeMatrixStoreKHR>;
619+
defm : DemangledNativeBuiltin<"__spirv_CooperativeMatrixMulAddKHR", OpenCL_std, CoopMatr, 3, 0, OpCooperativeMatrixMulAddKHR>;
620+
defm : DemangledNativeBuiltin<"__spirv_CooperativeMatrixLengthKHR", OpenCL_std, CoopMatr, 1, 1, OpCooperativeMatrixLengthKHR>;
621+
611622
//===----------------------------------------------------------------------===//
612623
// Class defining a work/sub group builtin that should be translated into a
613624
// SPIR-V instruction using the defined properties.
@@ -1436,7 +1447,7 @@ def : BuiltinType<"spirv.DeviceEvent", OpTypeDeviceEvent>;
14361447
def : BuiltinType<"spirv.Image", OpTypeImage>;
14371448
def : BuiltinType<"spirv.SampledImage", OpTypeSampledImage>;
14381449
def : BuiltinType<"spirv.Pipe", OpTypePipe>;
1439-
1450+
def : BuiltinType<"spirv.CooperativeMatrixKHR", OpTypeCooperativeMatrixKHR>;
14401451

14411452
//===----------------------------------------------------------------------===//
14421453
// Class matching an OpenCL builtin type name to an equivalent SPIR-V

‎llvm/lib/Target/SPIRV/SPIRVCommandLine.cpp

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -66,6 +66,8 @@ static const std::map<std::string, SPIRV::Extension::Extension>
6666
SPIRV::Extension::Extension::SPV_INTEL_function_pointers},
6767
{"SPV_KHR_shader_clock",
6868
SPIRV::Extension::Extension::SPV_KHR_shader_clock},
69+
{"SPV_KHR_cooperative_matrix",
70+
SPIRV::Extension::Extension::SPV_KHR_cooperative_matrix},
6971
};
7072

7173
bool SPIRVExtensionsParser::parse(cl::Option &O, llvm::StringRef ArgName,

‎llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp

Lines changed: 27 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1080,12 +1080,14 @@ bool SPIRVGlobalRegistry::isScalarOrVectorSigned(const SPIRVType *Type) const {
10801080
return IntType && IntType->getOperand(2).getImm() != 0;
10811081
}
10821082

1083+
SPIRVType *SPIRVGlobalRegistry::getPointeeType(SPIRVType *PtrType) {
1084+
return PtrType && PtrType->getOpcode() == SPIRV::OpTypePointer
1085+
? getSPIRVTypeForVReg(PtrType->getOperand(2).getReg())
1086+
: nullptr;
1087+
}
1088+
10831089
unsigned SPIRVGlobalRegistry::getPointeeTypeOp(Register PtrReg) {
1084-
SPIRVType *PtrType = getSPIRVTypeForVReg(PtrReg);
1085-
SPIRVType *ElemType =
1086-
PtrType && PtrType->getOpcode() == SPIRV::OpTypePointer
1087-
? getSPIRVTypeForVReg(PtrType->getOperand(2).getReg())
1088-
: nullptr;
1090+
SPIRVType *ElemType = getPointeeType(getSPIRVTypeForVReg(PtrReg));
10891091
return ElemType ? ElemType->getOpcode() : 0;
10901092
}
10911093

@@ -1189,6 +1191,26 @@ SPIRVType *SPIRVGlobalRegistry::getOrCreateOpTypeSampledImage(
11891191
.addUse(getSPIRVTypeID(ImageType));
11901192
}
11911193

1194+
SPIRVType *SPIRVGlobalRegistry::getOrCreateOpTypeCoopMatr(
1195+
MachineIRBuilder &MIRBuilder, const TargetExtType *ExtensionType,
1196+
const SPIRVType *ElemType, uint32_t Scope, uint32_t Rows, uint32_t Columns,
1197+
uint32_t Use) {
1198+
Register ResVReg = DT.find(ExtensionType, &MIRBuilder.getMF());
1199+
if (ResVReg.isValid())
1200+
return MIRBuilder.getMF().getRegInfo().getUniqueVRegDef(ResVReg);
1201+
ResVReg = createTypeVReg(MIRBuilder);
1202+
SPIRVType *SpirvTy =
1203+
MIRBuilder.buildInstr(SPIRV::OpTypeCooperativeMatrixKHR)
1204+
.addDef(ResVReg)
1205+
.addUse(getSPIRVTypeID(ElemType))
1206+
.addUse(buildConstantInt(Scope, MIRBuilder, nullptr, true))
1207+
.addUse(buildConstantInt(Rows, MIRBuilder, nullptr, true))
1208+
.addUse(buildConstantInt(Columns, MIRBuilder, nullptr, true))
1209+
.addUse(buildConstantInt(Use, MIRBuilder, nullptr, true));
1210+
DT.add(ExtensionType, &MIRBuilder.getMF(), ResVReg);
1211+
return SpirvTy;
1212+
}
1213+
11921214
SPIRVType *SPIRVGlobalRegistry::getOrCreateOpTypeByOpcode(
11931215
const Type *Ty, MachineIRBuilder &MIRBuilder, unsigned Opcode) {
11941216
Register ResVReg = DT.find(Ty, &MIRBuilder.getMF());

‎llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h

Lines changed: 7 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -292,6 +292,8 @@ class SPIRVGlobalRegistry {
292292
return Res->second;
293293
}
294294

295+
// Return a pointee's type, or nullptr otherwise.
296+
SPIRVType *getPointeeType(SPIRVType *PtrType);
295297
// Return a pointee's type op code, or 0 otherwise.
296298
unsigned getPointeeTypeOp(Register PtrReg);
297299

@@ -514,7 +516,11 @@ class SPIRVGlobalRegistry {
514516

515517
SPIRVType *getOrCreateOpTypeSampledImage(SPIRVType *ImageType,
516518
MachineIRBuilder &MIRBuilder);
517-
519+
SPIRVType *getOrCreateOpTypeCoopMatr(MachineIRBuilder &MIRBuilder,
520+
const TargetExtType *ExtensionType,
521+
const SPIRVType *ElemType,
522+
uint32_t Scope, uint32_t Rows,
523+
uint32_t Columns, uint32_t Use);
518524
SPIRVType *
519525
getOrCreateOpTypePipe(MachineIRBuilder &MIRBuilder,
520526
SPIRV::AccessQualifier::AccessQualifier AccQual);

‎llvm/lib/Target/SPIRV/SPIRVInstrInfo.td

Lines changed: 16 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -211,6 +211,9 @@ def OpTypeAccelerationStructureNV: Op<5341, (outs TYPE:$res), (ins),
211211
def OpTypeCooperativeMatrixNV: Op<5358, (outs TYPE:$res),
212212
(ins TYPE:$compType, ID:$scope, ID:$rows, ID:$cols),
213213
"$res = OpTypeCooperativeMatrixNV $compType $scope $rows $cols">;
214+
def OpTypeCooperativeMatrixKHR: Op<4456, (outs TYPE:$res),
215+
(ins TYPE:$compType, ID:$scope, ID:$rows, ID:$cols, ID:$use),
216+
"$res = OpTypeCooperativeMatrixKHR $compType $scope $rows $cols $use">;
214217

215218
// 3.42.7 Constant-Creation Instructions
216219

@@ -864,3 +867,16 @@ def OpAsmINTEL: Op<5610, (outs ID:$res), (ins TYPE:$type, TYPE:$asm_type, ID:$ta
864867
"$res = OpAsmINTEL $type $asm_type $target $asm">;
865868
def OpAsmCallINTEL: Op<5611, (outs ID:$res), (ins TYPE:$type, ID:$asm, variable_ops),
866869
"$res = OpAsmCallINTEL $type $asm">;
870+
871+
// SPV_KHR_cooperative_matrix
872+
def OpCooperativeMatrixLoadKHR: Op<4457, (outs ID:$res),
873+
(ins TYPE:$resType, ID:$pointer, ID:$memory_layout, variable_ops),
874+
"$res = OpCooperativeMatrixLoadKHR $resType $pointer $memory_layout">;
875+
def OpCooperativeMatrixStoreKHR: Op<4458, (outs),
876+
(ins ID:$pointer, ID:$objectToStore, ID:$memory_layout, variable_ops),
877+
"OpCooperativeMatrixStoreKHR $pointer $objectToStore $memory_layout">;
878+
def OpCooperativeMatrixMulAddKHR: Op<4459, (outs ID:$res),
879+
(ins TYPE:$type, ID:$A, ID:$B, ID:$C, variable_ops),
880+
"$res = OpCooperativeMatrixMulAddKHR $type $A $B $C">;
881+
def OpCooperativeMatrixLengthKHR: Op<4460, (outs ID:$res), (ins TYPE:$type, ID:$coop_matr_type),
882+
"$res = OpCooperativeMatrixLengthKHR $type $coop_matr_type">;

‎llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1117,7 +1117,7 @@ bool SPIRVInstructionSelector::selectAddrSpaceCast(Register ResVReg,
11171117
if (isGenericCastablePtr(SrcSC) && isGenericCastablePtr(DstSC)) {
11181118
Register Tmp = MRI->createVirtualRegister(&SPIRV::IDRegClass);
11191119
SPIRVType *GenericPtrTy = GR.getOrCreateSPIRVPointerType(
1120-
SrcPtrTy, I, TII, SPIRV::StorageClass::Generic);
1120+
GR.getPointeeType(SrcPtrTy), I, TII, SPIRV::StorageClass::Generic);
11211121
MachineBasicBlock &BB = *I.getParent();
11221122
const DebugLoc &DL = I.getDebugLoc();
11231123
bool Success = BuildMI(BB, I, DL, TII.get(SPIRV::OpPtrCastToGeneric))

‎llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp

Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1168,6 +1168,15 @@ void addInstrRequirements(const MachineInstr &MI,
11681168
Reqs.addCapability(SPIRV::Capability::AsmINTEL);
11691169
}
11701170
break;
1171+
case SPIRV::OpTypeCooperativeMatrixKHR:
1172+
if (!ST.canUseExtension(SPIRV::Extension::SPV_KHR_cooperative_matrix))
1173+
report_fatal_error(
1174+
"OpTypeCooperativeMatrixKHR type requires the "
1175+
"following SPIR-V extension: SPV_KHR_cooperative_matrix",
1176+
false);
1177+
Reqs.addExtension(SPIRV::Extension::SPV_KHR_cooperative_matrix);
1178+
Reqs.addCapability(SPIRV::Capability::CooperativeMatrixKHR);
1179+
break;
11711180
default:
11721181
break;
11731182
}

‎llvm/lib/Target/SPIRV/SPIRVSymbolicOperands.td

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -302,6 +302,7 @@ defm SPV_INTEL_inline_assembly : ExtensionOperand<107>;
302302
defm SPV_INTEL_cache_controls : ExtensionOperand<108>;
303303
defm SPV_INTEL_global_variable_host_access : ExtensionOperand<109>;
304304
defm SPV_INTEL_global_variable_fpga_decorations : ExtensionOperand<110>;
305+
defm SPV_KHR_cooperative_matrix : ExtensionOperand<111>;
305306

306307
//===----------------------------------------------------------------------===//
307308
// Multiclass used to define Capabilities enum values and at the same time
@@ -478,6 +479,7 @@ defm GlobalVariableHostAccessINTEL : CapabilityOperand<6187, 0, 0, [SPV_INTEL_gl
478479
defm HostAccessINTEL : CapabilityOperand<6188, 0, 0, [SPV_INTEL_global_variable_host_access], []>;
479480
defm GlobalVariableFPGADecorationsINTEL : CapabilityOperand<6189, 0, 0, [SPV_INTEL_global_variable_fpga_decorations], []>;
480481
defm CacheControlsINTEL : CapabilityOperand<6441, 0, 0, [SPV_INTEL_cache_controls], []>;
482+
defm CooperativeMatrixKHR : CapabilityOperand<6022, 0, 0, [SPV_KHR_cooperative_matrix], []>;
481483

482484
//===----------------------------------------------------------------------===//
483485
// Multiclass used to define SourceLanguage enum values and at the same time

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