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1 parent d4e97b4 commit 585d57cCopy full SHA for 585d57c
llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
@@ -456,7 +456,7 @@ static bool isTriviallyUniform(const Use &U) {
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bool GCNTTIImpl::simplifyDemandedLaneMaskArg(InstCombiner &IC,
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IntrinsicInst &II,
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unsigned LaneArgIdx) const {
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- unsigned MaskBits = ST->isWaveSizeKnown() && ST->isWave32() ? 5 : 6;
+ unsigned MaskBits = ST->getWavefrontSizeLog2();
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APInt DemandedMask(32, maskTrailingOnes<unsigned>(MaskBits));
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KnownBits Known(32);
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