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[FastISel] Use Register. NFC
This focuses on the common interfaces and tablegen. More changes are needed to individual targets.
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9 files changed

+112
-101
lines changed

9 files changed

+112
-101
lines changed

‎llvm/include/llvm/CodeGen/FastISel.h

Lines changed: 14 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -348,21 +348,21 @@ class FastISel {
348348

349349
/// This method is called by target-independent code to request that an
350350
/// instruction with the given type and opcode be emitted.
351-
virtual unsigned fastEmit_(MVT VT, MVT RetVT, unsigned Opcode);
351+
virtual Register fastEmit_(MVT VT, MVT RetVT, unsigned Opcode);
352352

353353
/// This method is called by target-independent code to request that an
354354
/// instruction with the given type, opcode, and register operand be emitted.
355-
virtual unsigned fastEmit_r(MVT VT, MVT RetVT, unsigned Opcode, Register Op0);
355+
virtual Register fastEmit_r(MVT VT, MVT RetVT, unsigned Opcode, Register Op0);
356356

357357
/// This method is called by target-independent code to request that an
358358
/// instruction with the given type, opcode, and register operands be emitted.
359-
virtual unsigned fastEmit_rr(MVT VT, MVT RetVT, unsigned Opcode, Register Op0,
359+
virtual Register fastEmit_rr(MVT VT, MVT RetVT, unsigned Opcode, Register Op0,
360360
Register Op1);
361361

362362
/// This method is called by target-independent code to request that an
363363
/// instruction with the given type, opcode, and register and immediate
364364
/// operands be emitted.
365-
virtual unsigned fastEmit_ri(MVT VT, MVT RetVT, unsigned Opcode, Register Op0,
365+
virtual Register fastEmit_ri(MVT VT, MVT RetVT, unsigned Opcode, Register Op0,
366366
uint64_t Imm);
367367

368368
/// This method is a wrapper of fastEmit_ri.
@@ -375,12 +375,12 @@ class FastISel {
375375

376376
/// This method is called by target-independent code to request that an
377377
/// instruction with the given type, opcode, and immediate operand be emitted.
378-
virtual unsigned fastEmit_i(MVT VT, MVT RetVT, unsigned Opcode, uint64_t Imm);
378+
virtual Register fastEmit_i(MVT VT, MVT RetVT, unsigned Opcode, uint64_t Imm);
379379

380380
/// This method is called by target-independent code to request that an
381381
/// instruction with the given type, opcode, and floating-point immediate
382382
/// operand be emitted.
383-
virtual unsigned fastEmit_f(MVT VT, MVT RetVT, unsigned Opcode,
383+
virtual Register fastEmit_f(MVT VT, MVT RetVT, unsigned Opcode,
384384
const ConstantFP *FPImm);
385385

386386
/// Emit a MachineInstr with no operands and a result register in the
@@ -470,15 +470,19 @@ class FastISel {
470470

471471
/// Emit a constant in a register using target-specific logic, such as
472472
/// constant pool loads.
473-
virtual unsigned fastMaterializeConstant(const Constant *C) { return 0; }
473+
virtual Register fastMaterializeConstant(const Constant *C) {
474+
return Register();
475+
}
474476

475477
/// Emit an alloca address in a register using target-specific logic.
476-
virtual unsigned fastMaterializeAlloca(const AllocaInst *C) { return 0; }
478+
virtual Register fastMaterializeAlloca(const AllocaInst *C) {
479+
return Register();
480+
}
477481

478482
/// Emit the floating-point constant +0.0 in a register using target-
479483
/// specific logic.
480-
virtual unsigned fastMaterializeFloatZero(const ConstantFP *CF) {
481-
return 0;
484+
virtual Register fastMaterializeFloatZero(const ConstantFP *CF) {
485+
return Register();
482486
}
483487

484488
/// Check if \c Add is an add that can be safely folded into \c GEP.

‎llvm/lib/CodeGen/SelectionDAG/FastISel.cpp

Lines changed: 16 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -156,7 +156,8 @@ bool FastISel::lowerArguments() {
156156
}
157157

158158
/// Return the defined register if this instruction defines exactly one
159-
/// virtual register and uses no other virtual registers. Otherwise return 0.
159+
/// virtual register and uses no other virtual registers. Otherwise return
160+
/// Register();
160161
static Register findLocalRegDef(MachineInstr &MI) {
161162
Register RegDef;
162163
for (const MachineOperand &MO : MI.operands()) {
@@ -315,7 +316,7 @@ Register FastISel::materializeConstant(const Value *V, MVT VT) {
315316
if (!selectOperator(Op, Op->getOpcode()))
316317
if (!isa<Instruction>(Op) ||
317318
!fastSelectInstruction(cast<Instruction>(Op)))
318-
return 0;
319+
return Register();
319320
Reg = lookUpRegForValue(Op);
320321
} else if (isa<UndefValue>(V)) {
321322
Reg = createResultReg(TLI.getRegClassFor(VT));
@@ -1950,29 +1951,29 @@ bool FastISel::fastLowerIntrinsicCall(const IntrinsicInst * /*II*/) {
19501951
return false;
19511952
}
19521953

1953-
unsigned FastISel::fastEmit_(MVT, MVT, unsigned) { return 0; }
1954+
Register FastISel::fastEmit_(MVT, MVT, unsigned) { return Register(); }
19541955

1955-
unsigned FastISel::fastEmit_r(MVT, MVT, unsigned, Register /*Op0*/) {
1956-
return 0;
1956+
Register FastISel::fastEmit_r(MVT, MVT, unsigned, Register /*Op0*/) {
1957+
return Register();
19571958
}
19581959

1959-
unsigned FastISel::fastEmit_rr(MVT, MVT, unsigned, Register /*Op0*/,
1960+
Register FastISel::fastEmit_rr(MVT, MVT, unsigned, Register /*Op0*/,
19601961
Register /*Op1*/) {
1961-
return 0;
1962+
return Register();
19621963
}
19631964

1964-
unsigned FastISel::fastEmit_i(MVT, MVT, unsigned, uint64_t /*Imm*/) {
1965-
return 0;
1965+
Register FastISel::fastEmit_i(MVT, MVT, unsigned, uint64_t /*Imm*/) {
1966+
return Register();
19661967
}
19671968

1968-
unsigned FastISel::fastEmit_f(MVT, MVT, unsigned,
1969+
Register FastISel::fastEmit_f(MVT, MVT, unsigned,
19691970
const ConstantFP * /*FPImm*/) {
1970-
return 0;
1971+
return Register();
19711972
}
19721973

1973-
unsigned FastISel::fastEmit_ri(MVT, MVT, unsigned, Register /*Op0*/,
1974+
Register FastISel::fastEmit_ri(MVT, MVT, unsigned, Register /*Op0*/,
19741975
uint64_t /*Imm*/) {
1975-
return 0;
1976+
return Register();
19761977
}
19771978

19781979
/// This method is a wrapper of fastEmit_ri. It first tries to emit an
@@ -1995,7 +1996,7 @@ Register FastISel::fastEmit_ri_(MVT VT, unsigned Opcode, Register Op0,
19951996
// in-range.
19961997
if ((Opcode == ISD::SHL || Opcode == ISD::SRA || Opcode == ISD::SRL) &&
19971998
Imm >= VT.getSizeInBits())
1998-
return 0;
1999+
return Register();
19992000

20002001
// First check if immediate type is legal. If not, we can't use the ri form.
20012002
Register ResultReg = fastEmit_ri(VT, VT, Opcode, Op0, Imm);
@@ -2009,7 +2010,7 @@ Register FastISel::fastEmit_ri_(MVT VT, unsigned Opcode, Register Op0,
20092010
IntegerType::get(FuncInfo.Fn->getContext(), VT.getSizeInBits());
20102011
MaterialReg = getRegForValue(ConstantInt::get(ITy, Imm));
20112012
if (!MaterialReg)
2012-
return 0;
2013+
return Register();
20132014
}
20142015
return fastEmit_rr(VT, VT, Opcode, Op0, MaterialReg);
20152016
}

‎llvm/lib/Target/AArch64/AArch64FastISel.cpp

Lines changed: 12 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -277,9 +277,9 @@ class AArch64FastISel final : public FastISel {
277277

278278
public:
279279
// Backend specific FastISel code.
280-
unsigned fastMaterializeAlloca(const AllocaInst *AI) override;
281-
unsigned fastMaterializeConstant(const Constant *C) override;
282-
unsigned fastMaterializeFloatZero(const ConstantFP* CF) override;
280+
Register fastMaterializeAlloca(const AllocaInst *AI) override;
281+
Register fastMaterializeConstant(const Constant *C) override;
282+
Register fastMaterializeFloatZero(const ConstantFP *CF) override;
283283

284284
explicit AArch64FastISel(FunctionLoweringInfo &FuncInfo,
285285
const TargetLibraryInfo *LibInfo)
@@ -346,13 +346,13 @@ CCAssignFn *AArch64FastISel::CCAssignFnForCall(CallingConv::ID CC) const {
346346
return CC_AArch64_AAPCS;
347347
}
348348

349-
unsigned AArch64FastISel::fastMaterializeAlloca(const AllocaInst *AI) {
349+
Register AArch64FastISel::fastMaterializeAlloca(const AllocaInst *AI) {
350350
assert(TLI.getValueType(DL, AI->getType(), true) == MVT::i64 &&
351351
"Alloca should always return a pointer.");
352352

353353
// Don't handle dynamic allocas.
354354
if (!FuncInfo.StaticAllocaMap.count(AI))
355-
return 0;
355+
return Register();
356356

357357
DenseMap<const AllocaInst *, int>::iterator SI =
358358
FuncInfo.StaticAllocaMap.find(AI);
@@ -367,7 +367,7 @@ unsigned AArch64FastISel::fastMaterializeAlloca(const AllocaInst *AI) {
367367
return ResultReg;
368368
}
369369

370-
return 0;
370+
return Register();
371371
}
372372

373373
unsigned AArch64FastISel::materializeInt(const ConstantInt *CI, MVT VT) {
@@ -537,12 +537,12 @@ unsigned AArch64FastISel::materializeGV(const GlobalValue *GV) {
537537
return ResultReg;
538538
}
539539

540-
unsigned AArch64FastISel::fastMaterializeConstant(const Constant *C) {
540+
Register AArch64FastISel::fastMaterializeConstant(const Constant *C) {
541541
EVT CEVT = TLI.getValueType(DL, C->getType(), true);
542542

543543
// Only handle simple types.
544544
if (!CEVT.isSimple())
545-
return 0;
545+
return Register();
546546
MVT VT = CEVT.getSimpleVT();
547547
// arm64_32 has 32-bit pointers held in 64-bit registers. Because of that,
548548
// 'null' pointers need to have a somewhat special treatment.
@@ -558,18 +558,18 @@ unsigned AArch64FastISel::fastMaterializeConstant(const Constant *C) {
558558
else if (const GlobalValue *GV = dyn_cast<GlobalValue>(C))
559559
return materializeGV(GV);
560560

561-
return 0;
561+
return Register();
562562
}
563563

564-
unsigned AArch64FastISel::fastMaterializeFloatZero(const ConstantFP* CFP) {
564+
Register AArch64FastISel::fastMaterializeFloatZero(const ConstantFP *CFP) {
565565
assert(CFP->isNullValue() &&
566566
"Floating-point constant is not a positive zero.");
567567
MVT VT;
568568
if (!isTypeLegal(CFP->getType(), VT))
569-
return 0;
569+
return Register();
570570

571571
if (VT != MVT::f32 && VT != MVT::f64)
572-
return 0;
572+
return Register();
573573

574574
bool Is64Bit = (VT == MVT::f64);
575575
unsigned ZReg = Is64Bit ? AArch64::XZR : AArch64::WZR;

‎llvm/lib/Target/ARM/ARMFastISel.cpp

Lines changed: 12 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -147,8 +147,8 @@ class ARMFastISel final : public FastISel {
147147
// Backend specific FastISel code.
148148

149149
bool fastSelectInstruction(const Instruction *I) override;
150-
unsigned fastMaterializeConstant(const Constant *C) override;
151-
unsigned fastMaterializeAlloca(const AllocaInst *AI) override;
150+
Register fastMaterializeConstant(const Constant *C) override;
151+
Register fastMaterializeAlloca(const AllocaInst *AI) override;
152152
bool tryToFoldLoadIntoMI(MachineInstr *MI, unsigned OpNo,
153153
const LoadInst *LI) override;
154154
bool fastLowerArguments() override;
@@ -619,11 +619,12 @@ unsigned ARMFastISel::ARMMaterializeGV(const GlobalValue *GV, MVT VT) {
619619
return DestReg;
620620
}
621621

622-
unsigned ARMFastISel::fastMaterializeConstant(const Constant *C) {
622+
Register ARMFastISel::fastMaterializeConstant(const Constant *C) {
623623
EVT CEVT = TLI.getValueType(DL, C->getType(), true);
624624

625625
// Only handle simple types.
626-
if (!CEVT.isSimple()) return 0;
626+
if (!CEVT.isSimple())
627+
return Register();
627628
MVT VT = CEVT.getSimpleVT();
628629

629630
if (const ConstantFP *CFP = dyn_cast<ConstantFP>(C))
@@ -633,17 +634,19 @@ unsigned ARMFastISel::fastMaterializeConstant(const Constant *C) {
633634
else if (isa<ConstantInt>(C))
634635
return ARMMaterializeInt(C, VT);
635636

636-
return 0;
637+
return Register();
637638
}
638639

639640
// TODO: unsigned ARMFastISel::TargetMaterializeFloatZero(const ConstantFP *CF);
640641

641-
unsigned ARMFastISel::fastMaterializeAlloca(const AllocaInst *AI) {
642+
Register ARMFastISel::fastMaterializeAlloca(const AllocaInst *AI) {
642643
// Don't handle dynamic allocas.
643-
if (!FuncInfo.StaticAllocaMap.count(AI)) return 0;
644+
if (!FuncInfo.StaticAllocaMap.count(AI))
645+
return Register();
644646

645647
MVT VT;
646-
if (!isLoadTypeLegal(AI->getType(), VT)) return 0;
648+
if (!isLoadTypeLegal(AI->getType(), VT))
649+
return Register();
647650

648651
DenseMap<const AllocaInst*, int>::iterator SI =
649652
FuncInfo.StaticAllocaMap.find(AI);
@@ -663,7 +666,7 @@ unsigned ARMFastISel::fastMaterializeAlloca(const AllocaInst *AI) {
663666
return ResultReg;
664667
}
665668

666-
return 0;
669+
return Register();
667670
}
668671

669672
bool ARMFastISel::isTypeLegal(Type *Ty, MVT &VT) {

‎llvm/lib/Target/Mips/MipsFastISel.cpp

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -255,8 +255,8 @@ class MipsFastISel final : public FastISel {
255255
UnsupportedFPMode = Subtarget->isFP64bit() || Subtarget->useSoftFloat();
256256
}
257257

258-
unsigned fastMaterializeAlloca(const AllocaInst *AI) override;
259-
unsigned fastMaterializeConstant(const Constant *C) override;
258+
Register fastMaterializeAlloca(const AllocaInst *AI) override;
259+
Register fastMaterializeConstant(const Constant *C) override;
260260
bool fastSelectInstruction(const Instruction *I) override;
261261

262262
#include "MipsGenFastISel.inc"
@@ -327,7 +327,7 @@ unsigned MipsFastISel::emitLogicalOp(unsigned ISDOpc, MVT RetVT,
327327
return ResultReg;
328328
}
329329

330-
unsigned MipsFastISel::fastMaterializeAlloca(const AllocaInst *AI) {
330+
Register MipsFastISel::fastMaterializeAlloca(const AllocaInst *AI) {
331331
assert(TLI.getValueType(DL, AI->getType(), true) == MVT::i32 &&
332332
"Alloca should always return a pointer.");
333333

@@ -343,7 +343,7 @@ unsigned MipsFastISel::fastMaterializeAlloca(const AllocaInst *AI) {
343343
return ResultReg;
344344
}
345345

346-
return 0;
346+
return Register();
347347
}
348348

349349
unsigned MipsFastISel::materializeInt(const Constant *C, MVT VT) {
@@ -437,12 +437,12 @@ unsigned MipsFastISel::materializeExternalCallSym(MCSymbol *Sym) {
437437

438438
// Materialize a constant into a register, and return the register
439439
// number (or zero if we failed to handle it).
440-
unsigned MipsFastISel::fastMaterializeConstant(const Constant *C) {
440+
Register MipsFastISel::fastMaterializeConstant(const Constant *C) {
441441
EVT CEVT = TLI.getValueType(DL, C->getType(), true);
442442

443443
// Only handle simple types.
444444
if (!CEVT.isSimple())
445-
return 0;
445+
return Register();
446446
MVT VT = CEVT.getSimpleVT();
447447

448448
if (const ConstantFP *CFP = dyn_cast<ConstantFP>(C))
@@ -452,7 +452,7 @@ unsigned MipsFastISel::fastMaterializeConstant(const Constant *C) {
452452
else if (isa<ConstantInt>(C))
453453
return materializeInt(C, VT);
454454

455-
return 0;
455+
return Register();
456456
}
457457

458458
bool MipsFastISel::computeAddress(const Value *Obj, Address &Addr) {

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