Skip to content

Commit 589a24b

Browse files
[llvm-exegesis] Make preprocessor directives consistent
This patch switches out the `and` keyword for && in preprocessor directives recently added to fix some buildbot failures to be consistent with the rest of the code base.
1 parent a51c2f3 commit 589a24b

File tree

1 file changed

+2
-2
lines changed

1 file changed

+2
-2
lines changed

llvm/tools/llvm-exegesis/lib/X86/Target.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -963,7 +963,7 @@ static void restoreSyscallRegisters(std::vector<MCInst> &GeneratedCode,
963963

964964
static std::vector<MCInst> loadImmediateSegmentRegister(unsigned Reg,
965965
const APInt &Value) {
966-
#if defined(__x86_64__) and defined(__linux__)
966+
#if defined(__x86_64__) && defined(__linux__)
967967
assert(Value.getBitWidth() <= 64 && "Value must fit in the register.");
968968
std::vector<MCInst> loadSegmentRegisterCode;
969969
// Preserve the syscall registers here as we don't
@@ -990,7 +990,7 @@ static std::vector<MCInst> loadImmediateSegmentRegister(unsigned Reg,
990990
#else
991991
llvm_unreachable("Loading immediate segment registers is only supported with "
992992
"x86-64 llvm-exegesis");
993-
#endif // defined(__x86_64__) and defined(__linux__)
993+
#endif // defined(__x86_64__) && defined(__linux__)
994994
}
995995

996996
std::vector<MCInst> ExegesisX86Target::setRegTo(const MCSubtargetInfo &STI,

0 commit comments

Comments
 (0)