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| 1 | +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5 |
1 | 2 | ; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-altivec \
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2 | 3 | ; RUN: -mtriple powerpc-ibm-aix-xcoff < %s | FileCheck %s \
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3 | 4 | ; RUN: --check-prefix=SMALL32
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@@ -25,8 +26,8 @@ define void @storesTGInit(i64 %Val) #0 {
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25 | 26 | ; SMALL32-NEXT: stwu 1, -32(1)
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26 | 27 | ; SMALL32-NEXT: mr 6, 4
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27 | 28 | ; SMALL32-NEXT: mr 7, 3
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28 |
| -; SMALL32-NEXT: lwz 3, L..C0(2) |
29 |
| -; SMALL32-NEXT: lwz 4, L..C1(2) |
| 29 | +; SMALL32-NEXT: lwz 3, L..C0(2) # target-flags(ppc-tlsgdm) @TGInit |
| 30 | +; SMALL32-NEXT: lwz 4, L..C1(2) # target-flags(ppc-tlsgd) @TGInit |
30 | 31 | ; SMALL32-NEXT: stw 0, 40(1)
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31 | 32 | ; SMALL32-NEXT: bla .__tls_get_addr[PR]
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32 | 33 | ; SMALL32-NEXT: stw 6, 4(3)
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@@ -60,8 +61,8 @@ define void @storesTGInit(i64 %Val) #0 {
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60 | 61 | ; SMALL64-NEXT: mflr 0
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61 | 62 | ; SMALL64-NEXT: stdu 1, -48(1)
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62 | 63 | ; SMALL64-NEXT: mr 6, 3
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63 |
| -; SMALL64-NEXT: ld 3, L..C0(2) |
64 |
| -; SMALL64-NEXT: ld 4, L..C1(2) |
| 64 | +; SMALL64-NEXT: ld 3, L..C0(2) # target-flags(ppc-tlsgdm) @TGInit |
| 65 | +; SMALL64-NEXT: ld 4, L..C1(2) # target-flags(ppc-tlsgd) @TGInit |
65 | 66 | ; SMALL64-NEXT: std 0, 64(1)
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66 | 67 | ; SMALL64-NEXT: bla .__tls_get_addr[PR]
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67 | 68 | ; SMALL64-NEXT: std 6, 0(3)
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@@ -98,11 +99,11 @@ define void @storesTIUninit(i64 %Val) #0 {
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98 | 99 | ; SMALL32-NEXT: mflr 0
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99 | 100 | ; SMALL32-NEXT: stwu 1, -32(1)
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100 | 101 | ; SMALL32-NEXT: mr 7, 3
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101 |
| -; SMALL32-NEXT: lwz 3, L..C2(2) |
| 102 | +; SMALL32-NEXT: lwz 3, L..C2(2) # target-flags(ppc-tlsldm) @"_$TLSML" |
102 | 103 | ; SMALL32-NEXT: stw 0, 40(1)
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103 | 104 | ; SMALL32-NEXT: mr 6, 4
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104 | 105 | ; SMALL32-NEXT: bla .__tls_get_mod[PR]
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105 |
| -; SMALL32-NEXT: lwz 4, L..C3(2) |
| 106 | +; SMALL32-NEXT: lwz 4, L..C3(2) # target-flags(ppc-tlsld) @TIUninit |
106 | 107 | ; SMALL32-NEXT: stwux 7, 3, 4
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107 | 108 | ; SMALL32-NEXT: stw 6, 4(3)
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108 | 109 | ; SMALL32-NEXT: addi 1, 1, 32
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@@ -134,10 +135,10 @@ define void @storesTIUninit(i64 %Val) #0 {
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134 | 135 | ; SMALL64-NEXT: mflr 0
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135 | 136 | ; SMALL64-NEXT: stdu 1, -48(1)
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136 | 137 | ; SMALL64-NEXT: mr 6, 3
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137 |
| -; SMALL64-NEXT: ld 3, L..C2(2) |
| 138 | +; SMALL64-NEXT: ld 3, L..C2(2) # target-flags(ppc-tlsldm) @"_$TLSML" |
138 | 139 | ; SMALL64-NEXT: std 0, 64(1)
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139 | 140 | ; SMALL64-NEXT: bla .__tls_get_mod[PR]
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140 |
| -; SMALL64-NEXT: ld 4, L..C3(2) |
| 141 | +; SMALL64-NEXT: ld 4, L..C3(2) # target-flags(ppc-tlsld) @TIUninit |
141 | 142 | ; SMALL64-NEXT: stdx 6, 3, 4
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142 | 143 | ; SMALL64-NEXT: addi 1, 1, 48
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143 | 144 | ; SMALL64-NEXT: ld 0, 16(1)
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@@ -172,11 +173,11 @@ define void @storesTIInit(i64 %Val) #0 {
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172 | 173 | ; SMALL32-NEXT: mflr 0
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173 | 174 | ; SMALL32-NEXT: stwu 1, -32(1)
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174 | 175 | ; SMALL32-NEXT: mr 7, 3
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175 |
| -; SMALL32-NEXT: lwz 3, L..C2(2) |
| 176 | +; SMALL32-NEXT: lwz 3, L..C2(2) # target-flags(ppc-tlsldm) @"_$TLSML" |
176 | 177 | ; SMALL32-NEXT: stw 0, 40(1)
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177 | 178 | ; SMALL32-NEXT: mr 6, 4
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178 | 179 | ; SMALL32-NEXT: bla .__tls_get_mod[PR]
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179 |
| -; SMALL32-NEXT: lwz 4, L..C4(2) |
| 180 | +; SMALL32-NEXT: lwz 4, L..C4(2) # target-flags(ppc-tlsld) @TIInit |
180 | 181 | ; SMALL32-NEXT: stwux 7, 3, 4
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181 | 182 | ; SMALL32-NEXT: stw 6, 4(3)
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182 | 183 | ; SMALL32-NEXT: addi 1, 1, 32
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@@ -208,10 +209,10 @@ define void @storesTIInit(i64 %Val) #0 {
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208 | 209 | ; SMALL64-NEXT: mflr 0
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209 | 210 | ; SMALL64-NEXT: stdu 1, -48(1)
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210 | 211 | ; SMALL64-NEXT: mr 6, 3
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211 |
| -; SMALL64-NEXT: ld 3, L..C2(2) |
| 212 | +; SMALL64-NEXT: ld 3, L..C2(2) # target-flags(ppc-tlsldm) @"_$TLSML" |
212 | 213 | ; SMALL64-NEXT: std 0, 64(1)
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213 | 214 | ; SMALL64-NEXT: bla .__tls_get_mod[PR]
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214 |
| -; SMALL64-NEXT: ld 4, L..C4(2) |
| 215 | +; SMALL64-NEXT: ld 4, L..C4(2) # target-flags(ppc-tlsld) @TIInit |
215 | 216 | ; SMALL64-NEXT: stdx 6, 3, 4
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216 | 217 | ; SMALL64-NEXT: addi 1, 1, 48
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217 | 218 | ; SMALL64-NEXT: ld 0, 16(1)
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@@ -247,8 +248,8 @@ define void @storesTWInit(i64 %Val) #0 {
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247 | 248 | ; SMALL32-NEXT: stwu 1, -32(1)
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248 | 249 | ; SMALL32-NEXT: mr 6, 4
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249 | 250 | ; SMALL32-NEXT: mr 7, 3
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250 |
| -; SMALL32-NEXT: lwz 3, L..C5(2) |
251 |
| -; SMALL32-NEXT: lwz 4, L..C6(2) |
| 251 | +; SMALL32-NEXT: lwz 3, L..C5(2) # target-flags(ppc-tlsgdm) @TWInit |
| 252 | +; SMALL32-NEXT: lwz 4, L..C6(2) # target-flags(ppc-tlsgd) @TWInit |
252 | 253 | ; SMALL32-NEXT: stw 0, 40(1)
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253 | 254 | ; SMALL32-NEXT: bla .__tls_get_addr[PR]
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254 | 255 | ; SMALL32-NEXT: stw 6, 4(3)
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@@ -282,8 +283,8 @@ define void @storesTWInit(i64 %Val) #0 {
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282 | 283 | ; SMALL64-NEXT: mflr 0
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283 | 284 | ; SMALL64-NEXT: stdu 1, -48(1)
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284 | 285 | ; SMALL64-NEXT: mr 6, 3
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285 |
| -; SMALL64-NEXT: ld 3, L..C5(2) |
286 |
| -; SMALL64-NEXT: ld 4, L..C6(2) |
| 286 | +; SMALL64-NEXT: ld 3, L..C5(2) # target-flags(ppc-tlsgdm) @TWInit |
| 287 | +; SMALL64-NEXT: ld 4, L..C6(2) # target-flags(ppc-tlsgd) @TWInit |
287 | 288 | ; SMALL64-NEXT: std 0, 64(1)
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288 | 289 | ; SMALL64-NEXT: bla .__tls_get_addr[PR]
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289 | 290 | ; SMALL64-NEXT: std 6, 0(3)
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@@ -319,11 +320,11 @@ define i64 @loadsTGInit() #1 {
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319 | 320 | ; SMALL32: # %bb.0: # %entry
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320 | 321 | ; SMALL32-NEXT: mflr 0
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321 | 322 | ; SMALL32-NEXT: stwu 1, -32(1)
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322 |
| -; SMALL32-NEXT: lwz 3, L..C0(2) |
323 |
| -; SMALL32-NEXT: lwz 4, L..C1(2) |
| 323 | +; SMALL32-NEXT: lwz 3, L..C0(2) # target-flags(ppc-tlsgdm) @TGInit |
| 324 | +; SMALL32-NEXT: lwz 4, L..C1(2) # target-flags(ppc-tlsgd) @TGInit |
324 | 325 | ; SMALL32-NEXT: stw 0, 40(1)
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325 | 326 | ; SMALL32-NEXT: bla .__tls_get_addr[PR]
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326 |
| -; SMALL32-NEXT: lwz 4, L..C7(2) |
| 327 | +; SMALL32-NEXT: lwz 4, L..C7(2) # @GInit |
327 | 328 | ; SMALL32-NEXT: lwz 5, 4(3)
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328 | 329 | ; SMALL32-NEXT: lwz 6, 4(4)
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329 | 330 | ; SMALL32-NEXT: lwz 3, 0(3)
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@@ -362,11 +363,11 @@ define i64 @loadsTGInit() #1 {
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362 | 363 | ; SMALL64: # %bb.0: # %entry
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363 | 364 | ; SMALL64-NEXT: mflr 0
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364 | 365 | ; SMALL64-NEXT: stdu 1, -48(1)
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365 |
| -; SMALL64-NEXT: ld 3, L..C0(2) |
366 |
| -; SMALL64-NEXT: ld 4, L..C1(2) |
| 366 | +; SMALL64-NEXT: ld 3, L..C0(2) # target-flags(ppc-tlsgdm) @TGInit |
| 367 | +; SMALL64-NEXT: ld 4, L..C1(2) # target-flags(ppc-tlsgd) @TGInit |
367 | 368 | ; SMALL64-NEXT: std 0, 64(1)
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368 | 369 | ; SMALL64-NEXT: bla .__tls_get_addr[PR]
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369 |
| -; SMALL64-NEXT: ld 4, L..C7(2) |
| 370 | +; SMALL64-NEXT: ld 4, L..C7(2) # @GInit |
370 | 371 | ; SMALL64-NEXT: ld 3, 0(3)
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371 | 372 | ; SMALL64-NEXT: ld 4, 0(4)
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372 | 373 | ; SMALL64-NEXT: add 3, 4, 3
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@@ -407,11 +408,11 @@ define i64 @loadsTIUninit() #1 {
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407 | 408 | ; SMALL32: # %bb.0: # %entry
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408 | 409 | ; SMALL32-NEXT: mflr 0
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409 | 410 | ; SMALL32-NEXT: stwu 1, -32(1)
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410 |
| -; SMALL32-NEXT: lwz 3, L..C2(2) |
| 411 | +; SMALL32-NEXT: lwz 3, L..C2(2) # target-flags(ppc-tlsldm) @"_$TLSML" |
411 | 412 | ; SMALL32-NEXT: stw 0, 40(1)
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412 | 413 | ; SMALL32-NEXT: bla .__tls_get_mod[PR]
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413 |
| -; SMALL32-NEXT: lwz 4, L..C3(2) |
414 |
| -; SMALL32-NEXT: lwz 5, L..C7(2) |
| 414 | +; SMALL32-NEXT: lwz 4, L..C3(2) # target-flags(ppc-tlsld) @TIUninit |
| 415 | +; SMALL32-NEXT: lwz 5, L..C7(2) # @GInit |
415 | 416 | ; SMALL32-NEXT: lwzux 6, 3, 4
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416 | 417 | ; SMALL32-NEXT: lwz 4, 4(5)
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417 | 418 | ; SMALL32-NEXT: lwz 3, 4(3)
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@@ -450,12 +451,12 @@ define i64 @loadsTIUninit() #1 {
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450 | 451 | ; SMALL64: # %bb.0: # %entry
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451 | 452 | ; SMALL64-NEXT: mflr 0
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452 | 453 | ; SMALL64-NEXT: stdu 1, -48(1)
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453 |
| -; SMALL64-NEXT: ld 3, L..C2(2) |
| 454 | +; SMALL64-NEXT: ld 3, L..C2(2) # target-flags(ppc-tlsldm) @"_$TLSML" |
454 | 455 | ; SMALL64-NEXT: std 0, 64(1)
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455 | 456 | ; SMALL64-NEXT: bla .__tls_get_mod[PR]
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456 |
| -; SMALL64-NEXT: ld 4, L..C3(2) |
| 457 | +; SMALL64-NEXT: ld 4, L..C3(2) # target-flags(ppc-tlsld) @TIUninit |
457 | 458 | ; SMALL64-NEXT: ldx 3, 3, 4
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458 |
| -; SMALL64-NEXT: ld 4, L..C7(2) |
| 459 | +; SMALL64-NEXT: ld 4, L..C7(2) # @GInit |
459 | 460 | ; SMALL64-NEXT: ld 4, 0(4)
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460 | 461 | ; SMALL64-NEXT: add 3, 4, 3
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461 | 462 | ; SMALL64-NEXT: addi 1, 1, 48
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@@ -495,11 +496,11 @@ define i64 @loadsTIInit() #1 {
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495 | 496 | ; SMALL32: # %bb.0: # %entry
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496 | 497 | ; SMALL32-NEXT: mflr 0
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497 | 498 | ; SMALL32-NEXT: stwu 1, -32(1)
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498 |
| -; SMALL32-NEXT: lwz 3, L..C2(2) |
| 499 | +; SMALL32-NEXT: lwz 3, L..C2(2) # target-flags(ppc-tlsldm) @"_$TLSML" |
499 | 500 | ; SMALL32-NEXT: stw 0, 40(1)
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500 | 501 | ; SMALL32-NEXT: bla .__tls_get_mod[PR]
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501 |
| -; SMALL32-NEXT: lwz 4, L..C4(2) |
502 |
| -; SMALL32-NEXT: lwz 5, L..C7(2) |
| 502 | +; SMALL32-NEXT: lwz 4, L..C4(2) # target-flags(ppc-tlsld) @TIInit |
| 503 | +; SMALL32-NEXT: lwz 5, L..C7(2) # @GInit |
503 | 504 | ; SMALL32-NEXT: lwzux 6, 3, 4
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504 | 505 | ; SMALL32-NEXT: lwz 4, 4(5)
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505 | 506 | ; SMALL32-NEXT: lwz 3, 4(3)
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@@ -538,12 +539,12 @@ define i64 @loadsTIInit() #1 {
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538 | 539 | ; SMALL64: # %bb.0: # %entry
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539 | 540 | ; SMALL64-NEXT: mflr 0
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540 | 541 | ; SMALL64-NEXT: stdu 1, -48(1)
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541 |
| -; SMALL64-NEXT: ld 3, L..C2(2) |
| 542 | +; SMALL64-NEXT: ld 3, L..C2(2) # target-flags(ppc-tlsldm) @"_$TLSML" |
542 | 543 | ; SMALL64-NEXT: std 0, 64(1)
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543 | 544 | ; SMALL64-NEXT: bla .__tls_get_mod[PR]
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544 |
| -; SMALL64-NEXT: ld 4, L..C4(2) |
| 545 | +; SMALL64-NEXT: ld 4, L..C4(2) # target-flags(ppc-tlsld) @TIInit |
545 | 546 | ; SMALL64-NEXT: ldx 3, 3, 4
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546 |
| -; SMALL64-NEXT: ld 4, L..C7(2) |
| 547 | +; SMALL64-NEXT: ld 4, L..C7(2) # @GInit |
547 | 548 | ; SMALL64-NEXT: ld 4, 0(4)
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548 | 549 | ; SMALL64-NEXT: add 3, 4, 3
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549 | 550 | ; SMALL64-NEXT: addi 1, 1, 48
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@@ -583,11 +584,11 @@ define i64 @loadsTWInit() #1 {
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583 | 584 | ; SMALL32: # %bb.0: # %entry
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584 | 585 | ; SMALL32-NEXT: mflr 0
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585 | 586 | ; SMALL32-NEXT: stwu 1, -32(1)
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586 |
| -; SMALL32-NEXT: lwz 3, L..C5(2) |
587 |
| -; SMALL32-NEXT: lwz 4, L..C6(2) |
| 587 | +; SMALL32-NEXT: lwz 3, L..C5(2) # target-flags(ppc-tlsgdm) @TWInit |
| 588 | +; SMALL32-NEXT: lwz 4, L..C6(2) # target-flags(ppc-tlsgd) @TWInit |
588 | 589 | ; SMALL32-NEXT: stw 0, 40(1)
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589 | 590 | ; SMALL32-NEXT: bla .__tls_get_addr[PR]
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590 |
| -; SMALL32-NEXT: lwz 4, L..C7(2) |
| 591 | +; SMALL32-NEXT: lwz 4, L..C7(2) # @GInit |
591 | 592 | ; SMALL32-NEXT: lwz 5, 4(3)
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592 | 593 | ; SMALL32-NEXT: lwz 6, 4(4)
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593 | 594 | ; SMALL32-NEXT: lwz 3, 0(3)
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@@ -626,11 +627,11 @@ define i64 @loadsTWInit() #1 {
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626 | 627 | ; SMALL64: # %bb.0: # %entry
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627 | 628 | ; SMALL64-NEXT: mflr 0
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628 | 629 | ; SMALL64-NEXT: stdu 1, -48(1)
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629 |
| -; SMALL64-NEXT: ld 3, L..C5(2) |
630 |
| -; SMALL64-NEXT: ld 4, L..C6(2) |
| 630 | +; SMALL64-NEXT: ld 3, L..C5(2) # target-flags(ppc-tlsgdm) @TWInit |
| 631 | +; SMALL64-NEXT: ld 4, L..C6(2) # target-flags(ppc-tlsgd) @TWInit |
631 | 632 | ; SMALL64-NEXT: std 0, 64(1)
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632 | 633 | ; SMALL64-NEXT: bla .__tls_get_addr[PR]
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633 |
| -; SMALL64-NEXT: ld 4, L..C7(2) |
| 634 | +; SMALL64-NEXT: ld 4, L..C7(2) # @GInit |
634 | 635 | ; SMALL64-NEXT: ld 3, 0(3)
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635 | 636 | ; SMALL64-NEXT: ld 4, 0(4)
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636 | 637 | ; SMALL64-NEXT: add 3, 4, 3
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