Skip to content

Commit 592b1d8

Browse files
broxigarchenbroxigarchen
committed
vopc tmp
1 parent f5b81aa commit 592b1d8

File tree

1 file changed

+94
-8
lines changed

1 file changed

+94
-8
lines changed

‎llvm/lib/Target/AMDGPU/VOPCInstructions.td

Lines changed: 94 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -88,6 +88,7 @@ multiclass VOPC_Profile_t16<list<SchedReadWrite> sched, ValueType vt0, ValueType
8888
def NAME : VOPC_Profile<sched, vt0, vt1>;
8989
def _t16 : VOPC_Profile<sched, vt0, vt1> {
9090
let IsTrue16 = 1;
91+
let IsRealTrue16 = 1;
9192
let Src1RC32 = getVregSrcForVT<Src1VT, 1/*IsTrue16*/, 1/*IsFake16*/>.ret;
9293
let Src0DPP = getVregSrcForVT<Src0VT, 1/*IsTrue16*/, 1/*IsFake16*/>.ret;
9394
let Src1DPP = getVregSrcForVT<Src1VT, 1/*IsTrue16*/, 1/*IsFake16*/>.ret;
@@ -118,6 +119,7 @@ multiclass VOPC_NoSdst_Profile_t16<list<SchedReadWrite> sched, ValueType vt0, Va
118119
def NAME : VOPC_NoSdst_Profile<sched, vt0, vt1>;
119120
def _t16 : VOPC_NoSdst_Profile<sched, vt0, vt1> {
120121
let IsTrue16 = 1;
122+
let IsRealTrue16 = 1;
121123
let Src1RC32 = getVregSrcForVT<Src1VT, 1/*IsTrue16*/, 1/*IsFake16*/>.ret;
122124
let Src0DPP = getVregSrcForVT<Src0VT, 1/*IsTrue16*/, 1/*IsFake16*/>.ret;
123125
let Src1DPP = getVregSrcForVT<Src1VT, 1/*IsTrue16*/, 1/*IsFake16*/>.ret;
@@ -412,9 +414,12 @@ multiclass VOPC_F16 <string opName, SDPatternOperator cond = COND_NULL,
412414
let OtherPredicates = [Has16BitInsts], True16Predicate = NotHasTrue16BitInsts in {
413415
defm NAME : VOPC_Pseudos <opName, VOPC_I1_F16_F16, cond, revOp, 0>;
414416
}
415-
let OtherPredicates = [HasTrue16BitInsts] in {
417+
let True16Predicate = UseRealTrue16Insts in {
416418
defm _t16 : VOPC_Pseudos <opName#"_t16", VOPC_I1_F16_F16_t16, cond, revOp#"_t16", 0>;
417419
}
420+
let True16Predicate = UseFakeTrue16Insts in {
421+
defm _fake16 : VOPC_Pseudos <opName#"_fake16", VOPC_I1_F16_F16, cond, revOp#"_fake16", 0>;
422+
}
418423
}
419424

420425
multiclass VOPC_F32 <string opName, SDPatternOperator cond = COND_NULL, string revOp = opName> :
@@ -428,9 +433,12 @@ multiclass VOPC_I16 <string opName, SDPatternOperator cond = COND_NULL,
428433
let OtherPredicates = [Has16BitInsts], True16Predicate = NotHasTrue16BitInsts in {
429434
defm NAME : VOPC_Pseudos <opName, VOPC_I1_I16_I16, cond, revOp, 0>;
430435
}
431-
let OtherPredicates = [HasTrue16BitInsts] in {
436+
let True16Predicate = UseRealTrue16Insts in {
432437
defm _t16 : VOPC_Pseudos <opName#"_t16", VOPC_I1_I16_I16_t16, cond, revOp#"_t16", 0>;
433438
}
439+
let True16Predicate = UseFakeTrue16Insts in {
440+
defm _fake16 : VOPC_Pseudos <opName#"_fake16", VOPC_I1_I16_I16, cond, revOp#"_fake16", 0>;
441+
}
434442
}
435443

436444
multiclass VOPC_I32 <string opName, SDPatternOperator cond = COND_NULL, string revOp = opName> :
@@ -445,9 +453,12 @@ multiclass VOPCX_F16<string opName, string revOp = opName> {
445453
let OtherPredicates = [Has16BitInsts], True16Predicate = NotHasTrue16BitInsts in {
446454
defm NAME : VOPCX_Pseudos <opName, VOPC_I1_F16_F16, VOPC_F16_F16, COND_NULL, revOp>;
447455
}
448-
let OtherPredicates = [HasTrue16BitInsts] in {
456+
let True16Predicate = UseRealTrue16Insts in {
449457
defm _t16 : VOPCX_Pseudos <opName#"_t16", VOPC_I1_F16_F16_t16, VOPC_F16_F16_t16, COND_NULL, revOp#"_t16">;
450458
}
459+
let True16Predicate = UseFakeTrue16Insts in {
460+
defm _fake16 : VOPCX_Pseudos <opName#"_fake16", VOPC_I1_F16_F16, VOPC_F16_F16, COND_NULL, revOp#"_fake16">;
461+
}
451462
}
452463

453464
multiclass VOPCX_F32 <string opName, string revOp = opName> :
@@ -460,9 +471,12 @@ multiclass VOPCX_I16<string opName, string revOp = opName> {
460471
let OtherPredicates = [Has16BitInsts], True16Predicate = NotHasTrue16BitInsts in {
461472
defm NAME : VOPCX_Pseudos <opName, VOPC_I1_I16_I16, VOPC_I16_I16, COND_NULL, revOp>;
462473
}
463-
let OtherPredicates = [HasTrue16BitInsts] in {
474+
let True16Predicate = UseRealTrue16Insts in {
464475
defm _t16 : VOPCX_Pseudos <opName#"_t16", VOPC_I1_I16_I16_t16, VOPC_I16_I16_t16, COND_NULL, revOp#"_t16">;
465476
}
477+
let True16Predicate = UseFakeTrue16Insts in {
478+
defm _fake16 : VOPCX_Pseudos <opName#"_fake16", VOPC_I1_I16_I16, VOPC_I16_I16, COND_NULL, revOp#"_fake16">;
479+
}
466480
}
467481

468482
multiclass VOPCX_I32 <string opName, string revOp = opName> :
@@ -796,6 +810,7 @@ multiclass VOPC_Class_Profile_t16<list<SchedReadWrite> sched> {
796810
def NAME : VOPC_Class_Profile<sched, f16>;
797811
def _t16 : VOPC_Class_Profile<sched, f16, i16> {
798812
let IsTrue16 = 1;
813+
let IsRealTrue16 = 1;
799814
let Src1RC32 = getVregSrcForVT<Src1VT, 1/*IsTrue16*/, 1/*IsFake16*/>.ret;
800815
let Src1RC64 = VSrc_b32;
801816
let Src0DPP = getVregSrcForVT<Src0VT, 1/*IsTrue16*/, 1/*IsFake16*/>.ret;
@@ -823,6 +838,7 @@ multiclass VOPC_Class_NoSdst_Profile_t16<list<SchedReadWrite> sched> {
823838
def NAME : VOPC_Class_NoSdst_Profile<sched, f16>;
824839
def _t16 : VOPC_Class_NoSdst_Profile<sched, f16, i16> {
825840
let IsTrue16 = 1;
841+
let IsRealTrue16 = 1;
826842
let Src1RC32 = getVregSrcForVT<Src1VT, 1/*IsTrue16*/, 1/*IsFake16*/>.ret;
827843
let Src1RC64 = VSrc_b32;
828844
let Src0DPP = getVregSrcForVT<Src0VT, 1/*IsTrue16*/, 1/*IsFake16*/>.ret;
@@ -948,18 +964,24 @@ multiclass VOPC_CLASS_F16 <string opName> {
948964
let OtherPredicates = [Has16BitInsts], True16Predicate = NotHasTrue16BitInsts in {
949965
defm NAME : VOPC_Class_Pseudos <opName, VOPC_I1_F16_I16, 0>;
950966
}
951-
let OtherPredicates = [HasTrue16BitInsts] in {
967+
let OtherPredicates = [UseRealTrue16Insts] in {
952968
defm _t16 : VOPC_Class_Pseudos <opName#"_t16", VOPC_I1_F16_I16_t16, 0>;
953969
}
970+
let OtherPredicates = [UseFakeTrue16Insts] in {
971+
defm _fake16 : VOPC_Class_Pseudos <opName#"_fake16", VOPC_I1_F16_I16, 0>;
972+
}
954973
}
955974

956975
multiclass VOPCX_CLASS_F16 <string opName> {
957976
let OtherPredicates = [Has16BitInsts], True16Predicate = NotHasTrue16BitInsts in {
958977
defm NAME : VOPCX_Class_Pseudos <opName, VOPC_I1_F16_I16, VOPC_F16_I16>;
959978
}
960-
let OtherPredicates = [HasTrue16BitInsts] in {
979+
let OtherPredicates = [UseRealTrue16Insts] in {
961980
defm _t16 : VOPCX_Class_Pseudos <opName#"_t16", VOPC_I1_F16_I16_t16, VOPC_F16_I16_t16>;
962981
}
982+
let OtherPredicates = [UseFakeTrue16Insts] in {
983+
defm _fake16 : VOPCX_Class_Pseudos <opName#"_fake16", VOPC_I1_F16_I16, VOPC_F16_I16>;
984+
}
963985
}
964986

965987
multiclass VOPC_CLASS_F32 <string opName> :
@@ -1401,7 +1423,7 @@ multiclass VOPC_Real_with_name<GFXGen Gen, bits<9> op, string OpName,
14011423
pseudo_mnemonic),
14021424
asm_name, ps64.AsmVariantName>;
14031425

1404-
let DecoderNamespace = Gen.DecoderNamespace in {
1426+
let DecoderNamespace = Gen.DecoderNamespace # !if(ps32.Pfl.IsRealTrue16, "", "_FAKE16") in {
14051427
def _e32#Gen.Suffix :
14061428
// 32 and 64 bit forms of the instruction have _e32 and _e64
14071429
// respectively appended to their assembly mnemonic.
@@ -1530,7 +1552,7 @@ multiclass VOPCX_Real_with_name<GFXGen Gen, bits<9> op, string OpName,
15301552
pseudo_mnemonic),
15311553
asm_name, ps64.AsmVariantName>;
15321554

1533-
let DecoderNamespace = Gen.DecoderNamespace in {
1555+
let DecoderNamespace = Gen.DecoderNamespace # !if(ps32.Pfl.IsRealTrue16, "", "_FAKE16") in {
15341556
def _e32#Gen.Suffix
15351557
: VOPC_Real<ps32, Gen.Subtarget, asm_name>,
15361558
VOPCe<op{7-0}> {
@@ -1623,6 +1645,22 @@ defm V_CMP_NGT_F16_t16 : VOPC_Real_t16_gfx11_gfx12<0x00b, "v_cmp_ngt_f16">;
16231645
defm V_CMP_NLE_F16_t16 : VOPC_Real_t16_gfx11_gfx12<0x00c, "v_cmp_nle_f16">;
16241646
defm V_CMP_NEQ_F16_t16 : VOPC_Real_t16_gfx11_gfx12<0x00d, "v_cmp_neq_f16">;
16251647
defm V_CMP_NLT_F16_t16 : VOPC_Real_t16_gfx11_gfx12<0x00e, "v_cmp_nlt_f16">;
1648+
1649+
defm V_CMP_LT_F16_fake16 : VOPC_Real_t16_gfx11_gfx12<0x001, "v_cmp_lt_f16">;
1650+
defm V_CMP_EQ_F16_fake16 : VOPC_Real_t16_gfx11_gfx12<0x002, "v_cmp_eq_f16">;
1651+
defm V_CMP_LE_F16_fake16 : VOPC_Real_t16_gfx11_gfx12<0x003, "v_cmp_le_f16">;
1652+
defm V_CMP_GT_F16_fake16 : VOPC_Real_t16_gfx11_gfx12<0x004, "v_cmp_gt_f16">;
1653+
defm V_CMP_LG_F16_fake16 : VOPC_Real_t16_gfx11_gfx12<0x005, "v_cmp_lg_f16">;
1654+
defm V_CMP_GE_F16_fake16 : VOPC_Real_t16_gfx11_gfx12<0x006, "v_cmp_ge_f16">;
1655+
defm V_CMP_O_F16_fake16 : VOPC_Real_t16_gfx11_gfx12<0x007, "v_cmp_o_f16">;
1656+
defm V_CMP_U_F16_fake16 : VOPC_Real_t16_gfx11_gfx12<0x008, "v_cmp_u_f16">;
1657+
defm V_CMP_NGE_F16_fake16 : VOPC_Real_t16_gfx11_gfx12<0x009, "v_cmp_nge_f16">;
1658+
defm V_CMP_NLG_F16_fake16 : VOPC_Real_t16_gfx11_gfx12<0x00a, "v_cmp_nlg_f16">;
1659+
defm V_CMP_NGT_F16_fake16 : VOPC_Real_t16_gfx11_gfx12<0x00b, "v_cmp_ngt_f16">;
1660+
defm V_CMP_NLE_F16_fake16 : VOPC_Real_t16_gfx11_gfx12<0x00c, "v_cmp_nle_f16">;
1661+
defm V_CMP_NEQ_F16_fake16 : VOPC_Real_t16_gfx11_gfx12<0x00d, "v_cmp_neq_f16">;
1662+
defm V_CMP_NLT_F16_fake16 : VOPC_Real_t16_gfx11_gfx12<0x00e, "v_cmp_nlt_f16">;
1663+
16261664
defm V_CMP_T_F16_t16 : VOPC_Real_with_name_gfx11<0x00f, "V_CMP_TRU_F16_t16", "v_cmp_t_f16", "v_cmp_tru_f16">;
16271665
defm V_CMP_F_F32 : VOPC_Real_gfx11<0x010>;
16281666
defm V_CMP_LT_F32 : VOPC_Real_gfx11_gfx12<0x011>;
@@ -1641,6 +1679,7 @@ defm V_CMP_NEQ_F32 : VOPC_Real_gfx11_gfx12<0x01d>;
16411679
defm V_CMP_NLT_F32 : VOPC_Real_gfx11_gfx12<0x01e>;
16421680
defm V_CMP_T_F32 : VOPC_Real_with_name_gfx11<0x01f, "V_CMP_TRU_F32", "v_cmp_t_f32">;
16431681
defm V_CMP_T_F64 : VOPC_Real_with_name_gfx11<0x02f, "V_CMP_TRU_F64", "v_cmp_t_f64">;
1682+
16441683
defm V_CMP_LT_I16_t16 : VOPC_Real_t16_gfx11_gfx12<0x031, "v_cmp_lt_i16">;
16451684
defm V_CMP_EQ_I16_t16 : VOPC_Real_t16_gfx11_gfx12<0x032, "v_cmp_eq_i16">;
16461685
defm V_CMP_LE_I16_t16 : VOPC_Real_t16_gfx11_gfx12<0x033, "v_cmp_le_i16">;
@@ -1653,6 +1692,20 @@ defm V_CMP_LE_U16_t16 : VOPC_Real_t16_gfx11_gfx12<0x03b, "v_cmp_le_u16">;
16531692
defm V_CMP_GT_U16_t16 : VOPC_Real_t16_gfx11_gfx12<0x03c, "v_cmp_gt_u16">;
16541693
defm V_CMP_NE_U16_t16 : VOPC_Real_t16_gfx11_gfx12<0x03d, "v_cmp_ne_u16">;
16551694
defm V_CMP_GE_U16_t16 : VOPC_Real_t16_gfx11_gfx12<0x03e, "v_cmp_ge_u16">;
1695+
1696+
defm V_CMP_LT_I16_fake16 : VOPC_Real_t16_gfx11_gfx12<0x031, "v_cmp_lt_i16">;
1697+
defm V_CMP_EQ_I16_fake16 : VOPC_Real_t16_gfx11_gfx12<0x032, "v_cmp_eq_i16">;
1698+
defm V_CMP_LE_I16_fake16 : VOPC_Real_t16_gfx11_gfx12<0x033, "v_cmp_le_i16">;
1699+
defm V_CMP_GT_I16_fake16 : VOPC_Real_t16_gfx11_gfx12<0x034, "v_cmp_gt_i16">;
1700+
defm V_CMP_NE_I16_fake16 : VOPC_Real_t16_gfx11_gfx12<0x035, "v_cmp_ne_i16">;
1701+
defm V_CMP_GE_I16_fake16 : VOPC_Real_t16_gfx11_gfx12<0x036, "v_cmp_ge_i16">;
1702+
defm V_CMP_LT_U16_fake16 : VOPC_Real_t16_gfx11_gfx12<0x039, "v_cmp_lt_u16">;
1703+
defm V_CMP_EQ_U16_fake16 : VOPC_Real_t16_gfx11_gfx12<0x03a, "v_cmp_eq_u16">;
1704+
defm V_CMP_LE_U16_fake16 : VOPC_Real_t16_gfx11_gfx12<0x03b, "v_cmp_le_u16">;
1705+
defm V_CMP_GT_U16_fake16 : VOPC_Real_t16_gfx11_gfx12<0x03c, "v_cmp_gt_u16">;
1706+
defm V_CMP_NE_U16_fake16 : VOPC_Real_t16_gfx11_gfx12<0x03d, "v_cmp_ne_u16">;
1707+
defm V_CMP_GE_U16_fake16 : VOPC_Real_t16_gfx11_gfx12<0x03e, "v_cmp_ge_u16">;
1708+
16561709
defm V_CMP_F_I32 : VOPC_Real_gfx11<0x040>;
16571710
defm V_CMP_LT_I32 : VOPC_Real_gfx11_gfx12<0x041>;
16581711
defm V_CMP_EQ_I32 : VOPC_Real_gfx11_gfx12<0x042>;
@@ -1688,6 +1741,7 @@ defm V_CMP_GE_U64 : VOPC_Real_gfx11_gfx12<0x05e>;
16881741
defm V_CMP_T_U64 : VOPC_Real_gfx11<0x05f>;
16891742

16901743
defm V_CMP_CLASS_F16_t16 : VOPC_Real_t16_gfx11_gfx12<0x07d, "v_cmp_class_f16">;
1744+
defm V_CMP_CLASS_F16_fake16 : VOPC_Real_t16_gfx11_gfx12<0x07d, "v_cmp_class_f16">;
16911745
defm V_CMP_CLASS_F32 : VOPC_Real_gfx11_gfx12<0x07e>;
16921746
defm V_CMP_CLASS_F64 : VOPC_Real_gfx11_gfx12<0x07f>;
16931747

@@ -1707,6 +1761,23 @@ defm V_CMPX_NLE_F16_t16 : VOPCX_Real_t16_gfx11_gfx12<0x08c, "v_cmpx_nle_f16">;
17071761
defm V_CMPX_NEQ_F16_t16 : VOPCX_Real_t16_gfx11_gfx12<0x08d, "v_cmpx_neq_f16">;
17081762
defm V_CMPX_NLT_F16_t16 : VOPCX_Real_t16_gfx11_gfx12<0x08e, "v_cmpx_nlt_f16">;
17091763
defm V_CMPX_T_F16_t16 : VOPCX_Real_with_name_gfx11<0x08f, "V_CMPX_TRU_F16_t16", "v_cmpx_t_f16", "v_cmpx_tru_f16">;
1764+
1765+
defm V_CMPX_F_F16_fake16 : VOPCX_Real_t16_gfx11<0x080, "v_cmpx_f_f16">;
1766+
defm V_CMPX_LT_F16_fake16 : VOPCX_Real_t16_gfx11_gfx12<0x081, "v_cmpx_lt_f16">;
1767+
defm V_CMPX_EQ_F16_fake16 : VOPCX_Real_t16_gfx11_gfx12<0x082, "v_cmpx_eq_f16">;
1768+
defm V_CMPX_LE_F16_fake16 : VOPCX_Real_t16_gfx11_gfx12<0x083, "v_cmpx_le_f16">;
1769+
defm V_CMPX_GT_F16_fake16 : VOPCX_Real_t16_gfx11_gfx12<0x084, "v_cmpx_gt_f16">;
1770+
defm V_CMPX_LG_F16_fake16 : VOPCX_Real_t16_gfx11_gfx12<0x085, "v_cmpx_lg_f16">;
1771+
defm V_CMPX_GE_F16_fake16 : VOPCX_Real_t16_gfx11_gfx12<0x086, "v_cmpx_ge_f16">;
1772+
defm V_CMPX_O_F16_fake16 : VOPCX_Real_t16_gfx11_gfx12<0x087, "v_cmpx_o_f16">;
1773+
defm V_CMPX_U_F16_fake16 : VOPCX_Real_t16_gfx11_gfx12<0x088, "v_cmpx_u_f16">;
1774+
defm V_CMPX_NGE_F16_fake16 : VOPCX_Real_t16_gfx11_gfx12<0x089, "v_cmpx_nge_f16">;
1775+
defm V_CMPX_NLG_F16_fake16 : VOPCX_Real_t16_gfx11_gfx12<0x08a, "v_cmpx_nlg_f16">;
1776+
defm V_CMPX_NGT_F16_fake16 : VOPCX_Real_t16_gfx11_gfx12<0x08b, "v_cmpx_ngt_f16">;
1777+
defm V_CMPX_NLE_F16_fake16 : VOPCX_Real_t16_gfx11_gfx12<0x08c, "v_cmpx_nle_f16">;
1778+
defm V_CMPX_NEQ_F16_fake16 : VOPCX_Real_t16_gfx11_gfx12<0x08d, "v_cmpx_neq_f16">;
1779+
defm V_CMPX_NLT_F16_fake16 : VOPCX_Real_t16_gfx11_gfx12<0x08e, "v_cmpx_nlt_f16">;
1780+
17101781
defm V_CMPX_F_F32 : VOPCX_Real_gfx11<0x090>;
17111782
defm V_CMPX_LT_F32 : VOPCX_Real_gfx11_gfx12<0x091>;
17121783
defm V_CMPX_EQ_F32 : VOPCX_Real_gfx11_gfx12<0x092>;
@@ -1753,6 +1824,20 @@ defm V_CMPX_LE_U16_t16 : VOPCX_Real_t16_gfx11_gfx12<0x0bb, "v_cmpx_le_u16">;
17531824
defm V_CMPX_GT_U16_t16 : VOPCX_Real_t16_gfx11_gfx12<0x0bc, "v_cmpx_gt_u16">;
17541825
defm V_CMPX_NE_U16_t16 : VOPCX_Real_t16_gfx11_gfx12<0x0bd, "v_cmpx_ne_u16">;
17551826
defm V_CMPX_GE_U16_t16 : VOPCX_Real_t16_gfx11_gfx12<0x0be, "v_cmpx_ge_u16">;
1827+
1828+
defm V_CMPX_LT_I16_fake16 : VOPCX_Real_t16_gfx11_gfx12<0x0b1, "v_cmpx_lt_i16">;
1829+
defm V_CMPX_EQ_I16_fake16 : VOPCX_Real_t16_gfx11_gfx12<0x0b2, "v_cmpx_eq_i16">;
1830+
defm V_CMPX_LE_I16_fake16 : VOPCX_Real_t16_gfx11_gfx12<0x0b3, "v_cmpx_le_i16">;
1831+
defm V_CMPX_GT_I16_fake16 : VOPCX_Real_t16_gfx11_gfx12<0x0b4, "v_cmpx_gt_i16">;
1832+
defm V_CMPX_NE_I16_fake16 : VOPCX_Real_t16_gfx11_gfx12<0x0b5, "v_cmpx_ne_i16">;
1833+
defm V_CMPX_GE_I16_fake16 : VOPCX_Real_t16_gfx11_gfx12<0x0b6, "v_cmpx_ge_i16">;
1834+
defm V_CMPX_LT_U16_fake16 : VOPCX_Real_t16_gfx11_gfx12<0x0b9, "v_cmpx_lt_u16">;
1835+
defm V_CMPX_EQ_U16_fake16 : VOPCX_Real_t16_gfx11_gfx12<0x0ba, "v_cmpx_eq_u16">;
1836+
defm V_CMPX_LE_U16_fake16 : VOPCX_Real_t16_gfx11_gfx12<0x0bb, "v_cmpx_le_u16">;
1837+
defm V_CMPX_GT_U16_fake16 : VOPCX_Real_t16_gfx11_gfx12<0x0bc, "v_cmpx_gt_u16">;
1838+
defm V_CMPX_NE_U16_fake16 : VOPCX_Real_t16_gfx11_gfx12<0x0bd, "v_cmpx_ne_u16">;
1839+
defm V_CMPX_GE_U16_fake16 : VOPCX_Real_t16_gfx11_gfx12<0x0be, "v_cmpx_ge_u16">;
1840+
17561841
defm V_CMPX_F_I32 : VOPCX_Real_gfx11<0x0c0>;
17571842
defm V_CMPX_LT_I32 : VOPCX_Real_gfx11_gfx12<0x0c1>;
17581843
defm V_CMPX_EQ_I32 : VOPCX_Real_gfx11_gfx12<0x0c2>;
@@ -1787,6 +1872,7 @@ defm V_CMPX_NE_U64 : VOPCX_Real_gfx11_gfx12<0x0dd>;
17871872
defm V_CMPX_GE_U64 : VOPCX_Real_gfx11_gfx12<0x0de>;
17881873
defm V_CMPX_T_U64 : VOPCX_Real_gfx11<0x0df>;
17891874
defm V_CMPX_CLASS_F16_t16 : VOPCX_Real_t16_gfx11_gfx12<0x0fd, "v_cmpx_class_f16">;
1875+
defm V_CMPX_CLASS_F16_fake16 : VOPCX_Real_t16_gfx11_gfx12<0x0fd, "v_cmpx_class_f16">;
17901876
defm V_CMPX_CLASS_F32 : VOPCX_Real_gfx11_gfx12<0x0fe>;
17911877
defm V_CMPX_CLASS_F64 : VOPCX_Real_gfx11_gfx12<0x0ff>;
17921878

0 commit comments

Comments
 (0)