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[AArch64] Codegen support for FEAT_PAuthLR
- Adds a new +pc option to -mbranch-protection that will enable the use of PC as a diversifier in PAC branch protection code. - When +pauth-lr is enabled (-march=armv9.5a+pauth-lr) in combination with -mbranch-protection=pac-ret+pc, the new 9.5-a instructions (pacibsppc, retaasppc, etc) are used. Documentation for the relevant instructions can be found here: https://developer.arm.com/documentation/ddi0602/2023-09/Base-Instructions/ Co-authored-by: Lucas Prates <[email protected]>
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‎clang/include/clang/Basic/LangOptions.def

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -456,6 +456,7 @@ ENUM_LANGOPT(SignReturnAddressScope, SignReturnAddressScopeKind, 2, SignReturnAd
456456
ENUM_LANGOPT(SignReturnAddressKey, SignReturnAddressKeyKind, 1, SignReturnAddressKeyKind::AKey,
457457
"Key used for return address signing")
458458
LANGOPT(BranchTargetEnforcement, 1, 0, "Branch-target enforcement enabled")
459+
LANGOPT(BranchProtectionPAuthLR, 1, 0, "Use PC as a diversifier using PAuthLR NOP instructions.")
459460

460461
LANGOPT(SpeculativeLoadHardening, 1, 0, "Speculative load hardening enabled")
461462

‎clang/include/clang/Basic/TargetInfo.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1372,6 +1372,7 @@ class TargetInfo : public TransferrableTargetInfo,
13721372
LangOptions::SignReturnAddressKeyKind SignKey =
13731373
LangOptions::SignReturnAddressKeyKind::AKey;
13741374
bool BranchTargetEnforcement = false;
1375+
bool BranchProtectionPAuthLR = false;
13751376
};
13761377

13771378
/// Determine if the Architecture in this TargetInfo supports branch

‎clang/include/clang/Driver/Options.td

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -6999,6 +6999,8 @@ def msign_return_address_key_EQ : Joined<["-"], "msign-return-address-key=">,
69996999
Values<"a_key,b_key">;
70007000
def mbranch_target_enforce : Flag<["-"], "mbranch-target-enforce">,
70017001
MarshallingInfoFlag<LangOpts<"BranchTargetEnforcement">>;
7002+
def mbranch_protection_pauth_lr : Flag<["-"], "mbranch-protection-pauth-lr">,
7003+
MarshallingInfoFlag<LangOpts<"BranchProtectionPAuthLR">>;
70027004
def fno_dllexport_inlines : Flag<["-"], "fno-dllexport-inlines">,
70037005
MarshallingInfoNegativeFlag<LangOpts<"DllExportInlines">>;
70047006
def cfguard_no_checks : Flag<["-"], "cfguard-no-checks">,

‎clang/lib/Basic/Targets/AArch64.cpp

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -225,6 +225,7 @@ bool AArch64TargetInfo::validateBranchProtection(StringRef Spec, StringRef,
225225
BPI.SignKey = LangOptions::SignReturnAddressKeyKind::BKey;
226226

227227
BPI.BranchTargetEnforcement = PBP.BranchTargetEnforcement;
228+
BPI.BranchProtectionPAuthLR = PBP.BranchProtectionPAuthLR;
228229
return true;
229230
}
230231

‎clang/lib/Basic/Targets/ARM.cpp

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -419,6 +419,7 @@ bool ARMTargetInfo::validateBranchProtection(StringRef Spec, StringRef Arch,
419419
BPI.SignKey = LangOptions::SignReturnAddressKeyKind::AKey;
420420

421421
BPI.BranchTargetEnforcement = PBP.BranchTargetEnforcement;
422+
BPI.BranchProtectionPAuthLR = PBP.BranchProtectionPAuthLR;
422423
return true;
423424
}
424425

‎clang/lib/CodeGen/CodeGenModule.cpp

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1106,6 +1106,9 @@ void CodeGenModule::Release() {
11061106
if (LangOpts.BranchTargetEnforcement)
11071107
getModule().addModuleFlag(llvm::Module::Min, "branch-target-enforcement",
11081108
1);
1109+
if (LangOpts.BranchProtectionPAuthLR)
1110+
getModule().addModuleFlag(llvm::Module::Min, "branch-protection-pauth-lr",
1111+
1);
11091112
if (LangOpts.hasSignReturnAddress())
11101113
getModule().addModuleFlag(llvm::Module::Min, "sign-return-address", 1);
11111114
if (LangOpts.isSignReturnAddressScopeAll())

‎clang/lib/CodeGen/Targets/AArch64.cpp

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -136,6 +136,8 @@ class AArch64TargetCodeGenInfo : public TargetCodeGenInfo {
136136

137137
Fn->addFnAttr("branch-target-enforcement",
138138
BPI.BranchTargetEnforcement ? "true" : "false");
139+
Fn->addFnAttr("branch-protection-pauth-lr",
140+
BPI.BranchProtectionPAuthLR ? "true" : "false");
139141
}
140142

141143
bool isScalarizableAsmOperand(CodeGen::CodeGenFunction &CGF,

‎clang/lib/Driver/ToolChains/Clang.cpp

Lines changed: 6 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1497,7 +1497,7 @@ static void CollectARMPACBTIOptions(const ToolChain &TC, const ArgList &Args,
14971497
<< Triple.getArchName();
14981498

14991499
StringRef Scope, Key;
1500-
bool IndirectBranches;
1500+
bool IndirectBranches, BranchProtectionPAuthLR;
15011501

15021502
if (A->getOption().matches(options::OPT_msign_return_address_EQ)) {
15031503
Scope = A->getValue();
@@ -1506,6 +1506,7 @@ static void CollectARMPACBTIOptions(const ToolChain &TC, const ArgList &Args,
15061506
<< A->getSpelling() << Scope;
15071507
Key = "a_key";
15081508
IndirectBranches = false;
1509+
BranchProtectionPAuthLR = false;
15091510
} else {
15101511
StringRef DiagMsg;
15111512
llvm::ARM::ParsedBranchProtection PBP;
@@ -1517,6 +1518,7 @@ static void CollectARMPACBTIOptions(const ToolChain &TC, const ArgList &Args,
15171518
<< "b-key" << A->getAsString(Args);
15181519
Scope = PBP.Scope;
15191520
Key = PBP.Key;
1521+
BranchProtectionPAuthLR = PBP.BranchProtectionPAuthLR;
15201522
IndirectBranches = PBP.BranchTargetEnforcement;
15211523
}
15221524

@@ -1525,6 +1527,9 @@ static void CollectARMPACBTIOptions(const ToolChain &TC, const ArgList &Args,
15251527
if (!Scope.equals("none"))
15261528
CmdArgs.push_back(
15271529
Args.MakeArgString(Twine("-msign-return-address-key=") + Key));
1530+
if (BranchProtectionPAuthLR)
1531+
CmdArgs.push_back(
1532+
Args.MakeArgString(Twine("-mbranch-protection-pauth-lr")));
15281533
if (IndirectBranches)
15291534
CmdArgs.push_back("-mbranch-target-enforce");
15301535
}

‎clang/test/CodeGen/aarch64-branch-protection-attr.c

Lines changed: 28 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -46,6 +46,24 @@ __attribute__ ((target("branch-protection=pac-ret+leaf+bti")))
4646
void btileaf() {}
4747
// CHECK: define{{.*}} void @btileaf() #[[#BTIPACLEAF:]]
4848

49+
50+
__attribute__ ((target("branch-protection=pac-ret+pc")))
51+
void pauthlr() {}
52+
// CHECK: define{{.*}} void @pauthlr() #[[#PAUTHLR:]]
53+
54+
__attribute__ ((target("branch-protection=pac-ret+pc+b-key")))
55+
void pauthlr_bkey() {}
56+
// CHECK: define{{.*}} void @pauthlr_bkey() #[[#PAUTHLR_BKEY:]]
57+
58+
__attribute__ ((target("branch-protection=pac-ret+pc+leaf")))
59+
void pauthlr_leaf() {}
60+
// CHECK: define{{.*}} void @pauthlr_leaf() #[[#PAUTHLR_LEAF:]]
61+
62+
__attribute__ ((target("branch-protection=pac-ret+pc+bti")))
63+
void pauthlr_bti() {}
64+
// CHECK: define{{.*}} void @pauthlr_bti() #[[#PAUTHLR_BTI:]]
65+
66+
4967
// CHECK-DAG: attributes #[[#NONE]] = { {{.*}} "branch-target-enforcement"="false" {{.*}} "sign-return-address"="none"
5068

5169
// CHECK-DAG: attributes #[[#STD]] = { {{.*}} "branch-target-enforcement"="true" {{.*}} "sign-return-address"="non-leaf" "sign-return-address-key"="a_key"
@@ -61,3 +79,13 @@ void btileaf() {}
6179
// CHECK-DAG: attributes #[[#PACBKEYLEAF]] = { {{.*}} "branch-target-enforcement"="false" {{.*}}"sign-return-address"="all" "sign-return-address-key"="b_key"
6280

6381
// CHECK-DAG: attributes #[[#BTIPACLEAF]] = { {{.*}}"branch-target-enforcement"="true" {{.*}} "sign-return-address"="all" "sign-return-address-key"="a_key"
82+
83+
84+
// CHECK-DAG: attributes #[[#PAUTHLR]] = { {{.*}}"branch-protection-pauth-lr"="true" {{.*}}"branch-target-enforcement"="false" {{.*}}"sign-return-address"="non-leaf" "sign-return-address-key"="a_key"
85+
86+
// CHECK-DAG: attributes #[[#PAUTHLR_BKEY]] = { {{.*}}"branch-protection-pauth-lr"="true" {{.*}}"branch-target-enforcement"="false" {{.*}}"sign-return-address"="non-leaf" "sign-return-address-key"="b_key"
87+
88+
// CHECK-DAG: attributes #[[#PAUTHLR_LEAF]] = { {{.*}}"branch-protection-pauth-lr"="true" {{.*}}"branch-target-enforcement"="false" {{.*}}"sign-return-address"="all" "sign-return-address-key"="a_key"
89+
90+
// CHECK-DAG: attributes #[[#PAUTHLR_BTI]] = { {{.*}}"branch-protection-pauth-lr"="true" {{.*}}"branch-target-enforcement"="true" {{.*}}"sign-return-address"="non-leaf" "sign-return-address-key"="a_key"
91+

‎clang/test/Driver/aarch64-pauth-lr.c

Lines changed: 23 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,23 @@
1+
// Check the -cc1 flags for the various forms of -mbranch-protection=pac-ret+pc.
2+
3+
// RUN: %clang -target aarch64-arm-none-eabi -c %s -### -mbranch-protection=pac-ret+pc 2>&1 | FileCheck %s --check-prefixes=PAUTH-LR
4+
// RUN: %clang -target aarch64-arm-none-eabi -c %s -### -mbranch-protection=pac-ret+pc+b-key 2>&1 | FileCheck %s --check-prefixes=PAUTH-LR-B-KEY
5+
// RUN: %clang -target aarch64-arm-none-eabi -c %s -### -mbranch-protection=pac-ret+pc+leaf 2>&1 | FileCheck %s --check-prefixes=PAUTH-LR-LEAF
6+
// RUN: %clang -target aarch64-arm-none-eabi -c %s -### -mbranch-protection=pac-ret+pc+bti 2>&1 | FileCheck %s --check-prefixes=PAUTH-LR-BTI
7+
// RUN: %clang -target aarch64-arm-none-eabi -c %s -### -mbranch-protection=pac-ret+pc+leaf+b-key+bti 2>&1 | FileCheck %s --check-prefixes=PAUTH-LR-LEAF-B-KEY-BTI
8+
// RUN: %clang -target aarch64-arm-none-eabi -c %s -### -mbranch-protection=pac-ret+pc -march=armv9.5-a 2>&1 | FileCheck %s --check-prefixes=PAUTH-LR
9+
// RUN: %clang -target aarch64-arm-none-eabi -c %s -### -mbranch-protection=pac-ret+pc+b-key -march=armv9.5-a 2>&1 | FileCheck %s --check-prefixes=PAUTH-LR-B-KEY
10+
// RUN: %clang -target aarch64-arm-none-eabi -c %s -### -mbranch-protection=pac-ret+pc+leaf -march=armv9.5-a 2>&1 | FileCheck %s --check-prefixes=PAUTH-LR-LEAF
11+
// RUN: %clang -target aarch64-arm-none-eabi -c %s -### -mbranch-protection=pac-ret+pc+bti -march=armv9.5-a 2>&1 | FileCheck %s --check-prefixes=PAUTH-LR-BTI
12+
// RUN: %clang -target aarch64-arm-none-eabi -c %s -### -mbranch-protection=pac-ret+pc+leaf+b-key+bti -march=armv9.5-a 2>&1 | FileCheck %s --check-prefixes=PAUTH-LR-LEAF-B-KEY-BTI
13+
14+
// PAUTH-LR: "-msign-return-address=non-leaf" "-msign-return-address-key=a_key" "-mbranch-protection-pauth-lr"
15+
// PAUTH-LR-B-KEY: "-msign-return-address=non-leaf" "-msign-return-address-key=b_key" "-mbranch-protection-pauth-lr"
16+
// PAUTH-LR-LEAF: "-msign-return-address=all" "-msign-return-address-key=a_key" "-mbranch-protection-pauth-lr"
17+
// PAUTH-LR-BTI: "-msign-return-address=non-leaf" "-msign-return-address-key=a_key" "-mbranch-protection-pauth-lr"
18+
// PAUTH-LR-LEAF-B-KEY-BTI: "-msign-return-address=all" "-msign-return-address-key=b_key" "-mbranch-protection-pauth-lr" "-mbranch-target-enforce"
19+
20+
// NOT-PAUTH-LR: "-mbranch-target-enforce"
21+
// NOT-PAUTH-LR-B-KEY: "-mbranch-target-enforce"
22+
// NOT-PAUTH-LR-LEAF: "-mbranch-target-enforce"
23+
// NOT-PAUTH-LR-BTI: "-mbranch-target-enforce"

‎clang/test/Driver/aarch64-v95a.c

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,10 +1,13 @@
1+
// ===== Base v9.5a architecture =====
2+
13
// RUN: %clang -target aarch64 -march=armv9.5a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV95A %s
24
// RUN: %clang -target aarch64 -march=armv9.5-a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV95A %s
35
// RUN: %clang -target aarch64 -mlittle-endian -march=armv9.5a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV95A %s
46
// RUN: %clang -target aarch64 -mlittle-endian -march=armv9.5-a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV95A %s
57
// RUN: %clang -target aarch64_be -mlittle-endian -march=armv9.5a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV95A %s
68
// RUN: %clang -target aarch64_be -mlittle-endian -march=armv9.5-a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV95A %s
79
// GENERICV95A: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-cpu" "generic" "-target-feature" "+neon" "-target-feature" "+v9.5a"
10+
811
// RUN: %clang -target aarch64_be -march=armv9.5a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV95A-BE %s
912
// RUN: %clang -target aarch64_be -march=armv9.5-a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV95A-BE %s
1013
// RUN: %clang -target aarch64 -mbig-endian -march=armv9.5a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV95A-BE %s
@@ -18,3 +21,7 @@
1821
// RUN: %clang -target aarch64 -march=armv9.5a+cpa -### -c %s 2>&1 | FileCheck -check-prefix=V95A-CPA %s
1922
// RUN: %clang -target aarch64 -march=armv9.5-a+cpa -### -c %s 2>&1 | FileCheck -check-prefix=V95A-CPA %s
2023
// V95A-CPA: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-cpu" "generic" "-target-feature" "+neon" "-target-feature" "+v9.5a" "-target-feature" "+cpa"
24+
25+
// RUN: %clang -target aarch64 -march=armv9.5a+pauth-lr -### -c %s 2>&1 | FileCheck -check-prefix=V95A-PAUTHLR %s
26+
// RUN: %clang -target aarch64 -march=armv9.5-a+pauth-lr -### -c %s 2>&1 | FileCheck -check-prefix=V95A-PAUTHLR %s
27+
// V95A-PAUTHLR: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-cpu" "generic" "-target-feature" "+neon" "-target-feature" "+v9.5a" "-target-feature" "+pauth-lr"

‎llvm/include/llvm/TargetParser/AArch64TargetParser.h

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -174,6 +174,7 @@ enum ArchExtKind : unsigned {
174174
AEK_SMEF8F32 = 70, // FEAT_SME_F8F32
175175
AEK_SMEFA64 = 71, // FEAT_SME_FA64
176176
AEK_CPA = 72, // FEAT_CPA
177+
AEK_PAUTHLR = 73, // FEAT_PAuth_LR
177178
AEK_NUM_EXTENSIONS
178179
};
179180
using ExtensionBitset = Bitset<AEK_NUM_EXTENSIONS>;
@@ -297,6 +298,7 @@ inline constexpr ExtensionInfo Extensions[] = {
297298
{"sme-f8f32", AArch64::AEK_SMEF8F32, "+sme-f8f32", "-sme-f8f32", FEAT_INIT, "+sme2,+fp8", 0},
298299
{"sme-fa64", AArch64::AEK_SMEFA64, "+sme-fa64", "-sme-fa64", FEAT_INIT, "", 0},
299300
{"cpa", AArch64::AEK_CPA, "+cpa", "-cpa", FEAT_INIT, "", 0},
301+
{"pauth-lr", AArch64::AEK_PAUTHLR, "+pauth-lr", "-pauth-lr", FEAT_INIT, "", 0},
300302
// Special cases
301303
{"none", AArch64::AEK_NONE, {}, {}, FEAT_INIT, "", ExtensionInfo::MaxFMVPriority},
302304
};

‎llvm/include/llvm/TargetParser/ARMTargetParserCommon.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -41,6 +41,7 @@ struct ParsedBranchProtection {
4141
StringRef Scope;
4242
StringRef Key;
4343
bool BranchTargetEnforcement;
44+
bool BranchProtectionPAuthLR;
4445
};
4546

4647
bool parseBranchProtection(StringRef Spec, ParsedBranchProtection &PBP,

‎llvm/lib/Target/AArch64/AArch64InstrInfo.cpp

Lines changed: 11 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -8802,12 +8802,23 @@ AArch64InstrInfo::getOutliningTypeImpl(MachineBasicBlock::iterator &MIT,
88028802
// Don't outline anything used for return address signing. The outlined
88038803
// function will get signed later if needed
88048804
switch (MI.getOpcode()) {
8805+
case AArch64::PACM:
88058806
case AArch64::PACIASP:
88068807
case AArch64::PACIBSP:
8808+
case AArch64::PACIASPPC:
8809+
case AArch64::PACIBSPPC:
88078810
case AArch64::AUTIASP:
88088811
case AArch64::AUTIBSP:
8812+
case AArch64::AUTIASPPCi:
8813+
case AArch64::AUTIASPPCr:
8814+
case AArch64::AUTIBSPPCi:
8815+
case AArch64::AUTIBSPPCr:
88098816
case AArch64::RETAA:
88108817
case AArch64::RETAB:
8818+
case AArch64::RETAASPPCi:
8819+
case AArch64::RETAASPPCr:
8820+
case AArch64::RETABSPPCi:
8821+
case AArch64::RETABSPPCr:
88118822
case AArch64::EMITBKEY:
88128823
case AArch64::PAUTH_PROLOGUE:
88138824
case AArch64::PAUTH_EPILOGUE:

‎llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.cpp

Lines changed: 18 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -93,16 +93,24 @@ AArch64FunctionInfo::AArch64FunctionInfo(const Function &F,
9393
// TODO: skip functions that have no instrumented allocas for optimization
9494
IsMTETagged = F.hasFnAttribute(Attribute::SanitizeMemTag);
9595

96-
if (!F.hasFnAttribute("branch-target-enforcement")) {
97-
if (const auto *BTE = mdconst::extract_or_null<ConstantInt>(
98-
F.getParent()->getModuleFlag("branch-target-enforcement")))
99-
BranchTargetEnforcement = BTE->getZExtValue();
100-
} else {
101-
const StringRef BTIEnable =
102-
F.getFnAttribute("branch-target-enforcement").getValueAsString();
103-
assert(BTIEnable == "true" || BTIEnable == "false");
104-
BranchTargetEnforcement = BTIEnable == "true";
105-
}
96+
// BTI/PAuthLR may be set either on the function or the module. Set Bool from
97+
// either the function attribute or module attribute, depending on what is
98+
// set.
99+
// Note: the module attributed is numeric (0 or 1) but the function attribute
100+
// is stringy ("true" or "false").
101+
auto TryFnThenModule = [&](StringRef AttrName, bool &Bool) {
102+
if (F.hasFnAttribute(AttrName)) {
103+
const StringRef V = F.getFnAttribute(AttrName).getValueAsString();
104+
assert(V.equals_insensitive("true") || V.equals_insensitive("false"));
105+
Bool = V.equals_insensitive("true");
106+
} else if (const auto *ModVal = mdconst::extract_or_null<ConstantInt>(
107+
F.getParent()->getModuleFlag(AttrName))) {
108+
Bool = ModVal->getZExtValue();
109+
}
110+
};
111+
112+
TryFnThenModule("branch-target-enforcement", BranchTargetEnforcement);
113+
TryFnThenModule("branch-protection-pauth-lr", BranchProtectionPAuthLR);
106114

107115
// The default stack probe size is 4096 if the function has no
108116
// stack-probe-size attribute. This is a safe default because it is the

‎llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.h

Lines changed: 18 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -22,6 +22,7 @@
2222
#include "llvm/CodeGen/MachineFunction.h"
2323
#include "llvm/IR/Function.h"
2424
#include "llvm/MC/MCLinkerOptimizationHint.h"
25+
#include "llvm/MC/MCSymbol.h"
2526
#include <cassert>
2627
#include <optional>
2728

@@ -164,10 +165,21 @@ class AArch64FunctionInfo final : public MachineFunctionInfo {
164165
/// SignWithBKey modifies the default PAC-RET mode to signing with the B key.
165166
bool SignWithBKey = false;
166167

168+
/// SigningInstrOffset captures the offset of the PAC-RET signing instruction
169+
/// within the prologue, so it can be re-used for authentication in the
170+
/// epilogue when using PC as a second salt (FEAT_PAuth_LR)
171+
MCSymbol *SignInstrLabel = nullptr;
172+
167173
/// BranchTargetEnforcement enables placing BTI instructions at potential
168174
/// indirect branch destinations.
169175
bool BranchTargetEnforcement = false;
170176

177+
/// Indicates that SP signing should be diversified with PC as-per PAuthLR.
178+
/// This is set by -mbranch-protection and will emit NOP instructions unless
179+
/// the subtarget feature +pauthlr is also used (in which case non-NOP
180+
/// instructions are emitted).
181+
bool BranchProtectionPAuthLR = false;
182+
171183
/// Whether this function has an extended frame record [Ctx, FP, LR]. If so,
172184
/// bit 60 of the in-memory FP will be 1 to enable other tools to detect the
173185
/// extended record.
@@ -436,10 +448,16 @@ class AArch64FunctionInfo final : public MachineFunctionInfo {
436448
bool needsShadowCallStackPrologueEpilogue(MachineFunction &MF) const;
437449

438450
bool shouldSignWithBKey() const { return SignWithBKey; }
451+
452+
MCSymbol *getSigningInstrLabel() const { return SignInstrLabel; }
453+
void setSigningInstrLabel(MCSymbol *Label) { SignInstrLabel = Label; }
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bool isMTETagged() const { return IsMTETagged; }
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bool branchTargetEnforcement() const { return BranchTargetEnforcement; }
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bool branchProtectionPAuthLR() const { return BranchProtectionPAuthLR; }
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void setHasSwiftAsyncContext(bool HasContext) {
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HasSwiftAsyncContext = HasContext;
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}

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