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[X86][test] Update CHECK prefixes in CodeGen/X86/vector-interleaved-load-*.ll to suppress warnings
Suppress warnings like WARNING: Prefix AVX had conflicting output from different RUN lines for all functions in test vector-interleaved-load-i16-stride-7.ll WARNING: Prefix AVX1 had conflicting output from different RUN lines for all functions in test vector-interleaved-load-i16-stride-7.ll WARNING: Prefix AVX2 had conflicting output from different RUN lines for all functions in test vector-interleaved-load-i16-stride-7.ll WARNING: Prefix AVX2-ONLY had conflicting output from different RUN lines for all functions in test vector-interleaved-load-i16-stride-7.ll WARNING: Prefix AVX512 had conflicting output from different RUN lines for all functions in test vector-interleaved-load-i16-stride-7.ll WARNING: Prefix AVX512F had conflicting output from different RUN lines for all functions in test vector-interleaved-load-i16-stride-7.ll WARNING: Prefix AVX512F-ONLY had conflicting output from different RUN lines for all functions in test vector-interleaved-load-i16-stride-7.ll WARNING: Prefix AVX512-FAST had conflicting output from different RUN lines for all functions in test vector-interleaved-load-i16-stride-7.ll WARNING: Prefix AVX512DQ-ONLY had conflicting output from different RUN lines for all functions in test vector-interleaved-load-i16-stride-7.ll
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‎llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-2.ll

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‎llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-3.ll

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‎llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-4.ll

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‎llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-5.ll

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‎llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-6.ll

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‎llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-7.ll

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‎llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-8.ll

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‎llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-2.ll

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‎llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-3.ll

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‎llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-4.ll

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‎llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-5.ll

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‎llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-6.ll

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‎llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-7.ll

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‎llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-8.ll

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‎llvm/test/CodeGen/X86/vector-interleaved-load-i64-stride-2.ll

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‎llvm/test/CodeGen/X86/vector-interleaved-load-i64-stride-3.ll

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‎llvm/test/CodeGen/X86/vector-interleaved-load-i64-stride-4.ll

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‎llvm/test/CodeGen/X86/vector-interleaved-load-i64-stride-5.ll

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‎llvm/test/CodeGen/X86/vector-interleaved-load-i64-stride-6.ll

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‎llvm/test/CodeGen/X86/vector-interleaved-load-i64-stride-7.ll

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‎llvm/test/CodeGen/X86/vector-interleaved-load-i64-stride-8.ll

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‎llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-2.ll

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‎llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-3.ll

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‎llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-4.ll

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‎llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-5.ll

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‎llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-6.ll

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‎llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-7.ll

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‎llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-8.ll

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