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Commit 5addd19

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author
Thorsten Schütt
committed
address review comments
1 parent cea3d3d commit 5addd19

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2 files changed

+6
-6
lines changed

2 files changed

+6
-6
lines changed

llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -7062,9 +7062,9 @@ bool CombinerHelper::matchAddOverflow(MachineInstr &MI, BuildFnTy &MatchInfo) {
70627062
// We try to combine uaddo to non-overflowing add.
70637063
if (!IsSigned) {
70647064
ConstantRange CRLHS =
7065-
ConstantRange::fromKnownBits(KB->getKnownBits(LHS), false /*IsSigned*/);
7065+
ConstantRange::fromKnownBits(KB->getKnownBits(LHS), /*IsSigned=*/false);
70667066
ConstantRange CRRHS =
7067-
ConstantRange::fromKnownBits(KB->getKnownBits(RHS), false /*IsSigned*/);
7067+
ConstantRange::fromKnownBits(KB->getKnownBits(RHS), /*IsSigned=*/false);
70687068

70697069
switch (CRLHS.unsignedAddMayOverflow(CRRHS)) {
70707070
case ConstantRange::OverflowResult::MayOverflow:
@@ -7092,7 +7092,7 @@ bool CombinerHelper::matchAddOverflow(MachineInstr &MI, BuildFnTy &MatchInfo) {
70927092

70937093
// If LHS and RHS each have at least two sign bits, then there is no signed
70947094
// overflow.
7095-
if (KB->computeNumSignBits(LHS) > 1 && KB->computeNumSignBits(RHS) > 1) {
7095+
if (KB->computeNumSignBits(RHS) > 1 && KB->computeNumSignBits(LHS) > 1) {
70967096
MatchInfo = [=](MachineIRBuilder &B) {
70977097
B.buildAdd(Dst, LHS, RHS, MachineInstr::MIFlag::NoSWrap);
70987098
B.buildConstant(Carry, 0);
@@ -7101,9 +7101,9 @@ bool CombinerHelper::matchAddOverflow(MachineInstr &MI, BuildFnTy &MatchInfo) {
71017101
}
71027102

71037103
ConstantRange CRLHS =
7104-
ConstantRange::fromKnownBits(KB->getKnownBits(LHS), true /*IsSigned*/);
7104+
ConstantRange::fromKnownBits(KB->getKnownBits(LHS), /*IsSigned=*/true);
71057105
ConstantRange CRRHS =
7106-
ConstantRange::fromKnownBits(KB->getKnownBits(RHS), true /*IsSigned*/);
7106+
ConstantRange::fromKnownBits(KB->getKnownBits(RHS), /*IsSigned=*/true);
71077107

71087108
switch (CRLHS.signedAddMayOverflow(CRRHS)) {
71097109
case ConstantRange::OverflowResult::MayOverflow:

llvm/test/CodeGen/AArch64/GlobalISel/combine-overflow.mir

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2-
# RUN: llc -run-pass=aarch64-prelegalizer-combiner -verify-machineinstrs -mtriple aarch64-unknown-unknown %s -o - | FileCheck %s
2+
# RUN: llc -run-pass=aarch64-prelegalizer-combiner -mtriple aarch64-unknown-unknown %s -o - | FileCheck %s
33

44
---
55
name: add_unused

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