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mattarde
committed
add x87 specific runs
1 parent ff54c7a commit 5bf8752

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4 files changed

+85
-60
lines changed

4 files changed

+85
-60
lines changed

‎llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp

Lines changed: 40 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -468,7 +468,7 @@ X86LegalizerInfo::X86LegalizerInfo(const X86Subtarget &STI,
468468

469469
getActionDefinitionsBuilder(G_FABS)
470470
.legalFor(UseX87 && !HasSSE2, {s32, s64, s80})
471-
.lower();
471+
.custom();
472472

473473
// fp comparison
474474
getActionDefinitionsBuilder(G_FCMP)
@@ -675,6 +675,8 @@ bool X86LegalizerInfo::legalizeCustom(LegalizerHelper &Helper, MachineInstr &MI,
675675
return legalizeUITOFP(MI, MRI, Helper);
676676
case TargetOpcode::G_STORE:
677677
return legalizeNarrowingStore(MI, MRI, Helper);
678+
case TargetOpcode::G_FABS:
679+
return legalizeFAbs(MI, MRI, Helper);
678680
}
679681
llvm_unreachable("expected switch to return");
680682
}
@@ -785,6 +787,43 @@ bool X86LegalizerInfo::legalizeNarrowingStore(MachineInstr &MI,
785787
return true;
786788
}
787789

790+
bool X86LegalizerInfo::legalizeFAbs(MachineInstr &MI,
791+
MachineRegisterInfo &MRI,
792+
LegalizerHelper &Helper) const {
793+
794+
MachineIRBuilder &MIRBuilder = Helper.MIRBuilder;
795+
Register SrcReg = MI.getOperand(1).getReg();
796+
Register DstReg = MI.getOperand(0).getReg();
797+
LLT Ty = MRI.getType(DstReg);
798+
if (Subtarget.is32Bit()) {
799+
// Reset sign bit
800+
MIRBuilder.buildAnd(
801+
DstReg, SrcReg,
802+
MIRBuilder.buildConstant(
803+
Ty, APInt::getSignedMaxValue(Ty.getScalarSizeInBits())));
804+
} else {
805+
// In 64 bit mode, constant pool is used.
806+
auto &MF = MIRBuilder.getMF();
807+
Type *IRTy = getTypeForLLT(Ty, MF.getFunction().getContext());
808+
Constant *ConstMask = ConstantInt::get(
809+
IRTy, APInt::getSignedMaxValue(Ty.getScalarSizeInBits()));
810+
LLT DstTy = MRI.getType(DstReg);
811+
const DataLayout &DL = MIRBuilder.getDataLayout();
812+
unsigned AddrSpace = DL.getDefaultGlobalsAddressSpace();
813+
Align Alignment(DL.getABITypeAlign(
814+
getTypeForLLT(DstTy, MF.getFunction().getContext())));
815+
auto Addr = MIRBuilder.buildConstantPool(
816+
LLT::pointer(AddrSpace, DL.getPointerSizeInBits(AddrSpace)),
817+
MF.getConstantPool()->getConstantPoolIndex(ConstMask, Alignment));
818+
MachineMemOperand *MMO =
819+
MF.getMachineMemOperand(MachinePointerInfo::getConstantPool(MF),
820+
MachineMemOperand::MOLoad, DstTy, Alignment);
821+
auto LoadedMask = MIRBuilder.buildLoad(DstTy, Addr, *MMO);
822+
MIRBuilder.buildAnd(DstReg, SrcReg, LoadedMask);
823+
}
824+
MI.eraseFromParent();
825+
return true;
826+
}
788827
bool X86LegalizerInfo::legalizeIntrinsic(LegalizerHelper &Helper,
789828
MachineInstr &MI) const {
790829
return true;

‎llvm/lib/Target/X86/GISel/X86LegalizerInfo.h

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -48,6 +48,9 @@ class X86LegalizerInfo : public LegalizerInfo {
4848

4949
bool legalizeNarrowingStore(MachineInstr &MI, MachineRegisterInfo &MRI,
5050
LegalizerHelper &Helper) const;
51+
52+
bool legalizeFAbs(MachineInstr &MI, MachineRegisterInfo &MRI,
53+
LegalizerHelper &Helper) const;
5154
};
5255
} // namespace llvm
5356
#endif

‎llvm/test/CodeGen/X86/isel-fabs-x87.ll

Lines changed: 11 additions & 21 deletions
Original file line numberDiff line numberDiff line change
@@ -1,23 +1,17 @@
11
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
2-
; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s --check-prefixes=SDAG-X64
3-
; RUN: llc < %s -mtriple=x86_64-- -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=FASTISEL-X64
4-
; RUN: llc < %s -mtriple=x86_64-- -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X64
5-
; RUN: llc < %s -mtriple=i686-- -mattr=+x87,-sse2,-sse | FileCheck %s --check-prefixes=X86,SDAG-X86
6-
; RUN: llc < %s -mtriple=i686-- -mattr=+x87,-sse2,-sse -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=X86,FASTISEL-X86
7-
; RUN: llc < %s -mtriple=i686-- -mattr=+x87,-sse2,-sse -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=X86,GISEL-X86
2+
; RUN: llc < %s -mtriple=x86_64-- -mattr=+x87,-sse2,-sse | FileCheck %s --check-prefixes=X64
3+
; RUN: llc < %s -mtriple=x86_64-- -mattr=+x87,-sse2,-sse -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=X64
4+
; RUN: llc < %s -mtriple=x86_64-- -mattr=+x87,-sse2,-sse -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=X64
5+
; RUN: llc < %s -mtriple=i686-- -mattr=+x87,-sse2,-sse | FileCheck %s --check-prefixes=X86
6+
; RUN: llc < %s -mtriple=i686-- -mattr=+x87,-sse2,-sse -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=X86
7+
; RUN: llc < %s -mtriple=i686-- -mattr=+x87,-sse2,-sse -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=X86
88

99
define x86_fp80 @test_x86_fp80_abs(x86_fp80 %arg) {
10-
; SDAG-X64-LABEL: test_x86_fp80_abs:
11-
; SDAG-X64: # %bb.0:
12-
; SDAG-X64-NEXT: fldt {{[0-9]+}}(%rsp)
13-
; SDAG-X64-NEXT: fabs
14-
; SDAG-X64-NEXT: retq
15-
;
16-
; FASTISEL-X64-LABEL: test_x86_fp80_abs:
17-
; FASTISEL-X64: # %bb.0:
18-
; FASTISEL-X64-NEXT: fldt {{[0-9]+}}(%rsp)
19-
; FASTISEL-X64-NEXT: fabs
20-
; FASTISEL-X64-NEXT: retq
10+
; X64-LABEL: test_x86_fp80_abs:
11+
; X64: # %bb.0:
12+
; X64-NEXT: fldt {{[0-9]+}}(%rsp)
13+
; X64-NEXT: fabs
14+
; X64-NEXT: retq
2115
;
2216
; X86-LABEL: test_x86_fp80_abs:
2317
; X86: # %bb.0:
@@ -27,7 +21,3 @@ define x86_fp80 @test_x86_fp80_abs(x86_fp80 %arg) {
2721
%abs = tail call x86_fp80 @llvm.fabs.f80(x86_fp80 %arg)
2822
ret x86_fp80 %abs
2923
}
30-
;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
31-
; FASTISEL-X86: {{.*}}
32-
; GISEL-X86: {{.*}}
33-
; SDAG-X86: {{.*}}

‎llvm/test/CodeGen/X86/isel-fabs.ll

Lines changed: 31 additions & 38 deletions
Original file line numberDiff line numberDiff line change
@@ -1,34 +1,29 @@
11
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
2-
; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s --check-prefixes=SDAG-X64
3-
; RUN: llc < %s -mtriple=x86_64-- -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=FASTISEL-X64
4-
; RUN: llc < %s -mtriple=x86_64-- -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X64
5-
; RUN: llc < %s -mtriple=i686-- -mattr=-x87 | FileCheck %s --check-prefixes=SDAG-X86
2+
; RUN: llc < %s -mtriple=x86_64-- -mattr=-x87 | FileCheck %s --check-prefixes=X64
3+
; RUN: llc < %s -mtriple=x86_64-- -mattr=-x87 -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=X64,FASTISEL-X64
4+
; RUN: llc < %s -mtriple=x86_64-- -mattr=-x87 -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X64
5+
; RUN: llc < %s -mtriple=i686-- -mattr=-x87 | FileCheck %s --check-prefixes=X86
66
; RUN: llc < %s -mtriple=i686-- -mattr=-x87 -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=FASTISEL-X86
77
; RUN: llc < %s -mtriple=i686-- -mattr=-x87 -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X86
88

99
define float @test_float_abs(float %arg) {
10-
; SDAG-X64-LABEL: test_float_abs:
11-
; SDAG-X64: # %bb.0:
12-
; SDAG-X64-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
13-
; SDAG-X64-NEXT: retq
14-
;
15-
; FASTISEL-X64-LABEL: test_float_abs:
16-
; FASTISEL-X64: # %bb.0:
17-
; FASTISEL-X64-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
18-
; FASTISEL-X64-NEXT: retq
10+
; X64-LABEL: test_float_abs:
11+
; X64: # %bb.0:
12+
; X64-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
13+
; X64-NEXT: retq
1914
;
2015
; GISEL-X64-LABEL: test_float_abs:
2116
; GISEL-X64: # %bb.0:
2217
; GISEL-X64-NEXT: movd %xmm0, %eax
23-
; GISEL-X64-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
18+
; GISEL-X64-NEXT: andl {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %eax
2419
; GISEL-X64-NEXT: movd %eax, %xmm0
2520
; GISEL-X64-NEXT: retq
2621
;
27-
; SDAG-X86-LABEL: test_float_abs:
28-
; SDAG-X86: # %bb.0:
29-
; SDAG-X86-NEXT: movl $2147483647, %eax # imm = 0x7FFFFFFF
30-
; SDAG-X86-NEXT: andl {{[0-9]+}}(%esp), %eax
31-
; SDAG-X86-NEXT: retl
22+
; X86-LABEL: test_float_abs:
23+
; X86: # %bb.0:
24+
; X86-NEXT: movl $2147483647, %eax # imm = 0x7FFFFFFF
25+
; X86-NEXT: andl {{[0-9]+}}(%esp), %eax
26+
; X86-NEXT: retl
3227
;
3328
; FASTISEL-X86-LABEL: test_float_abs:
3429
; FASTISEL-X86: # %bb.0:
@@ -46,30 +41,24 @@ define float @test_float_abs(float %arg) {
4641
}
4742

4843
define double @test_double_abs(double %arg) {
49-
; SDAG-X64-LABEL: test_double_abs:
50-
; SDAG-X64: # %bb.0:
51-
; SDAG-X64-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
52-
; SDAG-X64-NEXT: retq
53-
;
54-
; FASTISEL-X64-LABEL: test_double_abs:
55-
; FASTISEL-X64: # %bb.0:
56-
; FASTISEL-X64-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
57-
; FASTISEL-X64-NEXT: retq
44+
; X64-LABEL: test_double_abs:
45+
; X64: # %bb.0:
46+
; X64-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
47+
; X64-NEXT: retq
5848
;
5949
; GISEL-X64-LABEL: test_double_abs:
6050
; GISEL-X64: # %bb.0:
61-
; GISEL-X64-NEXT: movabsq $9223372036854775807, %rax # imm = 0x7FFFFFFFFFFFFFFF
62-
; GISEL-X64-NEXT: movq %xmm0, %rcx
63-
; GISEL-X64-NEXT: andq %rax, %rcx
64-
; GISEL-X64-NEXT: movq %rcx, %xmm0
51+
; GISEL-X64-NEXT: movq %xmm0, %rax
52+
; GISEL-X64-NEXT: andq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax
53+
; GISEL-X64-NEXT: movq %rax, %xmm0
6554
; GISEL-X64-NEXT: retq
6655
;
67-
; SDAG-X86-LABEL: test_double_abs:
68-
; SDAG-X86: # %bb.0:
69-
; SDAG-X86-NEXT: movl {{[0-9]+}}(%esp), %eax
70-
; SDAG-X86-NEXT: movl $2147483647, %edx # imm = 0x7FFFFFFF
71-
; SDAG-X86-NEXT: andl {{[0-9]+}}(%esp), %edx
72-
; SDAG-X86-NEXT: retl
56+
; X86-LABEL: test_double_abs:
57+
; X86: # %bb.0:
58+
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
59+
; X86-NEXT: movl $2147483647, %edx # imm = 0x7FFFFFFF
60+
; X86-NEXT: andl {{[0-9]+}}(%esp), %edx
61+
; X86-NEXT: retl
7362
;
7463
; FASTISEL-X86-LABEL: test_double_abs:
7564
; FASTISEL-X86: # %bb.0:
@@ -85,6 +74,10 @@ define double @test_double_abs(double %arg) {
8574
; GISEL-X86-NEXT: andl {{[0-9]+}}(%esp), %eax
8675
; GISEL-X86-NEXT: andl {{[0-9]+}}(%esp), %edx
8776
; GISEL-X86-NEXT: retl
77+
8878
%abs = tail call double @llvm.fabs.f64(double %arg)
8979
ret double %abs
9080
}
81+
82+
;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
83+
; FASTISEL-X64: {{.*}}

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