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[GlobalISel] replace right identity X * -1.0 with fneg(x) (#80526)
follow up patch to #78673 @Pierre-vh @jayfoad @arsenm Could you review when you have a chance.
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4 files changed

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lines changed

‎llvm/include/llvm/Target/GlobalISel/Combine.td

Lines changed: 9 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -493,6 +493,13 @@ def right_identity_one_fp: GICombineRule<
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(apply (GIReplaceReg $dst, $x))
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>;
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def right_identity_neg_one_fp: GICombineRule<
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(defs root:$dst),
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(match (G_FMUL $dst, $x, $y):$root,
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[{ return Helper.matchConstantFPOp(${y}, -1.0); }]),
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(apply (G_FNEG $dst, $x))
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>;
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def right_identity_one : GICombineGroup<[right_identity_one_int, right_identity_one_fp]>;
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// Fold (x op x) - > x
@@ -1283,7 +1290,8 @@ def identity_combines : GICombineGroup<[select_same_val, right_identity_zero,
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trunc_buildvector_fold,
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trunc_lshr_buildvector_fold,
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bitcast_bitcast_fold, fptrunc_fpext_fold,
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right_identity_neg_zero_fp]>;
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right_identity_neg_zero_fp,
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right_identity_neg_one_fp]>;
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def const_combines : GICombineGroup<[constant_fold_fp_ops, const_ptradd_to_i2p,
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overlapping_and, mulo_by_2, mulo_by_0,

‎llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fpneg-one-fneg.mir

Lines changed: 216 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,216 @@
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 4
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# RUN: llc -march=amdgcn -mcpu=gfx1010 -run-pass=amdgpu-postlegalizer-combiner -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK
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---
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name: test_neg_one_f16_sgpr
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $sgpr0
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; CHECK-LABEL: name: test_neg_one_f16_sgpr
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; CHECK: liveins: $sgpr0
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr0
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; CHECK-NEXT: %x:_(s16) = G_TRUNC [[COPY]](s32)
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; CHECK-NEXT: %d:_(s16) = G_FNEG %x
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; CHECK-NEXT: %ext:_(s32) = G_ANYEXT %d(s16)
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; CHECK-NEXT: $sgpr0 = COPY %ext(s32)
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%0:_(s32) = COPY $sgpr0
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%x:_(s16) = G_TRUNC %0:_(s32)
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%y:_(s16) = G_FCONSTANT half -1.0
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%d:_(s16) = G_FMUL %x, %y
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%ext:_(s32) = G_ANYEXT %d:_(s16)
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$sgpr0 = COPY %ext
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...
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---
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name: test_neg_one_f32_sgpr
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body: |
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bb.0:
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liveins: $sgpr0
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; CHECK-LABEL: name: test_neg_one_f32_sgpr
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; CHECK: liveins: $sgpr0
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr0
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; CHECK-NEXT: [[FNEG:%[0-9]+]]:_(s32) = G_FNEG [[COPY]]
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; CHECK-NEXT: $sgpr0 = COPY [[FNEG]](s32)
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%0:_(s32) = COPY $sgpr0
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%1:_(s32) = G_FCONSTANT float -1.0
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%2:_(s32) = G_FMUL %0, %1
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$sgpr0 = COPY %2(s32)
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...
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---
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name: test_neg_one_f64_sgpr
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $sgpr0
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; CHECK-LABEL: name: test_neg_one_f64_sgpr
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; CHECK: liveins: $sgpr0
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr0
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; CHECK-NEXT: %x:_(s64) = G_ANYEXT [[COPY]](s32)
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; CHECK-NEXT: %d:_(s64) = G_FNEG %x
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; CHECK-NEXT: %ext:_(s32) = G_TRUNC %d(s64)
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; CHECK-NEXT: $sgpr0 = COPY %ext(s32)
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%0:_(s32) = COPY $sgpr0
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%x:_(s64) = G_ANYEXT %0:_(s32)
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%y:_(s64) = G_FCONSTANT double -1.0
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%d:_(s64) = G_FMUL %x, %y
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%ext:_(s32) = G_TRUNC %d:_(s64)
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$sgpr0 = COPY %ext
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...
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---
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name: test_neg_ten_f32_sgpr
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body: |
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bb.0:
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liveins: $sgpr0
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; CHECK-LABEL: name: test_neg_ten_f32_sgpr
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; CHECK: liveins: $sgpr0
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr0
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; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_FCONSTANT float -1.000000e+01
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; CHECK-NEXT: [[FMUL:%[0-9]+]]:_(s32) = G_FMUL [[COPY]], [[C]]
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; CHECK-NEXT: $sgpr0 = COPY [[FMUL]](s32)
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%0:_(s32) = COPY $sgpr0
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%1:_(s32) = G_FCONSTANT float -10.0
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%2:_(s32) = G_FMUL %0, %1
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$sgpr0 = COPY %2(s32)
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...
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---
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name: test_neg_fract_f32_sgpr
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body: |
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bb.0:
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liveins: $sgpr0
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; CHECK-LABEL: name: test_neg_fract_f32_sgpr
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; CHECK: liveins: $sgpr0
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr0
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; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_FCONSTANT float -5.000000e-01
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; CHECK-NEXT: [[FMUL:%[0-9]+]]:_(s32) = G_FMUL [[COPY]], [[C]]
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; CHECK-NEXT: $sgpr0 = COPY [[FMUL]](s32)
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%0:_(s32) = COPY $sgpr0
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%1:_(s32) = G_FCONSTANT float -0.5
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%2:_(s32) = G_FMUL %0, %1
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$sgpr0 = COPY %2(s32)
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...
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---
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name: test_neg_one_f16_vgpr
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $vgpr0
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; CHECK-LABEL: name: test_neg_one_f16_vgpr
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; CHECK: liveins: $vgpr0
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
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; CHECK-NEXT: %x:_(s16) = G_TRUNC [[COPY]](s32)
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; CHECK-NEXT: %d:_(s16) = G_FNEG %x
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; CHECK-NEXT: %ext:_(s32) = G_ANYEXT %d(s16)
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; CHECK-NEXT: $vgpr0 = COPY %ext(s32)
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%0:_(s32) = COPY $vgpr0
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%x:_(s16) = G_TRUNC %0:_(s32)
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%y:_(s16) = G_FCONSTANT half -1.0
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%d:_(s16) = G_FMUL %x, %y
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%ext:_(s32) = G_ANYEXT %d:_(s16)
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$vgpr0 = COPY %ext
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...
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---
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name: test_neg_one_f32_vgpr
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body: |
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bb.0:
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liveins: $vgpr0
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; CHECK-LABEL: name: test_neg_one_f32_vgpr
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; CHECK: liveins: $vgpr0
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
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; CHECK-NEXT: [[FNEG:%[0-9]+]]:_(s32) = G_FNEG [[COPY]]
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; CHECK-NEXT: $vgpr0 = COPY [[FNEG]](s32)
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%0:_(s32) = COPY $vgpr0
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%1:_(s32) = G_FCONSTANT float -1.0
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%2:_(s32) = G_FMUL %0, %1
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$vgpr0 = COPY %2(s32)
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...
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---
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name: test_neg_one_f64_vgpr
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $vgpr0
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; CHECK-LABEL: name: test_neg_one_f64_vgpr
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; CHECK: liveins: $vgpr0
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
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; CHECK-NEXT: %x:_(s64) = G_ANYEXT [[COPY]](s32)
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; CHECK-NEXT: %d:_(s64) = G_FNEG %x
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; CHECK-NEXT: %ext:_(s32) = G_TRUNC %d(s64)
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; CHECK-NEXT: $vgpr0 = COPY %ext(s32)
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%0:_(s32) = COPY $vgpr0
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%x:_(s64) = G_ANYEXT %0:_(s32)
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%y:_(s64) = G_FCONSTANT double -1.0
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%d:_(s64) = G_FMUL %x, %y
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%ext:_(s32) = G_TRUNC %d:_(s64)
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$vgpr0 = COPY %ext
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...
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---
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name: test_neg_ten_f32_vgpr
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body: |
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bb.0:
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liveins: $vgpr0
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; CHECK-LABEL: name: test_neg_ten_f32_vgpr
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; CHECK: liveins: $vgpr0
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
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; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_FCONSTANT float -1.000000e+01
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; CHECK-NEXT: [[FMUL:%[0-9]+]]:_(s32) = G_FMUL [[COPY]], [[C]]
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; CHECK-NEXT: $vgpr0 = COPY [[FMUL]](s32)
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%0:_(s32) = COPY $vgpr0
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%1:_(s32) = G_FCONSTANT float -10.0
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%2:_(s32) = G_FMUL %0, %1
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$vgpr0 = COPY %2(s32)
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...
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---
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name: test_neg_fract_f32_vgpr
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body: |
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bb.0:
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liveins: $vgpr0
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; CHECK-LABEL: name: test_neg_fract_f32_vgpr
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; CHECK: liveins: $vgpr0
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
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; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_FCONSTANT float -5.000000e-01
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; CHECK-NEXT: [[FMUL:%[0-9]+]]:_(s32) = G_FMUL [[COPY]], [[C]]
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; CHECK-NEXT: $vgpr0 = COPY [[FMUL]](s32)
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%0:_(s32) = COPY $vgpr0
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%1:_(s32) = G_FCONSTANT float -0.5
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%2:_(s32) = G_FMUL %0, %1
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$vgpr0 = COPY %2(s32)
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...

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