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[AMDGPU] Remove "amdgpu-enable-structurizer-workarounds" flag (#105819)
1 parent 0d1d95e commit 5def27c

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2 files changed

+4
-20
lines changed

2 files changed

+4
-20
lines changed

llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp

Lines changed: 4 additions & 19 deletions
Original file line numberDiff line numberDiff line change
@@ -338,12 +338,6 @@ static cl::opt<bool> EnableScalarIRPasses(
338338
cl::init(true),
339339
cl::Hidden);
340340

341-
static cl::opt<bool, true> EnableStructurizerWorkarounds(
342-
"amdgpu-enable-structurizer-workarounds",
343-
cl::desc("Enable workarounds for the StructurizeCFG pass"),
344-
cl::location(AMDGPUTargetMachine::EnableStructurizerWorkarounds),
345-
cl::init(true), cl::Hidden);
346-
347341
static cl::opt<bool, true> EnableLowerModuleLDS(
348342
"amdgpu-enable-lower-module-lds", cl::desc("Enable lower module lds pass"),
349343
cl::location(AMDGPUTargetMachine::EnableLowerModuleLDS), cl::init(true),
@@ -615,7 +609,6 @@ AMDGPUTargetMachine::AMDGPUTargetMachine(const Target &T, const Triple &TT,
615609

616610
bool AMDGPUTargetMachine::EnableFunctionCalls = false;
617611
bool AMDGPUTargetMachine::EnableLowerModuleLDS = true;
618-
bool AMDGPUTargetMachine::EnableStructurizerWorkarounds = true;
619612

620613
AMDGPUTargetMachine::~AMDGPUTargetMachine() = default;
621614

@@ -1231,10 +1224,8 @@ bool GCNPassConfig::addPreISel() {
12311224
// Merge divergent exit nodes. StructurizeCFG won't recognize the multi-exit
12321225
// regions formed by them.
12331226
addPass(&AMDGPUUnifyDivergentExitNodesID);
1234-
if (EnableStructurizerWorkarounds) {
1235-
addPass(createFixIrreduciblePass());
1236-
addPass(createUnifyLoopExitsPass());
1237-
}
1227+
addPass(createFixIrreduciblePass());
1228+
addPass(createUnifyLoopExitsPass());
12381229
addPass(createStructurizeCFGPass(false)); // true -> SkipUniformRegions
12391230

12401231
addPass(createAMDGPUAnnotateUniformValuesLegacy());
@@ -1853,8 +1844,6 @@ void AMDGPUCodeGenPassBuilder::addCodeGenPrepare(AddIRPass &addPass) const {
18531844
}
18541845

18551846
void AMDGPUCodeGenPassBuilder::addPreISel(AddIRPass &addPass) const {
1856-
const bool EnableStructurizerWorkarounds =
1857-
AMDGPUTargetMachine::EnableStructurizerWorkarounds;
18581847

18591848
if (TM.getOptLevel() > CodeGenOptLevel::None)
18601849
addPass(FlattenCFGPass());
@@ -1868,12 +1857,8 @@ void AMDGPUCodeGenPassBuilder::addPreISel(AddIRPass &addPass) const {
18681857
// regions formed by them.
18691858

18701859
addPass(AMDGPUUnifyDivergentExitNodesPass());
1871-
1872-
if (EnableStructurizerWorkarounds) {
1873-
addPass(FixIrreduciblePass());
1874-
addPass(UnifyLoopExitsPass());
1875-
}
1876-
1860+
addPass(FixIrreduciblePass());
1861+
addPass(UnifyLoopExitsPass());
18771862
addPass(StructurizeCFGPass(/*SkipUniformRegions=*/false));
18781863

18791864
addPass(AMDGPUAnnotateUniformValuesPass());

llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -38,7 +38,6 @@ class AMDGPUTargetMachine : public LLVMTargetMachine {
3838
public:
3939
static bool EnableFunctionCalls;
4040
static bool EnableLowerModuleLDS;
41-
static bool EnableStructurizerWorkarounds;
4241

4342
AMDGPUTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
4443
StringRef FS, const TargetOptions &Options,

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