@@ -596,7 +596,7 @@ bool IRTranslator::translateBr(const User &U, MachineIRBuilder &MIRBuilder) {
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const Value *CondVal = BrInst.getCondition ();
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MachineBasicBlock *Succ1MBB = &getMBB (*BrInst.getSuccessor (1 ));
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- const auto &TLI = *MF-> getSubtarget (). getTargetLowering ();
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+ const auto &TLI = getTargetLowering ();
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// If this is a series of conditions that are or'd or and'd together, emit
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// this as a sequence of branches instead of setcc's with and/or operations.
@@ -1385,7 +1385,7 @@ bool IRTranslator::translateLoad(const User &U, MachineIRBuilder &MIRBuilder) {
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return true ;
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}
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- auto &TLI = *MF-> getSubtarget (). getTargetLowering ();
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+ auto &TLI = getTargetLowering ();
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MachineMemOperand::Flags Flags =
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TLI.getLoadMemOperandFlags (LI, *DL, AC, LibInfo);
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if (AA && !(Flags & MachineMemOperand::MOInvariant)) {
@@ -1434,7 +1434,7 @@ bool IRTranslator::translateStore(const User &U, MachineIRBuilder &MIRBuilder) {
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return true ;
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}
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- auto &TLI = *MF-> getSubtarget (). getTargetLowering ();
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+ auto &TLI = getTargetLowering ();
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MachineMemOperand::Flags Flags = TLI.getStoreMemOperandFlags (SI, *DL);
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for (unsigned i = 0 ; i < Vals.size (); ++i) {
@@ -1779,7 +1779,7 @@ void IRTranslator::getStackGuard(Register DstReg,
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auto MIB =
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MIRBuilder.buildInstr (TargetOpcode::LOAD_STACK_GUARD, {DstReg}, {});
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- auto &TLI = *MF-> getSubtarget (). getTargetLowering ();
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+ auto &TLI = getTargetLowering ();
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Value *Global = TLI.getSDagStackGuard (*MF->getFunction ().getParent ());
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if (!Global)
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return ;
@@ -2111,7 +2111,7 @@ bool IRTranslator::translateKnownIntrinsic(const CallInst &CI, Intrinsic::ID ID,
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// does. Simplest intrinsic ever!
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return true ;
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case Intrinsic::vastart: {
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- auto &TLI = *MF-> getSubtarget (). getTargetLowering ();
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+ auto &TLI = getTargetLowering ();
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Value *Ptr = CI.getArgOperand (0 );
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unsigned ListSize = TLI.getVaListSizeInBits (*DL) / 8 ;
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Align Alignment = getKnownAlignment (Ptr, *DL);
@@ -2189,7 +2189,7 @@ bool IRTranslator::translateKnownIntrinsic(const CallInst &CI, Intrinsic::ID ID,
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return translateFixedPointIntrinsic (TargetOpcode::G_UDIVFIXSAT, CI, MIRBuilder);
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case Intrinsic::fmuladd: {
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const TargetMachine &TM = MF->getTarget ();
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- const TargetLowering &TLI = *MF-> getSubtarget (). getTargetLowering ();
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+ const TargetLowering &TLI = getTargetLowering ();
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Register Dst = getOrCreateVReg (CI);
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Register Op0 = getOrCreateVReg (*CI.getArgOperand (0 ));
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Register Op1 = getOrCreateVReg (*CI.getArgOperand (1 ));
@@ -2254,7 +2254,7 @@ bool IRTranslator::translateKnownIntrinsic(const CallInst &CI, Intrinsic::ID ID,
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getStackGuard (getOrCreateVReg (CI), MIRBuilder);
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return true ;
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case Intrinsic::stackprotector: {
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- const TargetLowering &TLI = *MF-> getSubtarget (). getTargetLowering ();
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+ const TargetLowering &TLI = getTargetLowering ();
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LLT PtrTy = getLLTForType (*CI.getArgOperand (0 )->getType (), *DL);
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Register GuardVal;
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if (TLI.useLoadStackGuardNode ()) {
@@ -2635,7 +2635,7 @@ bool IRTranslator::translateCall(const User &U, MachineIRBuilder &MIRBuilder) {
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}
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// Add a MachineMemOperand if it is a target mem intrinsic.
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- const TargetLowering &TLI = *MF-> getSubtarget (). getTargetLowering ();
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+ const TargetLowering &TLI = getTargetLowering ();
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TargetLowering::IntrinsicInfo Info;
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// TODO: Add a GlobalISel version of getTgtMemIntrinsic.
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if (TLI.getTgtMemIntrinsic (Info, CI, *MF, ID)) {
@@ -2818,7 +2818,7 @@ bool IRTranslator::translateLandingPad(const User &U,
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// If there aren't registers to copy the values into (e.g., during SjLj
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// exceptions), then don't bother.
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- auto &TLI = *MF-> getSubtarget (). getTargetLowering ();
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+ auto &TLI = getTargetLowering ();
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const Constant *PersonalityFn = MF->getFunction ().getPersonalityFn ();
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if (TLI.getExceptionPointerRegister (PersonalityFn) == 0 &&
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TLI.getExceptionSelectorRegister (PersonalityFn) == 0 )
@@ -2986,7 +2986,7 @@ bool IRTranslator::translateExtractElement(const User &U,
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Register Res = getOrCreateVReg (U);
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Register Val = getOrCreateVReg (*U.getOperand (0 ));
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- const auto &TLI = *MF-> getSubtarget (). getTargetLowering ();
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+ const auto &TLI = getTargetLowering ();
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unsigned PreferredVecIdxWidth = TLI.getVectorIdxTy (*DL).getSizeInBits ();
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Register Idx;
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if (auto *CI = dyn_cast<ConstantInt>(U.getOperand (1 ))) {
@@ -3039,7 +3039,7 @@ bool IRTranslator::translateAtomicCmpXchg(const User &U,
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MachineIRBuilder &MIRBuilder) {
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const AtomicCmpXchgInst &I = cast<AtomicCmpXchgInst>(U);
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- auto &TLI = *MF-> getSubtarget (). getTargetLowering ();
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+ auto &TLI = getTargetLowering ();
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auto Flags = TLI.getAtomicMemOperandFlags (I, *DL);
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auto Res = getOrCreateVRegs (I);
@@ -3061,7 +3061,7 @@ bool IRTranslator::translateAtomicCmpXchg(const User &U,
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bool IRTranslator::translateAtomicRMW (const User &U,
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MachineIRBuilder &MIRBuilder) {
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const AtomicRMWInst &I = cast<AtomicRMWInst>(U);
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- auto &TLI = *MF-> getSubtarget (). getTargetLowering ();
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+ auto &TLI = getTargetLowering ();
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auto Flags = TLI.getAtomicMemOperandFlags (I, *DL);
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Register Res = getOrCreateVReg (I);
@@ -3302,7 +3302,7 @@ bool IRTranslator::translate(const Instruction &Inst) {
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CurBuilder->setDebugLoc (Inst.getDebugLoc ());
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CurBuilder->setPCSections (Inst.getMetadata (LLVMContext::MD_pcsections));
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- auto &TLI = *MF-> getSubtarget (). getTargetLowering ();
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+ auto &TLI = getTargetLowering ();
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if (TLI.fallBackToDAGISel (Inst))
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return false ;
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@@ -3454,7 +3454,7 @@ bool IRTranslator::finalizeBasicBlock(const BasicBlock &BB,
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// Check if we need to generate stack-protector guard checks.
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StackProtector &SP = getAnalysis<StackProtector>();
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if (SP.shouldEmitSDCheck (BB)) {
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- const TargetLowering &TLI = *MF-> getSubtarget (). getTargetLowering ();
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+ const TargetLowering &TLI = getTargetLowering ();
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bool FunctionBasedInstrumentation =
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TLI.getSSPStackGuardCheck (*MF->getFunction ().getParent ());
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SPDescriptor.initialize (&BB, &MBB, FunctionBasedInstrumentation);
@@ -3501,7 +3501,7 @@ bool IRTranslator::emitSPDescriptorParent(StackProtectorDescriptor &SPD,
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MachineBasicBlock *ParentBB) {
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CurBuilder->setInsertPt (*ParentBB, ParentBB->end ());
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// First create the loads to the guard/stack slot for the comparison.
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- const TargetLowering &TLI = *MF-> getSubtarget (). getTargetLowering ();
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+ const TargetLowering &TLI = getTargetLowering ();
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Type *PtrIRTy = PointerType::getUnqual (MF->getFunction ().getContext ());
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const LLT PtrTy = getLLTForType (*PtrIRTy, *DL);
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LLT PtrMemTy = getLLTForMVT (TLI.getPointerMemTy (*DL));
@@ -3593,7 +3593,7 @@ bool IRTranslator::emitSPDescriptorParent(StackProtectorDescriptor &SPD,
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bool IRTranslator::emitSPDescriptorFailure (StackProtectorDescriptor &SPD,
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MachineBasicBlock *FailureBB) {
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CurBuilder->setInsertPt (*FailureBB, FailureBB->end ());
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- const TargetLowering &TLI = *MF-> getSubtarget (). getTargetLowering ();
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+ const TargetLowering &TLI = getTargetLowering ();
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const RTLIB::Libcall Libcall = RTLIB::STACKPROTECTOR_CHECK_FAIL;
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const char *Name = TLI.getLibcallName (Libcall);
@@ -3696,7 +3696,7 @@ bool IRTranslator::runOnMachineFunction(MachineFunction &CurMF) {
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LibInfo = &getAnalysis<TargetLibraryInfoWrapperPass>().getTLI (F);
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FuncInfo.CanLowerReturn = CLI->checkReturnTypeForCallConv (*MF);
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- const auto &TLI = *MF-> getSubtarget (). getTargetLowering ();
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+ const auto &TLI = getTargetLowering ();
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SL = std::make_unique<GISelSwitchLowering>(this , FuncInfo);
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SL->init (TLI, TM, *DL);
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