@@ -86,19 +86,6 @@ static bool isConflictIP(IRBuilder<>::InsertPoint IP1,
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return IP1.getBlock () == IP2.getBlock () && IP1.getPoint () == IP2.getPoint ();
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}
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- static const omp::GV &getGridValue (const Triple &T, Function *Kernel) {
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- if (T.isAMDGPU ()) {
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- StringRef Features =
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- Kernel->getFnAttribute (" target-features" ).getValueAsString ();
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- if (Features.count (" +wavefrontsize64" ))
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- return omp::getAMDGPUGridValues<64 >();
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- return omp::getAMDGPUGridValues<32 >();
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- }
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- if (T.isNVPTX ())
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- return omp::NVPTXGridValues;
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- llvm_unreachable (" No grid value available for this architecture!" );
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- }
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-
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static bool isValidWorkshareLoopScheduleType (OMPScheduleType SchedType) {
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// Valid ordered/unordered and base algorithm combinations.
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switch (SchedType & ~OMPScheduleType::MonotonicityMask) {
@@ -158,6 +145,19 @@ static bool isValidWorkshareLoopScheduleType(OMPScheduleType SchedType) {
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}
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#endif
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+ static const omp::GV &getGridValue (const Triple &T, Function *Kernel) {
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+ if (T.isAMDGPU ()) {
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+ StringRef Features =
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+ Kernel->getFnAttribute (" target-features" ).getValueAsString ();
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+ if (Features.count (" +wavefrontsize64" ))
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+ return omp::getAMDGPUGridValues<64 >();
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+ return omp::getAMDGPUGridValues<32 >();
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+ }
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+ if (T.isNVPTX ())
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+ return omp::NVPTXGridValues;
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+ llvm_unreachable (" No grid value available for this architecture!" );
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+ }
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+
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// / Determine which scheduling algorithm to use, determined from schedule clause
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// / arguments.
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static OMPScheduleType
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