[RISCV] Add VP patterns for vandn.[vv,vx]

This builds upon D155433

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D155434

Author: lukel97

llvm/lib/Target/RISCV/RISCVInstrInfoZvk.td

@@ -274,6 +274,45 @@ multiclass VPatUnaryVL_V<SDPatternOperator op, string instruction_name> {
   }
 }
 
+foreach vti = AllIntegerVectors in {
+  let Predicates = !listconcat([HasStdExtZvbb],
+                               GetVTypePredicates<vti>.Predicates) in {
+    def : Pat<(vti.Vector (riscv_and_vl (riscv_xor_vl
+                                           (vti.Vector vti.RegClass:$rs1),
+                                           (riscv_splat_vector -1),
+                                           (vti.Vector vti.RegClass:$merge),
+                                           (vti.Mask V0),
+                                           VLOpFrag),
+                                        (vti.Vector vti.RegClass:$rs2),
+                                        (vti.Vector vti.RegClass:$merge),
+                                        (vti.Mask V0),
+                                        VLOpFrag)),
+              (!cast<Instruction>("PseudoVANDN_VV_"#vti.LMul.MX#"_MASK")
+                 vti.RegClass:$merge,
+                 vti.RegClass:$rs2,
+                 vti.RegClass:$rs1,
+                 (vti.Mask V0),
+                 GPR:$vl,
+                 vti.Log2SEW,
+                 TAIL_AGNOSTIC)>;
+
+    def : Pat<(vti.Vector (riscv_and_vl (riscv_splat_vector
+                                           (not vti.ScalarRegClass:$rs1)),
+                                        (vti.Vector vti.RegClass:$rs2),
+                                        (vti.Vector vti.RegClass:$merge),
+                                        (vti.Mask V0),
+                                        VLOpFrag)),
+              (!cast<Instruction>("PseudoVANDN_VX_"#vti.LMul.MX#"_MASK")
+                 vti.RegClass:$merge,
+                 vti.RegClass:$rs2,
+                 vti.ScalarRegClass:$rs1,
+                 (vti.Mask V0),
+                 GPR:$vl,
+                 vti.Log2SEW,
+                 TAIL_AGNOSTIC)>;
+  }
+}
+
 defm : VPatUnaryVL_V<riscv_bitreverse_vl, "PseudoVBREV">;
 defm : VPatUnaryVL_V<riscv_bswap_vl, "PseudoVREV8">;
 defm : VPatUnaryVL_V<riscv_ctlz_vl, "PseudoVCLZ">;