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[LLVM][AArch64] Add new feature +sme-mop4 and +sme-tmop (#121935)
The 2024-12 ISA spec release[1] add these features: FEAT_SME_MOP4(sme-mop4) to enable SME Quarter-tile outer product instructions and FEAT_SME_TMOP(sme-tmop) to enable SME Structured sparsity outer product instructions to allow these instructions to be available outside Armv9.6/sme2p2 [1] https://developer.arm.com/Architectures/A-Profile%20Architecture#Downloads
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‎clang/test/Driver/aarch64-implied-sme-features.c

Lines changed: 8 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -53,5 +53,11 @@
5353
// RUN: %clang --target=aarch64-linux-gnu -march=armv8-a+ssve-aes %s -### 2>&1 | FileCheck %s --check-prefix=SVE-AES
5454
// SVE-AES: "-target-feature" "+sme" "-target-feature" "+sme2" "-target-feature" "+ssve-aes" "-target-feature" "+sve-aes"
5555

56-
+// RUN: %clang --target=aarch64-linux-gnu -march=armv8-a+ssve-bitperm %s -### 2>&1 | FileCheck %s --check-prefix=SVE-BITPERM
57-
+// SVE-BITPERM: "-target-feature" "+sme" "-target-feature" "+sme2" "-target-feature" "+ssve-bitperm" "-target-feature" "+sve-bitperm"
56+
// RUN: %clang --target=aarch64-linux-gnu -march=armv8-a+ssve-bitperm %s -### 2>&1 | FileCheck %s --check-prefix=SVE-BITPERM
57+
// SVE-BITPERM: "-target-feature" "+sme" "-target-feature" "+sme2" "-target-feature" "+ssve-bitperm" "-target-feature" "+sve-bitperm"
58+
59+
// RUN: %clang --target=aarch64-linux-gnu -march=armv8-a+sme-tmop %s -### 2>&1 | FileCheck %s --check-prefix=SME-TMOP
60+
// SME-TMOP: "-target-feature" "+sme" "-target-feature" "+sme-tmop" "-target-feature" "+sme2"
61+
62+
// RUN: %clang --target=aarch64-linux-gnu -march=armv8-a+sme-mop4 %s -### 2>&1 | FileCheck %s --check-prefix=SME-MOP4
63+
// SME-MOP4: "-target-feature" "+sme" "-target-feature" "+sme-mop4" "-target-feature" "+sme2"

‎clang/test/Driver/print-supported-extensions-aarch64.c

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -71,6 +71,8 @@
7171
// CHECK-NEXT: sme-fa64 FEAT_SME_FA64 Enable the full A64 instruction set in streaming SVE mode
7272
// CHECK-NEXT: sme-i16i64 FEAT_SME_I16I64 Enable Scalable Matrix Extension (SME) I16I64 instructions
7373
// CHECK-NEXT: sme-lutv2 FEAT_SME_LUTv2 Enable Scalable Matrix Extension (SME) LUTv2 instructions
74+
// CHECK-NEXT: sme-mop4 FEAT_SME_MOP4 Enable SME Quarter-tile outer product instructions
75+
// CHECK-NEXT: sme-tmop FEAT_SME_TMOP Enable SME Structured sparsity outer product instructions
7476
// CHECK-NEXT: sme2 FEAT_SME2 Enable Scalable Matrix Extension 2 (SME2) instructions
7577
// CHECK-NEXT: sme2p1 FEAT_SME2p1 Enable Scalable Matrix Extension 2.1 instructions
7678
// CHECK-NEXT: sme2p2 FEAT_SME2p2 Enable Armv9.6-A Scalable Matrix Extension 2.2 instructions

‎llvm/lib/Target/AArch64/AArch64.td

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -74,7 +74,8 @@ def SVEUnsupported : AArch64Unsupported {
7474
}
7575

7676
let F = [HasSME2p2, HasSVE2p2orSME2p2, HasNonStreamingSVEorSME2p2,
77-
HasNonStreamingSVE2p2orSME2p2, HasNonStreamingSVE2orSSVE_BitPerm] in
77+
HasNonStreamingSVE2p2orSME2p2, HasNonStreamingSVE2orSSVE_BitPerm,
78+
HasSME_MOP4, HasSME_TMOP] in
7879
def SME2p2Unsupported : AArch64Unsupported;
7980

8081
def SME2p1Unsupported : AArch64Unsupported {

‎llvm/lib/Target/AArch64/AArch64Features.td

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -570,6 +570,12 @@ def FeaturePoPS: ExtensionWithMArch<"pops", "PoPS", "FEAT_PoPS",
570570
def FeatureSSVE_BitPerm : ExtensionWithMArch<"ssve-bitperm", "SSVE_BitPerm", "FEAT_SSVE_BitPerm",
571571
"Enable Armv9.6-A SVE BitPerm support in streaming SVE mode", [FeatureSME2, FeatureSVEBitPerm]>;
572572

573+
def FeatureSME_MOP4: ExtensionWithMArch<"sme-mop4", "SME_MOP4", "FEAT_SME_MOP4",
574+
"Enable SME Quarter-tile outer product instructions", [FeatureSME2]>;
575+
576+
def FeatureSME_TMOP: ExtensionWithMArch<"sme-tmop", "SME_TMOP", "FEAT_SME_TMOP",
577+
"Enable SME Structured sparsity outer product instructions.", [FeatureSME2]>;
578+
573579
//===----------------------------------------------------------------------===//
574580
// Other Features
575581
//===----------------------------------------------------------------------===//

‎llvm/lib/Target/AArch64/AArch64InstrInfo.td

Lines changed: 5 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -206,12 +206,16 @@ def HasSSVE_FP8DOT4 : Predicate<"Subtarget->hasSSVE_FP8DOT4() || "
206206
"ssve-fp8dot4 or (sve2 and fp8dot4)">;
207207
def HasLUT : Predicate<"Subtarget->hasLUT()">,
208208
AssemblerPredicateWithAll<(all_of FeatureLUT), "lut">;
209-
def HasSME_LUTv2 : Predicate<"Subtarget->isStreaming() && Subtarget->hasSME_LUTv2()">,
209+
def HasSME_LUTv2 : Predicate<"Subtarget->isStreaming() && Subtarget->hasSME_LUTv2()">,
210210
AssemblerPredicateWithAll<(all_of FeatureSME_LUTv2), "sme-lutv2">;
211211
def HasSMEF8F16 : Predicate<"Subtarget->isStreaming() && Subtarget->hasSMEF8F16()">,
212212
AssemblerPredicateWithAll<(all_of FeatureSMEF8F16), "sme-f8f16">;
213213
def HasSMEF8F32 : Predicate<"Subtarget->isStreaming() && Subtarget->hasSMEF8F32()">,
214214
AssemblerPredicateWithAll<(all_of FeatureSMEF8F32), "sme-f8f32">;
215+
def HasSME_MOP4 : Predicate<"(Subtarget->isStreaming() && Subtarget->hasSME_MOP4())">,
216+
AssemblerPredicateWithAll<(all_of FeatureSME_MOP4), "sme-mop4">;
217+
def HasSME_TMOP : Predicate<"(Subtarget->isStreaming() && Subtarget->hasSME_TMOP())">,
218+
AssemblerPredicateWithAll<(all_of FeatureSME_TMOP), "sme-tmop">;
215219

216220
def HasCMPBR : Predicate<"Subtarget->hasCMPBR()">,
217221
AssemblerPredicateWithAll<(all_of FeatureCMPBR), "cmpbr">;

‎llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td

Lines changed: 32 additions & 21 deletions
Original file line numberDiff line numberDiff line change
@@ -147,7 +147,7 @@ defm USMOPA_MPPZZ_D : sme_int_outer_product_i64<0b100, "usmopa", int_aarch64_sme
147147
defm USMOPS_MPPZZ_D : sme_int_outer_product_i64<0b101, "usmops", int_aarch64_sme_usmops_wide>;
148148
}
149149

150-
let Predicates = [HasSME2p2] in {
150+
let Predicates = [HasSME_MOP4] in {
151151
defm SMOP4A : sme_quarter_outer_product_i8_i32<0b0, 0b0, 0b0, "smop4a">;
152152
defm SMOP4S : sme_quarter_outer_product_i8_i32<0b0, 0b0, 0b1, "smop4s">;
153153
defm SUMOP4A : sme_quarter_outer_product_i8_i32<0b0, 0b1, 0b0, "sumop4a">;
@@ -163,7 +163,7 @@ let Predicates = [HasSME2p2] in {
163163
defm UMOP4S : sme_quarter_outer_product_i16_i32<0b1, 0b1, "umop4s">;
164164
}
165165

166-
let Predicates = [HasSME2p2, HasSMEI16I64] in {
166+
let Predicates = [HasSME_MOP4, HasSMEI16I64] in {
167167
defm SMOP4A : sme_quarter_outer_product_i64<0b0, 0b0, 0b0, "smop4a">;
168168
defm SMOP4S : sme_quarter_outer_product_i64<0b0, 0b0, 0b1, "smop4s">;
169169
defm SUMOP4A : sme_quarter_outer_product_i64<0b0, 0b1, 0b0, "sumop4a">;
@@ -174,7 +174,7 @@ let Predicates = [HasSME2p2, HasSMEI16I64] in {
174174
defm USMOP4S : sme_quarter_outer_product_i64<0b1, 0b0, 0b1, "usmop4s">;
175175
}
176176

177-
let Predicates = [HasSME2p2] in {
177+
let Predicates = [HasSME_TMOP] in {
178178
def STMOPA_M2ZZZI_BtoS : sme_int_sparse_outer_product_i32<0b00100, ZZ_b_mul_r, ZPR8, "stmopa">;
179179
def STMOPA_M2ZZZI_HtoS : sme_int_sparse_outer_product_i32<0b00101, ZZ_h_mul_r, ZPR16, "stmopa">;
180180
def UTMOPA_M2ZZZI_BtoS : sme_int_sparse_outer_product_i32<0b11100, ZZ_b_mul_r, ZPR8, "utmopa">;
@@ -1053,41 +1053,52 @@ let Predicates = [HasSME2, HasSVEBFSCALE] in {
10531053
defm BFSCALE : sme2_bfscale_multi<"bfscale">;
10541054
}
10551055

1056-
let Predicates = [HasSME2p2] in {
1056+
let Predicates = [HasSME_MOP4] in {
1057+
defm BFMOP4A : sme2_bfmop4as_widening<0, "bfmop4a">;
1058+
defm BFMOP4S : sme2_bfmop4as_widening<1, "bfmop4s">;
1059+
1060+
defm FMOP4A : sme2_fmop4as_fp16_fp32_widening<0, "fmop4a">;
1061+
defm FMOP4S : sme2_fmop4as_fp16_fp32_widening<1, "fmop4s">;
1062+
1063+
defm FMOP4A : sme2_fmop4as_fp32_non_widening<0, "fmop4a">;
1064+
defm FMOP4S : sme2_fmop4as_fp32_non_widening<1, "fmop4s">;
1065+
}
1066+
1067+
let Predicates = [HasSME_TMOP] in {
10571068
def FTMOPA_M2ZZZI_HtoS : sme_tmopa_32b<0b11000, ZZ_h_mul_r, ZPR16, "ftmopa">;
10581069
def FTMOPA_M2ZZZI_StoS : sme_tmopa_32b<0b00000, ZZ_s_mul_r, ZPR32, "ftmopa">;
10591070
def BFTMOPA_M2ZZZI_HtoS : sme_tmopa_32b<0b10000, ZZ_h_mul_r, ZPR16, "bftmopa">;
1071+
}
10601072

1061-
defm BFMOP4A : sme2_bfmop4as_widening<0, "bfmop4a">;
1062-
defm BFMOP4S : sme2_bfmop4as_widening<1, "bfmop4s">;
1063-
1073+
let Predicates = [HasSME2p2] in {
10641074
defm FMUL_2ZZ : sme2_multi2_fmul_sm<"fmul">;
10651075
defm FMUL_2Z2Z : sme2_multi2_fmul_mm< "fmul">;
10661076
defm FMUL_4ZZ : sme2_multi4_fmul_sm<"fmul">;
10671077
defm FMUL_4Z4Z : sme2_multi4_fmul_mm< "fmul">;
10681078

1069-
defm FMOP4A : sme2_fmop4as_fp32_non_widening<0, "fmop4a">;
1070-
defm FMOP4S : sme2_fmop4as_fp32_non_widening<1, "fmop4s">;
1071-
1072-
defm FMOP4A : sme2_fmop4as_fp16_fp32_widening<0, "fmop4a">;
1073-
defm FMOP4S : sme2_fmop4as_fp16_fp32_widening<1, "fmop4s">;
1074-
}
1079+
} // [HasSME2p2]
10751080

1076-
let Predicates = [HasSME2p2, HasSMEB16B16] in {
1081+
let Predicates = [HasSME_TMOP, HasSMEB16B16] in {
10771082
def BFTMOPA_M2ZZZI_HtoH : sme_tmopa_16b<0b11001, ZZ_h_mul_r, ZPR16, "bftmopa">;
10781083
}
10791084

1080-
let Predicates = [HasSME2p2, HasSMEF8F32], Uses = [FPMR, FPCR] in {
1085+
let Predicates = [HasSME_TMOP, HasSMEF8F32], Uses = [FPMR, FPCR] in {
10811086
def FTMOPA_M2ZZZI_BtoS : sme_tmopa_32b<0b01000, ZZ_b_mul_r, ZPR8, "ftmopa">;
1082-
}
1087+
}
10831088

1084-
let Predicates = [HasSME2p2, HasSMEF8F16], Uses = [FPMR, FPCR] in {
1089+
let Predicates = [HasSME_TMOP, HasSMEF8F16], Uses = [FPMR, FPCR] in {
10851090
def FTMOPA_M2ZZZI_BtoH : sme_tmopa_16b<0b01001, ZZ_b_mul_r, ZPR8, "ftmopa">;
1091+
}
1092+
1093+
let Predicates = [HasSME_MOP4, HasSMEF8F16], Uses = [FPMR, FPCR] in {
10861094
defm FMOP4A : sme2_fmop4a_fp8_fp16_2way<"fmop4a">;
10871095
}
10881096

1089-
let Predicates = [HasSME2p2, HasSMEF16F16] in {
1097+
let Predicates = [HasSME_TMOP, HasSMEF16F16] in {
10901098
def FTMOPA_M2ZZZI_HtoH : sme_tmopa_16b<0b10001, ZZ_h_mul_r, ZPR16, "ftmopa">;
1099+
}
1100+
1101+
let Predicates = [HasSME_MOP4, HasSMEF16F16] in {
10911102
defm FMOP4A : sme2_fmop4as_fp16_non_widening<0, "fmop4a">;
10921103
defm FMOP4S : sme2_fmop4as_fp16_non_widening<1, "fmop4s">;
10931104
}
@@ -1098,17 +1109,17 @@ let Predicates = [HasSME2, HasSVEBFSCALE] in {
10981109
}
10991110

11001111
let Uses = [FPMR, FPCR] in {
1101-
let Predicates = [HasSME2p2, HasSMEF8F32] in {
1112+
let Predicates = [HasSME_MOP4, HasSMEF8F32] in {
11021113
defm FMOP4A : sme2_fmop4a_fp8_fp32_4way<"fmop4a">;
11031114
}
11041115
}
11051116

1106-
let Predicates = [HasSME2p2, HasSMEB16B16] in {
1117+
let Predicates = [HasSME_MOP4, HasSMEB16B16] in {
11071118
defm BFMOP4A : sme2_bfmop4as_non_widening<0, "bfmop4a">;
11081119
defm BFMOP4S : sme2_bfmop4as_non_widening<1, "bfmop4s">;
11091120
}
11101121

1111-
let Predicates = [HasSME2p2, HasSMEF64F64] in {
1122+
let Predicates = [HasSME_MOP4, HasSMEF64F64] in {
11121123
defm FMOP4A : sme2_fmop4as_fp64_non_widening<0, "fmop4a">;
11131124
defm FMOP4S : sme2_fmop4as_fp64_non_widening<1, "fmop4s">;
11141125
}

‎llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -3831,6 +3831,8 @@ static const struct Extension {
38313831
{"occmo", {AArch64::FeatureOCCMO}},
38323832
{"pcdphint", {AArch64::FeaturePCDPHINT}},
38333833
{"ssve-bitperm", {AArch64::FeatureSSVE_BitPerm}},
3834+
{"sme-mop4", {AArch64::FeatureSME_MOP4}},
3835+
{"sme-tmop", {AArch64::FeatureSME_TMOP}},
38343836
};
38353837

38363838
static void setRequiredFeatureString(FeatureBitset FBS, std::string &Str) {

‎llvm/test/MC/AArch64/SME2p2/bfmop4as-non-widening-diagnostics.s

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
// RUN: not llvm-mc -triple=aarch64 -mattr=+sme2p2,+sme-b16b16 < %s 2>&1 | FileCheck %s
1+
// RUN: not llvm-mc -triple=aarch64 -mattr=+sme-mop4,+sme-b16b16 < %s 2>&1 | FileCheck %s
22

33
// BFMOP4A
44

‎llvm/test/MC/AArch64/SME2p2/bfmop4as-non-widening.s

Lines changed: 31 additions & 31 deletions
Original file line numberDiff line numberDiff line change
@@ -1,15 +1,15 @@
1-
// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2p2,+sme-b16b16 < %s \
1+
// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme-mop4,+sme-b16b16 < %s \
22
// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
33
// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
44
// RUN: | FileCheck %s --check-prefix=CHECK-ERROR
5-
// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme2p2,+sme-b16b16 < %s \
6-
// RUN: | llvm-objdump -d --mattr=+sme2p2,+sme-b16b16 - | FileCheck %s --check-prefix=CHECK-INST
7-
// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme2p2,+sme-b16b16 < %s \
8-
// RUN: | llvm-objdump -d --mattr=-sme2p2 - | FileCheck %s --check-prefix=CHECK-UNKNOWN
5+
// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme-mop4,+sme-b16b16 < %s \
6+
// RUN: | llvm-objdump -d --mattr=+sme-mop4,+sme-b16b16 - | FileCheck %s --check-prefix=CHECK-INST
7+
// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme-mop4,+sme-b16b16 < %s \
8+
// RUN: | llvm-objdump -d --mattr=-sme-mop4 - | FileCheck %s --check-prefix=CHECK-UNKNOWN
99
// Disassemble encoding and check the re-encoding (-show-encoding) matches.
10-
// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2p2,+sme-b16b16 < %s \
10+
// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme-mop4,+sme-b16b16 < %s \
1111
// RUN: | sed '/.text/d' | sed 's/.*encoding: //g' \
12-
// RUN: | llvm-mc -triple=aarch64 -mattr=+sme2p2,+sme-b16b16 -disassemble -show-encoding \
12+
// RUN: | llvm-mc -triple=aarch64 -mattr=+sme-mop4,+sme-b16b16 -disassemble -show-encoding \
1313
// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
1414

1515
// BFMOP4A
@@ -19,79 +19,79 @@
1919
bfmop4a za0.h, z0.h, z16.h // 10000001-00100000-00000000-00001000
2020
// CHECK-INST: bfmop4a za0.h, z0.h, z16.h
2121
// CHECK-ENCODING: [0x08,0x00,0x20,0x81]
22-
// CHECK-ERROR: instruction requires: sme2p2 sme-b16b16
22+
// CHECK-ERROR: instruction requires: sme-b16b16 sme-mop4
2323
// CHECK-UNKNOWN: 81200008 <unknown>
2424

2525
bfmop4a za1.h, z12.h, z24.h // 10000001-00101000-00000001-10001001
2626
// CHECK-INST: bfmop4a za1.h, z12.h, z24.h
2727
// CHECK-ENCODING: [0x89,0x01,0x28,0x81]
28-
// CHECK-ERROR: instruction requires: sme2p2 sme-b16b16
28+
// CHECK-ERROR: instruction requires: sme-b16b16 sme-mop4
2929
// CHECK-UNKNOWN: 81280189 <unknown>
3030

3131
bfmop4a za1.h, z14.h, z30.h // 10000001-00101110-00000001-11001001
3232
// CHECK-INST: bfmop4a za1.h, z14.h, z30.h
3333
// CHECK-ENCODING: [0xc9,0x01,0x2e,0x81]
34-
// CHECK-ERROR: instruction requires: sme2p2 sme-b16b16
34+
// CHECK-ERROR: instruction requires: sme-b16b16 sme-mop4
3535
// CHECK-UNKNOWN: 812e01c9 <unknown>
3636

3737
// Single and multiple vectors
3838

3939
bfmop4a za0.h, z0.h, {z16.h-z17.h} // 10000001-00110000-00000000-00001000
4040
// CHECK-INST: bfmop4a za0.h, z0.h, { z16.h, z17.h }
4141
// CHECK-ENCODING: [0x08,0x00,0x30,0x81]
42-
// CHECK-ERROR: instruction requires: sme2p2 sme-b16b16
42+
// CHECK-ERROR: instruction requires: sme-b16b16 sme-mop4
4343
// CHECK-UNKNOWN: 81300008 <unknown>
4444

4545
bfmop4a za1.h, z12.h, {z24.h-z25.h} // 10000001-00111000-00000001-10001001
4646
// CHECK-INST: bfmop4a za1.h, z12.h, { z24.h, z25.h }
4747
// CHECK-ENCODING: [0x89,0x01,0x38,0x81]
48-
// CHECK-ERROR: instruction requires: sme2p2 sme-b16b16
48+
// CHECK-ERROR: instruction requires: sme-b16b16 sme-mop4
4949
// CHECK-UNKNOWN: 81380189 <unknown>
5050

5151
bfmop4a za1.h, z14.h, {z30.h-z31.h} // 10000001-00111110-00000001-11001001
5252
// CHECK-INST: bfmop4a za1.h, z14.h, { z30.h, z31.h }
5353
// CHECK-ENCODING: [0xc9,0x01,0x3e,0x81]
54-
// CHECK-ERROR: instruction requires: sme2p2 sme-b16b16
54+
// CHECK-ERROR: instruction requires: sme-b16b16 sme-mop4
5555
// CHECK-UNKNOWN: 813e01c9 <unknown>
5656

5757
// Multiple and single vectors
5858

5959
bfmop4a za0.h, {z0.h-z1.h}, z16.h // 10000001-00100000-00000010-00001000
6060
// CHECK-INST: bfmop4a za0.h, { z0.h, z1.h }, z16.h
6161
// CHECK-ENCODING: [0x08,0x02,0x20,0x81]
62-
// CHECK-ERROR: instruction requires: sme2p2 sme-b16b16
62+
// CHECK-ERROR: instruction requires: sme-b16b16 sme-mop4
6363
// CHECK-UNKNOWN: 81200208 <unknown>
6464

6565
bfmop4a za1.h, {z12.h-z13.h}, z24.h // 10000001-00101000-00000011-10001001
6666
// CHECK-INST: bfmop4a za1.h, { z12.h, z13.h }, z24.h
6767
// CHECK-ENCODING: [0x89,0x03,0x28,0x81]
68-
// CHECK-ERROR: instruction requires: sme2p2 sme-b16b16
68+
// CHECK-ERROR: instruction requires: sme-b16b16 sme-mop4
6969
// CHECK-UNKNOWN: 81280389 <unknown>
7070

7171
bfmop4a za1.h, {z14.h-z15.h}, z30.h // 10000001-00101110-00000011-11001001
7272
// CHECK-INST: bfmop4a za1.h, { z14.h, z15.h }, z30.h
7373
// CHECK-ENCODING: [0xc9,0x03,0x2e,0x81]
74-
// CHECK-ERROR: instruction requires: sme2p2 sme-b16b16
74+
// CHECK-ERROR: instruction requires: sme-b16b16 sme-mop4
7575
// CHECK-UNKNOWN: 812e03c9 <unknown>
7676

7777
// Multiple vectors
7878

7979
bfmop4a za0.h, {z0.h-z1.h}, {z16.h-z17.h} // 10000001-00110000-00000010-00001000
8080
// CHECK-INST: bfmop4a za0.h, { z0.h, z1.h }, { z16.h, z17.h }
8181
// CHECK-ENCODING: [0x08,0x02,0x30,0x81]
82-
// CHECK-ERROR: instruction requires: sme2p2 sme-b16b16
82+
// CHECK-ERROR: instruction requires: sme-b16b16 sme-mop4
8383
// CHECK-UNKNOWN: 81300208 <unknown>
8484

8585
bfmop4a za1.h, {z12.h-z13.h}, {z24.h-z25.h} // 10000001-00111000-00000011-10001001
8686
// CHECK-INST: bfmop4a za1.h, { z12.h, z13.h }, { z24.h, z25.h }
8787
// CHECK-ENCODING: [0x89,0x03,0x38,0x81]
88-
// CHECK-ERROR: instruction requires: sme2p2 sme-b16b16
88+
// CHECK-ERROR: instruction requires: sme-b16b16 sme-mop4
8989
// CHECK-UNKNOWN: 81380389 <unknown>
9090

9191
bfmop4a za1.h, {z14.h-z15.h}, {z30.h-z31.h} // 10000001-00111110-00000011-11001001
9292
// CHECK-INST: bfmop4a za1.h, { z14.h, z15.h }, { z30.h, z31.h }
9393
// CHECK-ENCODING: [0xc9,0x03,0x3e,0x81]
94-
// CHECK-ERROR: instruction requires: sme2p2 sme-b16b16
94+
// CHECK-ERROR: instruction requires: sme-b16b16 sme-mop4
9595
// CHECK-UNKNOWN: 813e03c9 <unknown>
9696

9797

@@ -102,77 +102,77 @@ bfmop4a za1.h, {z14.h-z15.h}, {z30.h-z31.h} // 10000001-00111110-00000011-11001
102102
bfmop4s za0.h, z0.h, z16.h // 10000001-00100000-00000000-00011000
103103
// CHECK-INST: bfmop4s za0.h, z0.h, z16.h
104104
// CHECK-ENCODING: [0x18,0x00,0x20,0x81]
105-
// CHECK-ERROR: instruction requires: sme2p2 sme-b16b16
105+
// CHECK-ERROR: instruction requires: sme-b16b16 sme-mop4
106106
// CHECK-UNKNOWN: 81200018 <unknown>
107107

108108
bfmop4s za1.h, z12.h, z24.h // 10000001-00101000-00000001-10011001
109109
// CHECK-INST: bfmop4s za1.h, z12.h, z24.h
110110
// CHECK-ENCODING: [0x99,0x01,0x28,0x81]
111-
// CHECK-ERROR: instruction requires: sme2p2 sme-b16b16
111+
// CHECK-ERROR: instruction requires: sme-b16b16 sme-mop4
112112
// CHECK-UNKNOWN: 81280199 <unknown>
113113

114114
bfmop4s za1.h, z14.h, z30.h // 10000001-00101110-00000001-11011001
115115
// CHECK-INST: bfmop4s za1.h, z14.h, z30.h
116116
// CHECK-ENCODING: [0xd9,0x01,0x2e,0x81]
117-
// CHECK-ERROR: instruction requires: sme2p2 sme-b16b16
117+
// CHECK-ERROR: instruction requires: sme-b16b16 sme-mop4
118118
// CHECK-UNKNOWN: 812e01d9 <unknown>
119119

120120
// Single and multiple vectors
121121

122122
bfmop4s za0.h, z0.h, {z16.h-z17.h} // 10000001-00110000-00000000-00011000
123123
// CHECK-INST: bfmop4s za0.h, z0.h, { z16.h, z17.h }
124124
// CHECK-ENCODING: [0x18,0x00,0x30,0x81]
125-
// CHECK-ERROR: instruction requires: sme2p2 sme-b16b16
125+
// CHECK-ERROR: instruction requires: sme-b16b16 sme-mop4
126126
// CHECK-UNKNOWN: 81300018 <unknown>
127127

128128
bfmop4s za1.h, z12.h, {z24.h-z25.h} // 10000001-00111000-00000001-10011001
129129
// CHECK-INST: bfmop4s za1.h, z12.h, { z24.h, z25.h }
130130
// CHECK-ENCODING: [0x99,0x01,0x38,0x81]
131-
// CHECK-ERROR: instruction requires: sme2p2 sme-b16b16
131+
// CHECK-ERROR: instruction requires: sme-b16b16 sme-mop4
132132
// CHECK-UNKNOWN: 81380199 <unknown>
133133

134134
bfmop4s za1.h, z14.h, {z30.h-z31.h} // 10000001-00111110-00000001-11011001
135135
// CHECK-INST: bfmop4s za1.h, z14.h, { z30.h, z31.h }
136136
// CHECK-ENCODING: [0xd9,0x01,0x3e,0x81]
137-
// CHECK-ERROR: instruction requires: sme2p2 sme-b16b16
137+
// CHECK-ERROR: instruction requires: sme-b16b16 sme-mop4
138138
// CHECK-UNKNOWN: 813e01d9 <unknown>
139139

140140
// Multiple and single vectors
141141

142142
bfmop4s za0.h, {z0.h-z1.h}, z16.h // 10000001-00100000-00000010-00011000
143143
// CHECK-INST: bfmop4s za0.h, { z0.h, z1.h }, z16.h
144144
// CHECK-ENCODING: [0x18,0x02,0x20,0x81]
145-
// CHECK-ERROR: instruction requires: sme2p2 sme-b16b16
145+
// CHECK-ERROR: instruction requires: sme-b16b16 sme-mop4
146146
// CHECK-UNKNOWN: 81200218 <unknown>
147147

148148
bfmop4s za1.h, {z12.h-z13.h}, z24.h // 10000001-00101000-00000011-10011001
149149
// CHECK-INST: bfmop4s za1.h, { z12.h, z13.h }, z24.h
150150
// CHECK-ENCODING: [0x99,0x03,0x28,0x81]
151-
// CHECK-ERROR: instruction requires: sme2p2 sme-b16b16
151+
// CHECK-ERROR: instruction requires: sme-b16b16 sme-mop4
152152
// CHECK-UNKNOWN: 81280399 <unknown>
153153

154154
bfmop4s za1.h, {z14.h-z15.h}, z30.h // 10000001-00101110-00000011-11011001
155155
// CHECK-INST: bfmop4s za1.h, { z14.h, z15.h }, z30.h
156156
// CHECK-ENCODING: [0xd9,0x03,0x2e,0x81]
157-
// CHECK-ERROR: instruction requires: sme2p2 sme-b16b16
157+
// CHECK-ERROR: instruction requires: sme-b16b16 sme-mop4
158158
// CHECK-UNKNOWN: 812e03d9 <unknown>
159159

160160
// Multiple vectors
161161

162162
bfmop4s za0.h, {z0.h-z1.h}, {z16.h-z17.h} // 10000001-00110000-00000010-00011000
163163
// CHECK-INST: bfmop4s za0.h, { z0.h, z1.h }, { z16.h, z17.h }
164164
// CHECK-ENCODING: [0x18,0x02,0x30,0x81]
165-
// CHECK-ERROR: instruction requires: sme2p2 sme-b16b16
165+
// CHECK-ERROR: instruction requires: sme-b16b16 sme-mop4
166166
// CHECK-UNKNOWN: 81300218 <unknown>
167167

168168
bfmop4s za1.h, {z12.h-z13.h}, {z24.h-z25.h} // 10000001-00111000-00000011-10011001
169169
// CHECK-INST: bfmop4s za1.h, { z12.h, z13.h }, { z24.h, z25.h }
170170
// CHECK-ENCODING: [0x99,0x03,0x38,0x81]
171-
// CHECK-ERROR: instruction requires: sme2p2 sme-b16b16
171+
// CHECK-ERROR: instruction requires: sme-b16b16 sme-mop4
172172
// CHECK-UNKNOWN: 81380399 <unknown>
173173

174174
bfmop4s za1.h, {z14.h-z15.h}, {z30.h-z31.h} // 10000001-00111110-00000011-11011001
175175
// CHECK-INST: bfmop4s za1.h, { z14.h, z15.h }, { z30.h, z31.h }
176176
// CHECK-ENCODING: [0xd9,0x03,0x3e,0x81]
177-
// CHECK-ERROR: instruction requires: sme2p2 sme-b16b16
177+
// CHECK-ERROR: instruction requires: sme-b16b16 sme-mop4
178178
// CHECK-UNKNOWN: 813e03d9 <unknown>

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