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[X86] Add ANDN test case for PR48768
D94856 covered the BMI cases where we had existing tests, this adds a missing ANDN test case
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+68
-46
lines changed

1 file changed

+68
-46
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‎llvm/test/CodeGen/X86/bmi.ll

Lines changed: 68 additions & 46 deletions
Original file line numberDiff line numberDiff line change
@@ -309,6 +309,28 @@ define i1 @andn_cmp_i8(i8 %x, i8 %y) {
309309
ret i1 %cmp
310310
}
311311

312+
; FIXME: PR48768 - 'andn' clears the overflow flag, so we don't need a separate 'test'.
313+
define i1 @andn_cmp_i32_overflow(i32 %x, i32 %y) {
314+
; X86-LABEL: andn_cmp_i32_overflow:
315+
; X86: # %bb.0:
316+
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
317+
; X86-NEXT: andnl {{[0-9]+}}(%esp), %eax, %eax
318+
; X86-NEXT: testl %eax, %eax
319+
; X86-NEXT: setle %al
320+
; X86-NEXT: retl
321+
;
322+
; X64-LABEL: andn_cmp_i32_overflow:
323+
; X64: # %bb.0:
324+
; X64-NEXT: andnl %edi, %esi, %eax
325+
; X64-NEXT: testl %eax, %eax
326+
; X64-NEXT: setle %al
327+
; X64-NEXT: retq
328+
%noty = xor i32 %y, -1
329+
%and = and i32 %x, %noty
330+
%cmp = icmp slt i32 %and, 1
331+
ret i1 %cmp
332+
}
333+
312334
declare i32 @llvm.x86.bmi.bextr.32(i32, i32)
313335

314336
define i32 @bextr32(i32 %x, i32 %y) {
@@ -498,10 +520,10 @@ define i32 @blsi32_z(i32 %a, i32 %b) nounwind {
498520
; X86-LABEL: blsi32_z:
499521
; X86: # %bb.0:
500522
; X86-NEXT: blsil {{[0-9]+}}(%esp), %eax
501-
; X86-NEXT: jne .LBB24_2
523+
; X86-NEXT: jne .LBB25_2
502524
; X86-NEXT: # %bb.1:
503525
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
504-
; X86-NEXT: .LBB24_2:
526+
; X86-NEXT: .LBB25_2:
505527
; X86-NEXT: retl
506528
;
507529
; X64-LABEL: blsi32_z:
@@ -605,11 +627,11 @@ define i64 @blsi64_z(i64 %a, i64 %b) nounwind {
605627
; X86-NEXT: andl %ecx, %eax
606628
; X86-NEXT: movl %eax, %ecx
607629
; X86-NEXT: orl %edx, %ecx
608-
; X86-NEXT: jne .LBB28_2
630+
; X86-NEXT: jne .LBB29_2
609631
; X86-NEXT: # %bb.1:
610632
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
611633
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
612-
; X86-NEXT: .LBB28_2:
634+
; X86-NEXT: .LBB29_2:
613635
; X86-NEXT: popl %esi
614636
; X86-NEXT: retl
615637
;
@@ -730,10 +752,10 @@ define i32 @blsmsk32_z(i32 %a, i32 %b) nounwind {
730752
; X86-LABEL: blsmsk32_z:
731753
; X86: # %bb.0:
732754
; X86-NEXT: blsmskl {{[0-9]+}}(%esp), %eax
733-
; X86-NEXT: jne .LBB33_2
755+
; X86-NEXT: jne .LBB34_2
734756
; X86-NEXT: # %bb.1:
735757
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
736-
; X86-NEXT: .LBB33_2:
758+
; X86-NEXT: .LBB34_2:
737759
; X86-NEXT: retl
738760
;
739761
; X64-LABEL: blsmsk32_z:
@@ -835,11 +857,11 @@ define i64 @blsmsk64_z(i64 %a, i64 %b) nounwind {
835857
; X86-NEXT: xorl %esi, %edx
836858
; X86-NEXT: movl %eax, %ecx
837859
; X86-NEXT: orl %edx, %ecx
838-
; X86-NEXT: jne .LBB37_2
860+
; X86-NEXT: jne .LBB38_2
839861
; X86-NEXT: # %bb.1:
840862
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
841863
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
842-
; X86-NEXT: .LBB37_2:
864+
; X86-NEXT: .LBB38_2:
843865
; X86-NEXT: popl %esi
844866
; X86-NEXT: retl
845867
;
@@ -960,10 +982,10 @@ define i32 @blsr32_z(i32 %a, i32 %b) nounwind {
960982
; X86-LABEL: blsr32_z:
961983
; X86: # %bb.0:
962984
; X86-NEXT: blsrl {{[0-9]+}}(%esp), %eax
963-
; X86-NEXT: jne .LBB42_2
985+
; X86-NEXT: jne .LBB43_2
964986
; X86-NEXT: # %bb.1:
965987
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
966-
; X86-NEXT: .LBB42_2:
988+
; X86-NEXT: .LBB43_2:
967989
; X86-NEXT: retl
968990
;
969991
; X64-LABEL: blsr32_z:
@@ -1065,11 +1087,11 @@ define i64 @blsr64_z(i64 %a, i64 %b) nounwind {
10651087
; X86-NEXT: andl %esi, %edx
10661088
; X86-NEXT: movl %eax, %ecx
10671089
; X86-NEXT: orl %edx, %ecx
1068-
; X86-NEXT: jne .LBB46_2
1090+
; X86-NEXT: jne .LBB47_2
10691091
; X86-NEXT: # %bb.1:
10701092
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
10711093
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
1072-
; X86-NEXT: .LBB46_2:
1094+
; X86-NEXT: .LBB47_2:
10731095
; X86-NEXT: popl %esi
10741096
; X86-NEXT: retl
10751097
;
@@ -1203,20 +1225,20 @@ define void @pr40060(i32, i32) {
12031225
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
12041226
; X86-NEXT: bextrl %eax, {{[0-9]+}}(%esp), %eax
12051227
; X86-NEXT: testl %eax, %eax
1206-
; X86-NEXT: js .LBB51_1
1228+
; X86-NEXT: js .LBB52_1
12071229
; X86-NEXT: # %bb.2:
12081230
; X86-NEXT: jmp bar # TAILCALL
1209-
; X86-NEXT: .LBB51_1:
1231+
; X86-NEXT: .LBB52_1:
12101232
; X86-NEXT: retl
12111233
;
12121234
; X64-LABEL: pr40060:
12131235
; X64: # %bb.0:
12141236
; X64-NEXT: bextrl %esi, %edi, %eax
12151237
; X64-NEXT: testl %eax, %eax
1216-
; X64-NEXT: js .LBB51_1
1238+
; X64-NEXT: js .LBB52_1
12171239
; X64-NEXT: # %bb.2:
12181240
; X64-NEXT: jmp bar # TAILCALL
1219-
; X64-NEXT: .LBB51_1:
1241+
; X64-NEXT: .LBB52_1:
12201242
; X64-NEXT: retq
12211243
%3 = tail call i32 @llvm.x86.bmi.bextr.32(i32 %0, i32 %1)
12221244
%4 = icmp sgt i32 %3, -1
@@ -1235,10 +1257,10 @@ define i32 @blsr32_branch(i32 %x) {
12351257
; X86-NEXT: .cfi_def_cfa_offset 8
12361258
; X86-NEXT: .cfi_offset %esi, -8
12371259
; X86-NEXT: blsrl {{[0-9]+}}(%esp), %esi
1238-
; X86-NEXT: jne .LBB52_2
1260+
; X86-NEXT: jne .LBB53_2
12391261
; X86-NEXT: # %bb.1:
12401262
; X86-NEXT: calll bar
1241-
; X86-NEXT: .LBB52_2:
1263+
; X86-NEXT: .LBB53_2:
12421264
; X86-NEXT: movl %esi, %eax
12431265
; X86-NEXT: popl %esi
12441266
; X86-NEXT: .cfi_def_cfa_offset 4
@@ -1250,10 +1272,10 @@ define i32 @blsr32_branch(i32 %x) {
12501272
; X64-NEXT: .cfi_def_cfa_offset 16
12511273
; X64-NEXT: .cfi_offset %rbx, -16
12521274
; X64-NEXT: blsrl %edi, %ebx
1253-
; X64-NEXT: jne .LBB52_2
1275+
; X64-NEXT: jne .LBB53_2
12541276
; X64-NEXT: # %bb.1:
12551277
; X64-NEXT: callq bar
1256-
; X64-NEXT: .LBB52_2:
1278+
; X64-NEXT: .LBB53_2:
12571279
; X64-NEXT: movl %ebx, %eax
12581280
; X64-NEXT: popq %rbx
12591281
; X64-NEXT: .cfi_def_cfa_offset 8
@@ -1287,10 +1309,10 @@ define i64 @blsr64_branch(i64 %x) {
12871309
; X86-NEXT: andl %ecx, %edi
12881310
; X86-NEXT: movl %esi, %eax
12891311
; X86-NEXT: orl %edi, %eax
1290-
; X86-NEXT: jne .LBB53_2
1312+
; X86-NEXT: jne .LBB54_2
12911313
; X86-NEXT: # %bb.1:
12921314
; X86-NEXT: calll bar
1293-
; X86-NEXT: .LBB53_2:
1315+
; X86-NEXT: .LBB54_2:
12941316
; X86-NEXT: movl %esi, %eax
12951317
; X86-NEXT: movl %edi, %edx
12961318
; X86-NEXT: popl %esi
@@ -1305,10 +1327,10 @@ define i64 @blsr64_branch(i64 %x) {
13051327
; X64-NEXT: .cfi_def_cfa_offset 16
13061328
; X64-NEXT: .cfi_offset %rbx, -16
13071329
; X64-NEXT: blsrq %rdi, %rbx
1308-
; X64-NEXT: jne .LBB53_2
1330+
; X64-NEXT: jne .LBB54_2
13091331
; X64-NEXT: # %bb.1:
13101332
; X64-NEXT: callq bar
1311-
; X64-NEXT: .LBB53_2:
1333+
; X64-NEXT: .LBB54_2:
13121334
; X64-NEXT: movq %rbx, %rax
13131335
; X64-NEXT: popq %rbx
13141336
; X64-NEXT: .cfi_def_cfa_offset 8
@@ -1330,10 +1352,10 @@ define i32 @blsi32_branch(i32 %x) {
13301352
; X86-NEXT: .cfi_def_cfa_offset 8
13311353
; X86-NEXT: .cfi_offset %esi, -8
13321354
; X86-NEXT: blsil {{[0-9]+}}(%esp), %esi
1333-
; X86-NEXT: jne .LBB54_2
1355+
; X86-NEXT: jne .LBB55_2
13341356
; X86-NEXT: # %bb.1:
13351357
; X86-NEXT: calll bar
1336-
; X86-NEXT: .LBB54_2:
1358+
; X86-NEXT: .LBB55_2:
13371359
; X86-NEXT: movl %esi, %eax
13381360
; X86-NEXT: popl %esi
13391361
; X86-NEXT: .cfi_def_cfa_offset 4
@@ -1345,10 +1367,10 @@ define i32 @blsi32_branch(i32 %x) {
13451367
; X64-NEXT: .cfi_def_cfa_offset 16
13461368
; X64-NEXT: .cfi_offset %rbx, -16
13471369
; X64-NEXT: blsil %edi, %ebx
1348-
; X64-NEXT: jne .LBB54_2
1370+
; X64-NEXT: jne .LBB55_2
13491371
; X64-NEXT: # %bb.1:
13501372
; X64-NEXT: callq bar
1351-
; X64-NEXT: .LBB54_2:
1373+
; X64-NEXT: .LBB55_2:
13521374
; X64-NEXT: movl %ebx, %eax
13531375
; X64-NEXT: popq %rbx
13541376
; X64-NEXT: .cfi_def_cfa_offset 8
@@ -1382,10 +1404,10 @@ define i64 @blsi64_branch(i64 %x) {
13821404
; X86-NEXT: andl %eax, %edi
13831405
; X86-NEXT: movl %edi, %eax
13841406
; X86-NEXT: orl %esi, %eax
1385-
; X86-NEXT: jne .LBB55_2
1407+
; X86-NEXT: jne .LBB56_2
13861408
; X86-NEXT: # %bb.1:
13871409
; X86-NEXT: calll bar
1388-
; X86-NEXT: .LBB55_2:
1410+
; X86-NEXT: .LBB56_2:
13891411
; X86-NEXT: movl %edi, %eax
13901412
; X86-NEXT: movl %esi, %edx
13911413
; X86-NEXT: popl %esi
@@ -1400,10 +1422,10 @@ define i64 @blsi64_branch(i64 %x) {
14001422
; X64-NEXT: .cfi_def_cfa_offset 16
14011423
; X64-NEXT: .cfi_offset %rbx, -16
14021424
; X64-NEXT: blsiq %rdi, %rbx
1403-
; X64-NEXT: jne .LBB55_2
1425+
; X64-NEXT: jne .LBB56_2
14041426
; X64-NEXT: # %bb.1:
14051427
; X64-NEXT: callq bar
1406-
; X64-NEXT: .LBB55_2:
1428+
; X64-NEXT: .LBB56_2:
14071429
; X64-NEXT: movq %rbx, %rax
14081430
; X64-NEXT: popq %rbx
14091431
; X64-NEXT: .cfi_def_cfa_offset 8
@@ -1424,19 +1446,19 @@ define void @pr42118_i32(i32 %x) {
14241446
; X86-LABEL: pr42118_i32:
14251447
; X86: # %bb.0:
14261448
; X86-NEXT: blsrl {{[0-9]+}}(%esp), %eax
1427-
; X86-NEXT: jne .LBB56_1
1449+
; X86-NEXT: jne .LBB57_1
14281450
; X86-NEXT: # %bb.2:
14291451
; X86-NEXT: jmp bar # TAILCALL
1430-
; X86-NEXT: .LBB56_1:
1452+
; X86-NEXT: .LBB57_1:
14311453
; X86-NEXT: retl
14321454
;
14331455
; X64-LABEL: pr42118_i32:
14341456
; X64: # %bb.0:
14351457
; X64-NEXT: blsrl %edi, %eax
1436-
; X64-NEXT: jne .LBB56_1
1458+
; X64-NEXT: jne .LBB57_1
14371459
; X64-NEXT: # %bb.2:
14381460
; X64-NEXT: jmp bar # TAILCALL
1439-
; X64-NEXT: .LBB56_1:
1461+
; X64-NEXT: .LBB57_1:
14401462
; X64-NEXT: retq
14411463
%tmp = sub i32 0, %x
14421464
%tmp1 = and i32 %tmp, %x
@@ -1464,12 +1486,12 @@ define void @pr42118_i64(i64 %x) {
14641486
; X86-NEXT: andl %eax, %edx
14651487
; X86-NEXT: andl %ecx, %esi
14661488
; X86-NEXT: orl %edx, %esi
1467-
; X86-NEXT: jne .LBB57_1
1489+
; X86-NEXT: jne .LBB58_1
14681490
; X86-NEXT: # %bb.2:
14691491
; X86-NEXT: popl %esi
14701492
; X86-NEXT: .cfi_def_cfa_offset 4
14711493
; X86-NEXT: jmp bar # TAILCALL
1472-
; X86-NEXT: .LBB57_1:
1494+
; X86-NEXT: .LBB58_1:
14731495
; X86-NEXT: .cfi_def_cfa_offset 8
14741496
; X86-NEXT: popl %esi
14751497
; X86-NEXT: .cfi_def_cfa_offset 4
@@ -1478,10 +1500,10 @@ define void @pr42118_i64(i64 %x) {
14781500
; X64-LABEL: pr42118_i64:
14791501
; X64: # %bb.0:
14801502
; X64-NEXT: blsrq %rdi, %rax
1481-
; X64-NEXT: jne .LBB57_1
1503+
; X64-NEXT: jne .LBB58_1
14821504
; X64-NEXT: # %bb.2:
14831505
; X64-NEXT: jmp bar # TAILCALL
1484-
; X64-NEXT: .LBB57_1:
1506+
; X64-NEXT: .LBB58_1:
14851507
; X64-NEXT: retq
14861508
%tmp = sub i64 0, %x
14871509
%tmp1 = and i64 %tmp, %x
@@ -1499,11 +1521,11 @@ define i32 @blsi_cflag_32(i32 %x, i32 %y) nounwind {
14991521
; X86: # %bb.0:
15001522
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
15011523
; X86-NEXT: testl %eax, %eax
1502-
; X86-NEXT: jne .LBB58_1
1524+
; X86-NEXT: jne .LBB59_1
15031525
; X86-NEXT: # %bb.2:
15041526
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
15051527
; X86-NEXT: retl
1506-
; X86-NEXT: .LBB58_1:
1528+
; X86-NEXT: .LBB59_1:
15071529
; X86-NEXT: blsil %eax, %eax
15081530
; X86-NEXT: retl
15091531
;
@@ -1532,15 +1554,15 @@ define i64 @blsi_cflag_64(i64 %x, i64 %y) nounwind {
15321554
; X86-NEXT: sbbl %esi, %edx
15331555
; X86-NEXT: movl %ecx, %edi
15341556
; X86-NEXT: orl %esi, %edi
1535-
; X86-NEXT: jne .LBB59_1
1557+
; X86-NEXT: jne .LBB60_1
15361558
; X86-NEXT: # %bb.2:
15371559
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
15381560
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
1539-
; X86-NEXT: jmp .LBB59_3
1540-
; X86-NEXT: .LBB59_1:
1561+
; X86-NEXT: jmp .LBB60_3
1562+
; X86-NEXT: .LBB60_1:
15411563
; X86-NEXT: andl %esi, %edx
15421564
; X86-NEXT: andl %ecx, %eax
1543-
; X86-NEXT: .LBB59_3:
1565+
; X86-NEXT: .LBB60_3:
15441566
; X86-NEXT: popl %esi
15451567
; X86-NEXT: popl %edi
15461568
; X86-NEXT: retl

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