Replace copy with a reference

MalaySanghi · MalaySanghi · commit 5f182538e601 · 2024-02-22T07:54:10.000-08:00
These are relatively larger structures and we don't update them so ref
should be fine
diff --git a/llvm/lib/CodeGen/MachinePipeliner.cpp b/llvm/lib/CodeGen/MachinePipeliner.cpp
@@ -1335,7 +1335,7 @@ class HighRegisterPressureDetector {
         Register Reg = getLoopPhiReg(*MI, OrigMBB);
         UpdateTargetRegs(Reg);
       } else {
-        for (auto Use : ROMap.find(MI)->getSecond().Uses)
+        for (auto &Use : ROMap.find(MI)->getSecond().Uses)
           UpdateTargetRegs(Use.RegUnit);
       }
     }
@@ -1439,7 +1439,7 @@ class HighRegisterPressureDetector {
 
         const unsigned Iter = I - Stage;
 
-        for (auto Def : ROMap.find(MI)->getSecond().Defs)
+        for (auto &Def : ROMap.find(MI)->getSecond().Defs)
           InsertReg(LiveRegSets[Iter], Def.RegUnit);
 
         for (auto LastUse : LastUses[MI]) {

Original file line number	Diff line number	Diff line change
`@@ -1335,7 +1335,7 @@ class HighRegisterPressureDetector {`
`1335`	`1335`	`Register Reg = getLoopPhiReg(*MI, OrigMBB);`
`1336`	`1336`	`UpdateTargetRegs(Reg);`
`1337`	`1337`	`} else {`
`1338`		`- for (auto Use : ROMap.find(MI)->getSecond().Uses)`
	`1338`	`+ for (auto &Use : ROMap.find(MI)->getSecond().Uses)`
`1339`	`1339`	`UpdateTargetRegs(Use.RegUnit);`
`1340`	`1340`	`}`
`1341`	`1341`	`}`
`@@ -1439,7 +1439,7 @@ class HighRegisterPressureDetector {`
`1439`	`1439`
`1440`	`1440`	`const unsigned Iter = I - Stage;`
`1441`	`1441`
`1442`		`- for (auto Def : ROMap.find(MI)->getSecond().Defs)`
	`1442`	`+ for (auto &Def : ROMap.find(MI)->getSecond().Defs)`
`1443`	`1443`	`InsertReg(LiveRegSets[Iter], Def.RegUnit);`
`1444`	`1444`
`1445`	`1445`	`for (auto LastUse : LastUses[MI]) {`