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[MIRParser] Report register class errors in a deterministic order (#142928)
1 parent 44a047c commit 5f33b9d

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2 files changed

+22
-13
lines changed

2 files changed

+22
-13
lines changed

llvm/lib/CodeGen/MIRParser/MIRParser.cpp

Lines changed: 19 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -763,22 +763,25 @@ bool MIRParserImpl::setupRegisterInfo(const PerFunctionMIParsingState &PFS,
763763
MachineRegisterInfo &MRI = MF.getRegInfo();
764764
const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
765765

766-
bool Error = false;
766+
SmallVector<std::string> Errors;
767+
767768
// Create VRegs
768769
auto populateVRegInfo = [&](const VRegInfo &Info, const Twine &Name) {
769770
Register Reg = Info.VReg;
770771
switch (Info.Kind) {
771772
case VRegInfo::UNKNOWN:
772-
error(Twine("Cannot determine class/bank of virtual register ") +
773-
Name + " in function '" + MF.getName() + "'");
774-
Error = true;
773+
Errors.push_back(
774+
(Twine("Cannot determine class/bank of virtual register ") + Name +
775+
" in function '" + MF.getName() + "'")
776+
.str());
775777
break;
776778
case VRegInfo::NORMAL:
777779
if (!Info.D.RC->isAllocatable()) {
778-
error(Twine("Cannot use non-allocatable class '") +
779-
TRI->getRegClassName(Info.D.RC) + "' for virtual register " +
780-
Name + " in function '" + MF.getName() + "'");
781-
Error = true;
780+
Errors.push_back((Twine("Cannot use non-allocatable class '") +
781+
TRI->getRegClassName(Info.D.RC) +
782+
"' for virtual register " + Name + " in function '" +
783+
MF.getName() + "'")
784+
.str());
782785
break;
783786
}
784787

@@ -820,7 +823,14 @@ bool MIRParserImpl::setupRegisterInfo(const PerFunctionMIParsingState &PFS,
820823
}
821824
}
822825

823-
return Error;
826+
if (Errors.empty())
827+
return false;
828+
829+
// Report errors in a deterministic order.
830+
sort(Errors);
831+
for (auto &E : Errors)
832+
error(E);
833+
return true;
824834
}
825835

826836
bool MIRParserImpl::initializeFrameInfo(PerFunctionMIParsingState &PFS,

llvm/test/CodeGen/MIR/AMDGPU/virtreg-uses-unallocatable-class.mir

Lines changed: 3 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1,14 +1,13 @@
1-
# UNSUPPORTED: reverse_iteration
21
# RUN: not llc -mtriple=amdgcn-- -mcpu=gfx900 -run-pass=none -o - %s 2>&1 | FileCheck %s
32

43
# Check a diagnostic is emitted if non-allocatable classes are used
54
# with virtual registers, and there's no assert.
65

7-
# CHECK: error: {{.*}}: Cannot use non-allocatable class 'TTMP_32' for virtual register named_use in function 'virtreg_unallocatable'
8-
# CHECK: error: {{.*}}: Cannot use non-allocatable class 'TTMP_32' for virtual register named_def in function 'virtreg_unallocatable'
96
# CHECK: error: {{.*}}: Cannot use non-allocatable class 'TTMP_32' for virtual register 0 in function 'virtreg_unallocatable'
10-
# CHECK: error: {{.*}}: Cannot use non-allocatable class 'TTMP_32' for virtual register 2 in function 'virtreg_unallocatable'
117
# CHECK: error: {{.*}}: Cannot use non-allocatable class 'TTMP_32' for virtual register 1 in function 'virtreg_unallocatable'
8+
# CHECK: error: {{.*}}: Cannot use non-allocatable class 'TTMP_32' for virtual register 2 in function 'virtreg_unallocatable'
9+
# CHECK: error: {{.*}}: Cannot use non-allocatable class 'TTMP_32' for virtual register named_def in function 'virtreg_unallocatable'
10+
# CHECK: error: {{.*}}: Cannot use non-allocatable class 'TTMP_32' for virtual register named_use in function 'virtreg_unallocatable'
1211

1312
---
1413
name: virtreg_unallocatable

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