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[X86] Rename Zn3FPP# ports -> Zn3FP#. NFC
Matches Zn4FP# (which is mostly a copy) and avoids an issue in llvm-exegesis which is terrible at choosing the right portname when they have aliases.
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‎llvm/lib/Target/X86/X86ScheduleZnver3.td

Lines changed: 43 additions & 43 deletions
Original file line numberDiff line numberDiff line change
@@ -52,7 +52,7 @@ def Znver3Model : SchedMachineModel {
5252
int VecLoadLatency = 7;
5353
// Latency of a simple store operation.
5454
int StoreLatency = 1;
55-
// FIXME
55+
// FIXME:
5656
let HighLatency = 25; // FIXME: any better choice?
5757
// AMD SOG 19h, 2.8 Optimizing Branching
5858
// The branch misprediction penalty is in the range from 11 to 18 cycles,
@@ -193,83 +193,83 @@ def Zn3Int : ProcResGroup<[Zn3ALU0, Zn3AGU0, Zn3BRU0, // scheduler 0
193193
// <...>, and six FPU pipes.
194194
// Agner, 22.10 Floating point execution pipes
195195
// There are six floating point/vector execution pipes,
196-
def Zn3FPP0 : ProcResource<1>;
197-
def Zn3FPP1 : ProcResource<1>;
198-
def Zn3FPP2 : ProcResource<1>;
199-
def Zn3FPP3 : ProcResource<1>;
200-
def Zn3FPP45 : ProcResource<2>;
196+
def Zn3FP0 : ProcResource<1>;
197+
def Zn3FP1 : ProcResource<1>;
198+
def Zn3FP2 : ProcResource<1>;
199+
def Zn3FP3 : ProcResource<1>;
200+
def Zn3FP45 : ProcResource<2>;
201201

202202
//
203203
// Execution Units
204204
//===----------------------------------------------------------------------===//
205205
// AMD SOG 19h, 2.11.1 Floating Point Execution Resources
206206

207207
// (v)FMUL*, (v)FMA*, Floating Point Compares, Blendv(DQ)
208-
defvar Zn3FPFMul0 = Zn3FPP0;
209-
defvar Zn3FPFMul1 = Zn3FPP1;
208+
defvar Zn3FPFMul0 = Zn3FP0;
209+
defvar Zn3FPFMul1 = Zn3FP1;
210210

211211
// (v)FADD*
212-
defvar Zn3FPFAdd0 = Zn3FPP2;
213-
defvar Zn3FPFAdd1 = Zn3FPP3;
212+
defvar Zn3FPFAdd0 = Zn3FP2;
213+
defvar Zn3FPFAdd1 = Zn3FP3;
214214

215215
// All convert operations except pack/unpack
216-
defvar Zn3FPFCvt0 = Zn3FPP2;
217-
defvar Zn3FPFCvt1 = Zn3FPP3;
216+
defvar Zn3FPFCvt0 = Zn3FP2;
217+
defvar Zn3FPFCvt1 = Zn3FP3;
218218

219219
// All Divide and Square Root except Reciprocal Approximation
220220
// AMD SOG 19h, 2.11.1 Floating Point Execution Resources
221221
// FDIV unit can support 2 simultaneous operations in flight
222222
// even though it occupies a single pipe.
223223
// FIXME: BufferSize=2 ?
224-
defvar Zn3FPFDiv = Zn3FPP1;
224+
defvar Zn3FPFDiv = Zn3FP1;
225225

226226
// Moves and Logical operations on Floating Point Data Types
227-
defvar Zn3FPFMisc0 = Zn3FPP0;
228-
defvar Zn3FPFMisc1 = Zn3FPP1;
229-
defvar Zn3FPFMisc2 = Zn3FPP2;
230-
defvar Zn3FPFMisc3 = Zn3FPP3;
227+
defvar Zn3FPFMisc0 = Zn3FP0;
228+
defvar Zn3FPFMisc1 = Zn3FP1;
229+
defvar Zn3FPFMisc2 = Zn3FP2;
230+
defvar Zn3FPFMisc3 = Zn3FP3;
231231

232232
// Integer Adds, Subtracts, and Compares
233233
// Some complex VADD operations are not available in all pipes.
234-
defvar Zn3FPVAdd0 = Zn3FPP0;
235-
defvar Zn3FPVAdd1 = Zn3FPP1;
236-
defvar Zn3FPVAdd2 = Zn3FPP2;
237-
defvar Zn3FPVAdd3 = Zn3FPP3;
234+
defvar Zn3FPVAdd0 = Zn3FP0;
235+
defvar Zn3FPVAdd1 = Zn3FP1;
236+
defvar Zn3FPVAdd2 = Zn3FP2;
237+
defvar Zn3FPVAdd3 = Zn3FP3;
238238

239239
// Integer Multiplies, SAD, Blendvb
240-
defvar Zn3FPVMul0 = Zn3FPP0;
241-
defvar Zn3FPVMul1 = Zn3FPP3;
240+
defvar Zn3FPVMul0 = Zn3FP0;
241+
defvar Zn3FPVMul1 = Zn3FP3;
242242

243243
// Data Shuffles, Packs, Unpacks, Permute
244244
// Some complex shuffle operations are only available in pipe1.
245-
defvar Zn3FPVShuf = Zn3FPP1;
246-
defvar Zn3FPVShufAux = Zn3FPP2;
245+
defvar Zn3FPVShuf = Zn3FP1;
246+
defvar Zn3FPVShufAux = Zn3FP2;
247247

248248
// Bit Shift Left/Right operations
249-
defvar Zn3FPVShift0 = Zn3FPP1;
250-
defvar Zn3FPVShift1 = Zn3FPP2;
249+
defvar Zn3FPVShift0 = Zn3FP1;
250+
defvar Zn3FPVShift1 = Zn3FP2;
251251

252252
// Moves and Logical operations on Packed Integer Data Types
253-
defvar Zn3FPVMisc0 = Zn3FPP0;
254-
defvar Zn3FPVMisc1 = Zn3FPP1;
255-
defvar Zn3FPVMisc2 = Zn3FPP2;
256-
defvar Zn3FPVMisc3 = Zn3FPP3;
253+
defvar Zn3FPVMisc0 = Zn3FP0;
254+
defvar Zn3FPVMisc1 = Zn3FP1;
255+
defvar Zn3FPVMisc2 = Zn3FP2;
256+
defvar Zn3FPVMisc3 = Zn3FP3;
257257

258258
// *AES*
259-
defvar Zn3FPAES0 = Zn3FPP0;
260-
defvar Zn3FPAES1 = Zn3FPP1;
259+
defvar Zn3FPAES0 = Zn3FP0;
260+
defvar Zn3FPAES1 = Zn3FP1;
261261

262262
// *CLM*
263-
defvar Zn3FPCLM0 = Zn3FPP0;
264-
defvar Zn3FPCLM1 = Zn3FPP1;
263+
defvar Zn3FPCLM0 = Zn3FP0;
264+
defvar Zn3FPCLM1 = Zn3FP1;
265265

266266
// Execution pipeline grouping
267267
//===----------------------------------------------------------------------===//
268268

269269
// AMD SOG 19h, 2.11 Floating-Point Unit
270270
// Stores and floating point to general purpose register transfer
271271
// have 2 dedicated pipelines (pipe 5 and 6).
272-
def Zn3FPU0123 : ProcResGroup<[Zn3FPP0, Zn3FPP1, Zn3FPP2, Zn3FPP3]>;
272+
def Zn3FPU0123 : ProcResGroup<[Zn3FP0, Zn3FP1, Zn3FP2, Zn3FP3]>;
273273

274274
// (v)FMUL*, (v)FMA*, Floating Point Compares, Blendv(DQ)
275275
def Zn3FPFMul01 : ProcResGroup<[Zn3FPFMul0, Zn3FPFMul1]>;
@@ -293,12 +293,12 @@ def Zn3FPFMisc12 : ProcResGroup<[Zn3FPFMisc1, Zn3FPFMisc2]>;
293293
// AMD SOG 19h, 2.11 Floating-Point Unit
294294
// Stores and floating point to general purpose register transfer
295295
// have 2 dedicated pipelines (pipe 5 and 6).
296-
defvar Zn3FPLd01 = Zn3FPP45;
296+
defvar Zn3FPLd01 = Zn3FP45;
297297

298298
// AMD SOG 19h, 2.11 Floating-Point Unit
299299
// Note that FP stores are supported on two pipelines,
300300
// but throughput is limited to one per cycle.
301-
let Super = Zn3FPP45 in
301+
let Super = Zn3FP45 in
302302
def Zn3FPSt : ProcResource<1>;
303303

304304
// Integer Adds, Subtracts, and Compares
@@ -345,8 +345,8 @@ def Zn3FpPRF : RegisterFile<160, [VR64, VR128, VR256], [1, 1, 1], [0, 1, 1],
345345
// AMD SOG 19h, 2.11 Floating-Point Unit
346346
// <...> the scheduler can issue 1 micro op per cycle for each pipe.
347347
// FIXME: those are two separate schedulers, not a single big one.
348-
def Zn3FP : ProcResGroup<[Zn3FPP0, Zn3FPP2, /*Zn3FPP4,*/ // scheduler 0
349-
Zn3FPP1, Zn3FPP3, Zn3FPP45 /*Zn3FPP5*/ // scheduler 1
348+
def Zn3FP : ProcResGroup<[Zn3FP0, Zn3FP2, /*Zn3FP4,*/ // scheduler 0
349+
Zn3FP1, Zn3FP3, Zn3FP45 /*Zn3FP5*/ // scheduler 1
350350
]> {
351351
let BufferSize = !mul(2, 32);
352352
}
@@ -838,9 +838,9 @@ defm : Zn3WriteResInt<WriteZero, [Zn3ALU0123], 0, [0], 1>;
838838
defm : Zn3WriteResIntPair<WriteJump, [Zn3BRU01], 1, [1], 1>; // FIXME: not from llvm-exegesis
839839

840840
// Floating point. This covers both scalar and vector operations.
841-
defm : Zn3WriteResInt<WriteFLD0, [Zn3FPLd01, Zn3Load, Zn3FPP1], !add(Znver3Model.LoadLatency, 4), [1, 1, 1], 1>;
842-
defm : Zn3WriteResInt<WriteFLD1, [Zn3FPLd01, Zn3Load, Zn3FPP1], !add(Znver3Model.LoadLatency, 7), [1, 1, 1], 1>;
843-
defm : Zn3WriteResInt<WriteFLDC, [Zn3FPLd01, Zn3Load, Zn3FPP1], !add(Znver3Model.LoadLatency, 7), [1, 1, 1], 1>;
841+
defm : Zn3WriteResInt<WriteFLD0, [Zn3FPLd01, Zn3Load, Zn3FP1], !add(Znver3Model.LoadLatency, 4), [1, 1, 1], 1>;
842+
defm : Zn3WriteResInt<WriteFLD1, [Zn3FPLd01, Zn3Load, Zn3FP1], !add(Znver3Model.LoadLatency, 7), [1, 1, 1], 1>;
843+
defm : Zn3WriteResInt<WriteFLDC, [Zn3FPLd01, Zn3Load, Zn3FP1], !add(Znver3Model.LoadLatency, 7), [1, 1, 1], 1>;
844844
defm : Zn3WriteResXMM<WriteFLoad, [Zn3FPLd01, Zn3Load], !add(Znver3Model.VecLoadLatency, 1), [1, 1], 1>;
845845
defm : Zn3WriteResXMM<WriteFLoadX, [Zn3FPLd01, Zn3Load], !add(Znver3Model.VecLoadLatency, 1), [1, 1], 1>;
846846
defm : Zn3WriteResYMM<WriteFLoadY, [Zn3FPLd01, Zn3Load], !add(Znver3Model.VecLoadLatency, 1), [1, 1], 1>;

‎llvm/test/tools/llvm-mca/X86/Znver3/dependency-breaking-gpr.s

Lines changed: 36 additions & 36 deletions
Original file line numberDiff line numberDiff line change
@@ -68,12 +68,12 @@ cmovael %eax, %ecx
6868
# CHECK-NEXT: [5] - Zn3ALU2
6969
# CHECK-NEXT: [6] - Zn3ALU3
7070
# CHECK-NEXT: [7] - Zn3BRU1
71-
# CHECK-NEXT: [8] - Zn3FPP0
72-
# CHECK-NEXT: [9] - Zn3FPP1
73-
# CHECK-NEXT: [10] - Zn3FPP2
74-
# CHECK-NEXT: [11] - Zn3FPP3
75-
# CHECK-NEXT: [12.0] - Zn3FPP45
76-
# CHECK-NEXT: [12.1] - Zn3FPP45
71+
# CHECK-NEXT: [8] - Zn3FP0
72+
# CHECK-NEXT: [9] - Zn3FP1
73+
# CHECK-NEXT: [10] - Zn3FP2
74+
# CHECK-NEXT: [11] - Zn3FP3
75+
# CHECK-NEXT: [12.0] - Zn3FP45
76+
# CHECK-NEXT: [12.1] - Zn3FP45
7777
# CHECK-NEXT: [13] - Zn3FPSt
7878
# CHECK-NEXT: [14.0] - Zn3LSU
7979
# CHECK-NEXT: [14.1] - Zn3LSU
@@ -145,12 +145,12 @@ cmovael %eax, %ecx
145145
# CHECK-NEXT: [5] - Zn3ALU2
146146
# CHECK-NEXT: [6] - Zn3ALU3
147147
# CHECK-NEXT: [7] - Zn3BRU1
148-
# CHECK-NEXT: [8] - Zn3FPP0
149-
# CHECK-NEXT: [9] - Zn3FPP1
150-
# CHECK-NEXT: [10] - Zn3FPP2
151-
# CHECK-NEXT: [11] - Zn3FPP3
152-
# CHECK-NEXT: [12.0] - Zn3FPP45
153-
# CHECK-NEXT: [12.1] - Zn3FPP45
148+
# CHECK-NEXT: [8] - Zn3FP0
149+
# CHECK-NEXT: [9] - Zn3FP1
150+
# CHECK-NEXT: [10] - Zn3FP2
151+
# CHECK-NEXT: [11] - Zn3FP3
152+
# CHECK-NEXT: [12.0] - Zn3FP45
153+
# CHECK-NEXT: [12.1] - Zn3FP45
154154
# CHECK-NEXT: [13] - Zn3FPSt
155155
# CHECK-NEXT: [14.0] - Zn3LSU
156156
# CHECK-NEXT: [14.1] - Zn3LSU
@@ -223,12 +223,12 @@ cmovael %eax, %ecx
223223
# CHECK-NEXT: [5] - Zn3ALU2
224224
# CHECK-NEXT: [6] - Zn3ALU3
225225
# CHECK-NEXT: [7] - Zn3BRU1
226-
# CHECK-NEXT: [8] - Zn3FPP0
227-
# CHECK-NEXT: [9] - Zn3FPP1
228-
# CHECK-NEXT: [10] - Zn3FPP2
229-
# CHECK-NEXT: [11] - Zn3FPP3
230-
# CHECK-NEXT: [12.0] - Zn3FPP45
231-
# CHECK-NEXT: [12.1] - Zn3FPP45
226+
# CHECK-NEXT: [8] - Zn3FP0
227+
# CHECK-NEXT: [9] - Zn3FP1
228+
# CHECK-NEXT: [10] - Zn3FP2
229+
# CHECK-NEXT: [11] - Zn3FP3
230+
# CHECK-NEXT: [12.0] - Zn3FP45
231+
# CHECK-NEXT: [12.1] - Zn3FP45
232232
# CHECK-NEXT: [13] - Zn3FPSt
233233
# CHECK-NEXT: [14.0] - Zn3LSU
234234
# CHECK-NEXT: [14.1] - Zn3LSU
@@ -306,12 +306,12 @@ cmovael %eax, %ecx
306306
# CHECK-NEXT: [5] - Zn3ALU2
307307
# CHECK-NEXT: [6] - Zn3ALU3
308308
# CHECK-NEXT: [7] - Zn3BRU1
309-
# CHECK-NEXT: [8] - Zn3FPP0
310-
# CHECK-NEXT: [9] - Zn3FPP1
311-
# CHECK-NEXT: [10] - Zn3FPP2
312-
# CHECK-NEXT: [11] - Zn3FPP3
313-
# CHECK-NEXT: [12.0] - Zn3FPP45
314-
# CHECK-NEXT: [12.1] - Zn3FPP45
309+
# CHECK-NEXT: [8] - Zn3FP0
310+
# CHECK-NEXT: [9] - Zn3FP1
311+
# CHECK-NEXT: [10] - Zn3FP2
312+
# CHECK-NEXT: [11] - Zn3FP3
313+
# CHECK-NEXT: [12.0] - Zn3FP45
314+
# CHECK-NEXT: [12.1] - Zn3FP45
315315
# CHECK-NEXT: [13] - Zn3FPSt
316316
# CHECK-NEXT: [14.0] - Zn3LSU
317317
# CHECK-NEXT: [14.1] - Zn3LSU
@@ -389,12 +389,12 @@ cmovael %eax, %ecx
389389
# CHECK-NEXT: [5] - Zn3ALU2
390390
# CHECK-NEXT: [6] - Zn3ALU3
391391
# CHECK-NEXT: [7] - Zn3BRU1
392-
# CHECK-NEXT: [8] - Zn3FPP0
393-
# CHECK-NEXT: [9] - Zn3FPP1
394-
# CHECK-NEXT: [10] - Zn3FPP2
395-
# CHECK-NEXT: [11] - Zn3FPP3
396-
# CHECK-NEXT: [12.0] - Zn3FPP45
397-
# CHECK-NEXT: [12.1] - Zn3FPP45
392+
# CHECK-NEXT: [8] - Zn3FP0
393+
# CHECK-NEXT: [9] - Zn3FP1
394+
# CHECK-NEXT: [10] - Zn3FP2
395+
# CHECK-NEXT: [11] - Zn3FP3
396+
# CHECK-NEXT: [12.0] - Zn3FP45
397+
# CHECK-NEXT: [12.1] - Zn3FP45
398398
# CHECK-NEXT: [13] - Zn3FPSt
399399
# CHECK-NEXT: [14.0] - Zn3LSU
400400
# CHECK-NEXT: [14.1] - Zn3LSU
@@ -472,12 +472,12 @@ cmovael %eax, %ecx
472472
# CHECK-NEXT: [5] - Zn3ALU2
473473
# CHECK-NEXT: [6] - Zn3ALU3
474474
# CHECK-NEXT: [7] - Zn3BRU1
475-
# CHECK-NEXT: [8] - Zn3FPP0
476-
# CHECK-NEXT: [9] - Zn3FPP1
477-
# CHECK-NEXT: [10] - Zn3FPP2
478-
# CHECK-NEXT: [11] - Zn3FPP3
479-
# CHECK-NEXT: [12.0] - Zn3FPP45
480-
# CHECK-NEXT: [12.1] - Zn3FPP45
475+
# CHECK-NEXT: [8] - Zn3FP0
476+
# CHECK-NEXT: [9] - Zn3FP1
477+
# CHECK-NEXT: [10] - Zn3FP2
478+
# CHECK-NEXT: [11] - Zn3FP3
479+
# CHECK-NEXT: [12.0] - Zn3FP45
480+
# CHECK-NEXT: [12.1] - Zn3FP45
481481
# CHECK-NEXT: [13] - Zn3FPSt
482482
# CHECK-NEXT: [14.0] - Zn3LSU
483483
# CHECK-NEXT: [14.1] - Zn3LSU

‎llvm/test/tools/llvm-mca/X86/Znver3/mulx-hi-read-advance.s

Lines changed: 12 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -46,12 +46,12 @@ add %rax, %rax
4646
# CHECK-NEXT: [5] - Zn3ALU2
4747
# CHECK-NEXT: [6] - Zn3ALU3
4848
# CHECK-NEXT: [7] - Zn3BRU1
49-
# CHECK-NEXT: [8] - Zn3FPP0
50-
# CHECK-NEXT: [9] - Zn3FPP1
51-
# CHECK-NEXT: [10] - Zn3FPP2
52-
# CHECK-NEXT: [11] - Zn3FPP3
53-
# CHECK-NEXT: [12.0] - Zn3FPP45
54-
# CHECK-NEXT: [12.1] - Zn3FPP45
49+
# CHECK-NEXT: [8] - Zn3FP0
50+
# CHECK-NEXT: [9] - Zn3FP1
51+
# CHECK-NEXT: [10] - Zn3FP2
52+
# CHECK-NEXT: [11] - Zn3FP3
53+
# CHECK-NEXT: [12.0] - Zn3FP45
54+
# CHECK-NEXT: [12.1] - Zn3FP45
5555
# CHECK-NEXT: [13] - Zn3FPSt
5656
# CHECK-NEXT: [14.0] - Zn3LSU
5757
# CHECK-NEXT: [14.1] - Zn3LSU
@@ -122,12 +122,12 @@ add %rax, %rax
122122
# CHECK-NEXT: [5] - Zn3ALU2
123123
# CHECK-NEXT: [6] - Zn3ALU3
124124
# CHECK-NEXT: [7] - Zn3BRU1
125-
# CHECK-NEXT: [8] - Zn3FPP0
126-
# CHECK-NEXT: [9] - Zn3FPP1
127-
# CHECK-NEXT: [10] - Zn3FPP2
128-
# CHECK-NEXT: [11] - Zn3FPP3
129-
# CHECK-NEXT: [12.0] - Zn3FPP45
130-
# CHECK-NEXT: [12.1] - Zn3FPP45
125+
# CHECK-NEXT: [8] - Zn3FP0
126+
# CHECK-NEXT: [9] - Zn3FP1
127+
# CHECK-NEXT: [10] - Zn3FP2
128+
# CHECK-NEXT: [11] - Zn3FP3
129+
# CHECK-NEXT: [12.0] - Zn3FP45
130+
# CHECK-NEXT: [12.1] - Zn3FP45
131131
# CHECK-NEXT: [13] - Zn3FPSt
132132
# CHECK-NEXT: [14.0] - Zn3LSU
133133
# CHECK-NEXT: [14.1] - Zn3LSU

‎llvm/test/tools/llvm-mca/X86/Znver3/mulx-lo-reg-use.s

Lines changed: 12 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -41,12 +41,12 @@ mulxq %rax, %rax, %rcx
4141
# CHECK-NEXT: [5] - Zn3ALU2
4242
# CHECK-NEXT: [6] - Zn3ALU3
4343
# CHECK-NEXT: [7] - Zn3BRU1
44-
# CHECK-NEXT: [8] - Zn3FPP0
45-
# CHECK-NEXT: [9] - Zn3FPP1
46-
# CHECK-NEXT: [10] - Zn3FPP2
47-
# CHECK-NEXT: [11] - Zn3FPP3
48-
# CHECK-NEXT: [12.0] - Zn3FPP45
49-
# CHECK-NEXT: [12.1] - Zn3FPP45
44+
# CHECK-NEXT: [8] - Zn3FP0
45+
# CHECK-NEXT: [9] - Zn3FP1
46+
# CHECK-NEXT: [10] - Zn3FP2
47+
# CHECK-NEXT: [11] - Zn3FP3
48+
# CHECK-NEXT: [12.0] - Zn3FP45
49+
# CHECK-NEXT: [12.1] - Zn3FP45
5050
# CHECK-NEXT: [13] - Zn3FPSt
5151
# CHECK-NEXT: [14.0] - Zn3LSU
5252
# CHECK-NEXT: [14.1] - Zn3LSU
@@ -112,12 +112,12 @@ mulxq %rax, %rax, %rcx
112112
# CHECK-NEXT: [5] - Zn3ALU2
113113
# CHECK-NEXT: [6] - Zn3ALU3
114114
# CHECK-NEXT: [7] - Zn3BRU1
115-
# CHECK-NEXT: [8] - Zn3FPP0
116-
# CHECK-NEXT: [9] - Zn3FPP1
117-
# CHECK-NEXT: [10] - Zn3FPP2
118-
# CHECK-NEXT: [11] - Zn3FPP3
119-
# CHECK-NEXT: [12.0] - Zn3FPP45
120-
# CHECK-NEXT: [12.1] - Zn3FPP45
115+
# CHECK-NEXT: [8] - Zn3FP0
116+
# CHECK-NEXT: [9] - Zn3FP1
117+
# CHECK-NEXT: [10] - Zn3FP2
118+
# CHECK-NEXT: [11] - Zn3FP3
119+
# CHECK-NEXT: [12.0] - Zn3FP45
120+
# CHECK-NEXT: [12.1] - Zn3FP45
121121
# CHECK-NEXT: [13] - Zn3FPSt
122122
# CHECK-NEXT: [14.0] - Zn3LSU
123123
# CHECK-NEXT: [14.1] - Zn3LSU

‎llvm/test/tools/llvm-mca/X86/Znver3/mulx-read-advance.s

Lines changed: 12 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -43,12 +43,12 @@ mulxq (%rdi), %rax, %rdx
4343
# CHECK-NEXT: [5] - Zn3ALU2
4444
# CHECK-NEXT: [6] - Zn3ALU3
4545
# CHECK-NEXT: [7] - Zn3BRU1
46-
# CHECK-NEXT: [8] - Zn3FPP0
47-
# CHECK-NEXT: [9] - Zn3FPP1
48-
# CHECK-NEXT: [10] - Zn3FPP2
49-
# CHECK-NEXT: [11] - Zn3FPP3
50-
# CHECK-NEXT: [12.0] - Zn3FPP45
51-
# CHECK-NEXT: [12.1] - Zn3FPP45
46+
# CHECK-NEXT: [8] - Zn3FP0
47+
# CHECK-NEXT: [9] - Zn3FP1
48+
# CHECK-NEXT: [10] - Zn3FP2
49+
# CHECK-NEXT: [11] - Zn3FP3
50+
# CHECK-NEXT: [12.0] - Zn3FP45
51+
# CHECK-NEXT: [12.1] - Zn3FP45
5252
# CHECK-NEXT: [13] - Zn3FPSt
5353
# CHECK-NEXT: [14.0] - Zn3LSU
5454
# CHECK-NEXT: [14.1] - Zn3LSU
@@ -115,12 +115,12 @@ mulxq (%rdi), %rax, %rdx
115115
# CHECK-NEXT: [5] - Zn3ALU2
116116
# CHECK-NEXT: [6] - Zn3ALU3
117117
# CHECK-NEXT: [7] - Zn3BRU1
118-
# CHECK-NEXT: [8] - Zn3FPP0
119-
# CHECK-NEXT: [9] - Zn3FPP1
120-
# CHECK-NEXT: [10] - Zn3FPP2
121-
# CHECK-NEXT: [11] - Zn3FPP3
122-
# CHECK-NEXT: [12.0] - Zn3FPP45
123-
# CHECK-NEXT: [12.1] - Zn3FPP45
118+
# CHECK-NEXT: [8] - Zn3FP0
119+
# CHECK-NEXT: [9] - Zn3FP1
120+
# CHECK-NEXT: [10] - Zn3FP2
121+
# CHECK-NEXT: [11] - Zn3FP3
122+
# CHECK-NEXT: [12.0] - Zn3FP45
123+
# CHECK-NEXT: [12.1] - Zn3FP45
124124
# CHECK-NEXT: [13] - Zn3FPSt
125125
# CHECK-NEXT: [14.0] - Zn3LSU
126126
# CHECK-NEXT: [14.1] - Zn3LSU

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