|
| 1 | +# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 4 |
| 2 | +# RUN: llc -mtriple=amdgcn--amdpal -mcpu=gfx1010 -start-before=rename-independent-subregs -mattr=+wavefrontsize64 -stop-before=amdgpu-mark-last-scratch-load %s -o - | FileCheck -check-prefix=REG_ALLOC %s |
| 3 | +# RUN: llc -mtriple=amdgcn--amdpal -mcpu=gfx1010 -start-before=rename-independent-subregs -mattr=+wavefrontsize64 -stop-after=machine-cp %s -o - | FileCheck -check-prefix=DEAD_INST_DEL %s |
| 4 | + |
| 5 | +--- |
| 6 | +name: _amdgpu_cs_main |
| 7 | +tracksRegLiveness: true |
| 8 | +body: | |
| 9 | + ; REG_ALLOC-LABEL: name: _amdgpu_cs_main |
| 10 | + ; REG_ALLOC: bb.0: |
| 11 | + ; REG_ALLOC-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000) |
| 12 | + ; REG_ALLOC-NEXT: liveins: $sgpr0, $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr10, $sgpr2_sgpr3, $sgpr4_sgpr5, $sgpr8_sgpr9_sgpr10_sgpr11 |
| 13 | + ; REG_ALLOC-NEXT: {{ $}} |
| 14 | + ; REG_ALLOC-NEXT: renamable $vgpr5_vgpr6_vgpr7_vgpr8 = BUFFER_LOAD_DWORDX4_OFFEN renamable $vgpr3, renamable $sgpr8_sgpr9_sgpr10_sgpr11, 0, 0, 0, 0, implicit $exec :: (dereferenceable load (<4 x s32>), align 1, addrspace 8) |
| 15 | + ; REG_ALLOC-NEXT: renamable $vgpr15_vgpr16_vgpr17_vgpr18 = BUFFER_LOAD_DWORDX4_OFFEN renamable $vgpr2, renamable $sgpr8_sgpr9_sgpr10_sgpr11, 0, 0, 0, 0, implicit $exec :: (dereferenceable load (<4 x s32>), align 1, addrspace 8) |
| 16 | + ; REG_ALLOC-NEXT: renamable $vgpr11_vgpr12_vgpr13_vgpr14 = BUFFER_LOAD_DWORDX4_OFFEN renamable $vgpr0, renamable $sgpr8_sgpr9_sgpr10_sgpr11, 0, 0, 0, 0, implicit $exec :: (dereferenceable load (<4 x s32>), align 1, addrspace 8) |
| 17 | + ; REG_ALLOC-NEXT: KILL killed renamable $vgpr2 |
| 18 | + ; REG_ALLOC-NEXT: KILL killed renamable $vgpr0 |
| 19 | + ; REG_ALLOC-NEXT: KILL killed renamable $vgpr3 |
| 20 | + ; REG_ALLOC-NEXT: renamable $sgpr12 = V_READFIRSTLANE_B32 killed $vgpr5, implicit $exec |
| 21 | + ; REG_ALLOC-NEXT: renamable $vgpr4_vgpr5_vgpr6_vgpr7 = BUFFER_LOAD_DWORDX4_OFFEN killed renamable $vgpr4, killed renamable $sgpr8_sgpr9_sgpr10_sgpr11, 0, 0, 0, 0, implicit $exec :: (dereferenceable load (<4 x s32>), align 1, addrspace 8) |
| 22 | + ; REG_ALLOC-NEXT: renamable $sgpr13 = V_READFIRSTLANE_B32 killed $vgpr15, implicit $exec |
| 23 | + ; REG_ALLOC-NEXT: renamable $sgpr6_sgpr7 = V_CMP_NE_U32_e64 killed $vgpr1, 0, implicit $exec |
| 24 | + ; REG_ALLOC-NEXT: S_CMP_EQ_U64 killed renamable $sgpr12_sgpr13, killed renamable $sgpr2_sgpr3, implicit-def $scc |
| 25 | + ; REG_ALLOC-NEXT: renamable $sgpr1 = S_CSELECT_B32 1, 0, implicit $scc |
| 26 | + ; REG_ALLOC-NEXT: renamable $vgpr0 = IMPLICIT_DEF |
| 27 | + ; REG_ALLOC-NEXT: $exec = S_MOV_B64_term renamable $sgpr6_sgpr7 |
| 28 | + ; REG_ALLOC-NEXT: S_CBRANCH_EXECZ %bb.1, implicit $exec |
| 29 | + ; REG_ALLOC-NEXT: S_BRANCH %bb.2 |
| 30 | + ; REG_ALLOC-NEXT: {{ $}} |
| 31 | + ; REG_ALLOC-NEXT: bb.1: |
| 32 | + ; REG_ALLOC-NEXT: successors: %bb.3(0x40000000), %bb.5(0x40000000) |
| 33 | + ; REG_ALLOC-NEXT: liveins: $sgpr0, $vgpr0, $vgpr10, $sgpr4_sgpr5, $sgpr6_sgpr7, $vgpr11_vgpr12_vgpr13_vgpr14:0x0000000000000003, $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7:0x0000000000000300 |
| 34 | + ; REG_ALLOC-NEXT: {{ $}} |
| 35 | + ; REG_ALLOC-NEXT: renamable $sgpr2_sgpr3 = S_OR_SAVEEXEC_B64 killed renamable $sgpr6_sgpr7, implicit-def $exec, implicit-def $scc, implicit $exec |
| 36 | + ; REG_ALLOC-NEXT: $exec = S_XOR_B64_term $exec, renamable $sgpr2_sgpr3, implicit-def $scc |
| 37 | + ; REG_ALLOC-NEXT: S_CBRANCH_EXECZ %bb.5, implicit $exec |
| 38 | + ; REG_ALLOC-NEXT: S_BRANCH %bb.3 |
| 39 | + ; REG_ALLOC-NEXT: {{ $}} |
| 40 | + ; REG_ALLOC-NEXT: bb.2: |
| 41 | + ; REG_ALLOC-NEXT: successors: %bb.1(0x80000000) |
| 42 | + ; REG_ALLOC-NEXT: liveins: $sgpr0, $sgpr1, $vgpr10, $sgpr4_sgpr5, $sgpr6_sgpr7 |
| 43 | + ; REG_ALLOC-NEXT: {{ $}} |
| 44 | + ; REG_ALLOC-NEXT: renamable $sgpr1 = S_OR_B32 killed renamable $sgpr1, 2, implicit-def dead $scc |
| 45 | + ; REG_ALLOC-NEXT: renamable $vgpr0 = COPY killed renamable $sgpr1 |
| 46 | + ; REG_ALLOC-NEXT: renamable $vgpr11_vgpr12 = IMPLICIT_DEF |
| 47 | + ; REG_ALLOC-NEXT: renamable $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = IMPLICIT_DEF |
| 48 | + ; REG_ALLOC-NEXT: S_BRANCH %bb.1 |
| 49 | + ; REG_ALLOC-NEXT: {{ $}} |
| 50 | + ; REG_ALLOC-NEXT: bb.3: |
| 51 | + ; REG_ALLOC-NEXT: successors: %bb.5(0x80000000) |
| 52 | + ; REG_ALLOC-NEXT: liveins: $sgpr0, $vgpr10, $sgpr2_sgpr3, $sgpr4_sgpr5, $vgpr11_vgpr12_vgpr13_vgpr14:0x0000000000000003, $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7:0x0000000000000300 |
| 53 | + ; REG_ALLOC-NEXT: {{ $}} |
| 54 | + ; REG_ALLOC-NEXT: renamable $sgpr1 = V_READFIRSTLANE_B32 killed $vgpr11, implicit $exec |
| 55 | + ; REG_ALLOC-NEXT: renamable $sgpr6 = V_READFIRSTLANE_B32 killed $vgpr4, implicit $exec |
| 56 | + ; REG_ALLOC-NEXT: S_CMP_EQ_U32 killed renamable $sgpr6, killed renamable $sgpr1, implicit-def $scc |
| 57 | + ; REG_ALLOC-NEXT: renamable $sgpr1 = S_CSELECT_B32 1, 0, implicit $scc |
| 58 | + ; REG_ALLOC-NEXT: renamable $vgpr0 = COPY killed renamable $sgpr1 |
| 59 | + ; REG_ALLOC-NEXT: S_BRANCH %bb.5 |
| 60 | + ; REG_ALLOC-NEXT: {{ $}} |
| 61 | + ; REG_ALLOC-NEXT: bb.4: |
| 62 | + ; REG_ALLOC-NEXT: liveins: $sgpr0, $vgpr0, $vgpr10, $sgpr4_sgpr5 |
| 63 | + ; REG_ALLOC-NEXT: {{ $}} |
| 64 | + ; REG_ALLOC-NEXT: renamable $sgpr4_sgpr5_sgpr6_sgpr7 = S_LOAD_DWORDX4_IMM killed renamable $sgpr4_sgpr5, 0, 0 :: (invariant load (<4 x s32>), addrspace 4) |
| 65 | + ; REG_ALLOC-NEXT: renamable $vgpr1 = V_ADD_U32_e64 killed $sgpr0, killed $vgpr10, 0, implicit $exec |
| 66 | + ; REG_ALLOC-NEXT: BUFFER_STORE_DWORD_OFFEN_exact killed renamable $vgpr0, killed renamable $vgpr1, killed renamable $sgpr4_sgpr5_sgpr6_sgpr7, 0, 0, 0, 0, implicit $exec :: (dereferenceable store (s32), align 1, addrspace 8) |
| 67 | + ; REG_ALLOC-NEXT: S_ENDPGM 0 |
| 68 | + ; REG_ALLOC-NEXT: {{ $}} |
| 69 | + ; REG_ALLOC-NEXT: bb.5: |
| 70 | + ; REG_ALLOC-NEXT: successors: %bb.4(0x80000000) |
| 71 | + ; REG_ALLOC-NEXT: liveins: $sgpr0, $vgpr0, $vgpr10, $sgpr2_sgpr3, $sgpr4_sgpr5 |
| 72 | + ; REG_ALLOC-NEXT: {{ $}} |
| 73 | + ; REG_ALLOC-NEXT: $exec = S_OR_B64 $exec, killed renamable $sgpr2_sgpr3, implicit-def $scc |
| 74 | + ; REG_ALLOC-NEXT: S_BRANCH %bb.4 |
| 75 | + ; |
| 76 | + ; DEAD_INST_DEL-LABEL: name: _amdgpu_cs_main |
| 77 | + ; DEAD_INST_DEL: bb.0: |
| 78 | + ; DEAD_INST_DEL-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000) |
| 79 | + ; DEAD_INST_DEL-NEXT: liveins: $sgpr0, $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr10, $sgpr2_sgpr3, $sgpr4_sgpr5, $sgpr8_sgpr9_sgpr10_sgpr11 |
| 80 | + ; DEAD_INST_DEL-NEXT: {{ $}} |
| 81 | + ; DEAD_INST_DEL-NEXT: renamable $vgpr5_vgpr6_vgpr7_vgpr8 = BUFFER_LOAD_DWORDX4_OFFEN renamable $vgpr3, renamable $sgpr8_sgpr9_sgpr10_sgpr11, 0, 0, 0, 0, implicit $exec :: (dereferenceable load (<4 x s32>), align 1, addrspace 8) |
| 82 | + ; DEAD_INST_DEL-NEXT: renamable $vgpr15_vgpr16_vgpr17_vgpr18 = BUFFER_LOAD_DWORDX4_OFFEN renamable $vgpr2, renamable $sgpr8_sgpr9_sgpr10_sgpr11, 0, 0, 0, 0, implicit $exec :: (dereferenceable load (<4 x s32>), align 1, addrspace 8) |
| 83 | + ; DEAD_INST_DEL-NEXT: renamable $vgpr11_vgpr12_vgpr13_vgpr14 = BUFFER_LOAD_DWORDX4_OFFEN renamable $vgpr0, renamable $sgpr8_sgpr9_sgpr10_sgpr11, 0, 0, 0, 0, implicit $exec :: (dereferenceable load (<4 x s32>), align 1, addrspace 8) |
| 84 | + ; DEAD_INST_DEL-NEXT: KILL killed renamable $vgpr2 |
| 85 | + ; DEAD_INST_DEL-NEXT: KILL killed renamable $vgpr0 |
| 86 | + ; DEAD_INST_DEL-NEXT: KILL killed renamable $vgpr3 |
| 87 | + ; DEAD_INST_DEL-NEXT: renamable $sgpr12 = V_READFIRSTLANE_B32 killed $vgpr5, implicit $exec |
| 88 | + ; DEAD_INST_DEL-NEXT: renamable $vgpr4_vgpr5_vgpr6_vgpr7 = BUFFER_LOAD_DWORDX4_OFFEN killed renamable $vgpr4, killed renamable $sgpr8_sgpr9_sgpr10_sgpr11, 0, 0, 0, 0, implicit $exec :: (dereferenceable load (<4 x s32>), align 1, addrspace 8) |
| 89 | + ; DEAD_INST_DEL-NEXT: renamable $sgpr13 = V_READFIRSTLANE_B32 killed $vgpr15, implicit $exec |
| 90 | + ; DEAD_INST_DEL-NEXT: renamable $sgpr6_sgpr7 = V_CMP_NE_U32_e64 killed $vgpr1, 0, implicit $exec |
| 91 | + ; DEAD_INST_DEL-NEXT: S_CMP_EQ_U64 killed renamable $sgpr12_sgpr13, killed renamable $sgpr2_sgpr3, implicit-def $scc |
| 92 | + ; DEAD_INST_DEL-NEXT: renamable $sgpr1 = S_CSELECT_B32 1, 0, implicit $scc |
| 93 | + ; DEAD_INST_DEL-NEXT: renamable $vgpr0 = IMPLICIT_DEF |
| 94 | + ; DEAD_INST_DEL-NEXT: $exec = S_MOV_B64_term renamable $sgpr6_sgpr7 |
| 95 | + ; DEAD_INST_DEL-NEXT: S_CBRANCH_EXECZ %bb.1, implicit $exec |
| 96 | + ; DEAD_INST_DEL-NEXT: S_BRANCH %bb.2 |
| 97 | + ; DEAD_INST_DEL-NEXT: {{ $}} |
| 98 | + ; DEAD_INST_DEL-NEXT: bb.1: |
| 99 | + ; DEAD_INST_DEL-NEXT: successors: %bb.3(0x40000000), %bb.5(0x40000000) |
| 100 | + ; DEAD_INST_DEL-NEXT: liveins: $sgpr0, $vgpr0, $vgpr10, $sgpr4_sgpr5, $sgpr6_sgpr7, $vgpr11_vgpr12_vgpr13_vgpr14:0x0000000000000003, $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7:0x0000000000000300 |
| 101 | + ; DEAD_INST_DEL-NEXT: {{ $}} |
| 102 | + ; DEAD_INST_DEL-NEXT: renamable $sgpr2_sgpr3 = S_OR_SAVEEXEC_B64 killed renamable $sgpr6_sgpr7, implicit-def $exec, implicit-def $scc, implicit $exec |
| 103 | + ; DEAD_INST_DEL-NEXT: $exec = S_XOR_B64_term $exec, renamable $sgpr2_sgpr3, implicit-def $scc |
| 104 | + ; DEAD_INST_DEL-NEXT: S_CBRANCH_EXECZ %bb.5, implicit $exec |
| 105 | + ; DEAD_INST_DEL-NEXT: S_BRANCH %bb.3 |
| 106 | + ; DEAD_INST_DEL-NEXT: {{ $}} |
| 107 | + ; DEAD_INST_DEL-NEXT: bb.2: |
| 108 | + ; DEAD_INST_DEL-NEXT: successors: %bb.1(0x80000000) |
| 109 | + ; DEAD_INST_DEL-NEXT: liveins: $sgpr0, $sgpr1, $vgpr10, $sgpr4_sgpr5, $sgpr6_sgpr7 |
| 110 | + ; DEAD_INST_DEL-NEXT: {{ $}} |
| 111 | + ; DEAD_INST_DEL-NEXT: renamable $sgpr1 = S_OR_B32 killed renamable $sgpr1, 2, implicit-def dead $scc |
| 112 | + ; DEAD_INST_DEL-NEXT: renamable $vgpr11_vgpr12 = IMPLICIT_DEF |
| 113 | + ; DEAD_INST_DEL-NEXT: renamable $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = IMPLICIT_DEF |
| 114 | + ; DEAD_INST_DEL-NEXT: S_BRANCH %bb.1 |
| 115 | + ; DEAD_INST_DEL-NEXT: {{ $}} |
| 116 | + ; DEAD_INST_DEL-NEXT: bb.3: |
| 117 | + ; DEAD_INST_DEL-NEXT: successors: %bb.5(0x80000000) |
| 118 | + ; DEAD_INST_DEL-NEXT: liveins: $sgpr0, $vgpr10, $sgpr2_sgpr3, $sgpr4_sgpr5, $vgpr11_vgpr12_vgpr13_vgpr14:0x0000000000000003, $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7:0x0000000000000300 |
| 119 | + ; DEAD_INST_DEL-NEXT: {{ $}} |
| 120 | + ; DEAD_INST_DEL-NEXT: renamable $sgpr1 = V_READFIRSTLANE_B32 killed $vgpr11, implicit $exec |
| 121 | + ; DEAD_INST_DEL-NEXT: renamable $sgpr6 = V_READFIRSTLANE_B32 killed $vgpr4, implicit $exec |
| 122 | + ; DEAD_INST_DEL-NEXT: S_CMP_EQ_U32 killed renamable $sgpr6, killed renamable $sgpr1, implicit-def $scc |
| 123 | + ; DEAD_INST_DEL-NEXT: renamable $sgpr1 = S_CSELECT_B32 1, 0, implicit $scc |
| 124 | + ; DEAD_INST_DEL-NEXT: renamable $vgpr0 = COPY killed renamable $sgpr1 |
| 125 | + ; DEAD_INST_DEL-NEXT: S_BRANCH %bb.5 |
| 126 | + ; DEAD_INST_DEL-NEXT: {{ $}} |
| 127 | + ; DEAD_INST_DEL-NEXT: bb.4: |
| 128 | + ; DEAD_INST_DEL-NEXT: liveins: $sgpr0, $vgpr0, $vgpr10, $sgpr4_sgpr5 |
| 129 | + ; DEAD_INST_DEL-NEXT: {{ $}} |
| 130 | + ; DEAD_INST_DEL-NEXT: renamable $sgpr4_sgpr5_sgpr6_sgpr7 = S_LOAD_DWORDX4_IMM killed renamable $sgpr4_sgpr5, 0, 0 :: (invariant load (<4 x s32>), addrspace 4) |
| 131 | + ; DEAD_INST_DEL-NEXT: renamable $vgpr1 = V_ADD_U32_e64 killed $sgpr0, killed $vgpr10, 0, implicit $exec |
| 132 | + ; DEAD_INST_DEL-NEXT: BUFFER_STORE_DWORD_OFFEN_exact killed renamable $vgpr0, killed renamable $vgpr1, killed renamable $sgpr4_sgpr5_sgpr6_sgpr7, 0, 0, 0, 0, implicit $exec :: (dereferenceable store (s32), align 1, addrspace 8) |
| 133 | + ; DEAD_INST_DEL-NEXT: S_ENDPGM 0 |
| 134 | + ; DEAD_INST_DEL-NEXT: {{ $}} |
| 135 | + ; DEAD_INST_DEL-NEXT: bb.5: |
| 136 | + ; DEAD_INST_DEL-NEXT: successors: %bb.4(0x80000000) |
| 137 | + ; DEAD_INST_DEL-NEXT: liveins: $sgpr0, $vgpr0, $vgpr10, $sgpr2_sgpr3, $sgpr4_sgpr5 |
| 138 | + ; DEAD_INST_DEL-NEXT: {{ $}} |
| 139 | + ; DEAD_INST_DEL-NEXT: $exec = S_OR_B64 $exec, killed renamable $sgpr2_sgpr3, implicit-def $scc |
| 140 | + ; DEAD_INST_DEL-NEXT: S_BRANCH %bb.4 |
| 141 | + bb.0: |
| 142 | + successors: %bb.2(0x40000000), %bb.1(0x40000000) |
| 143 | + liveins: $sgpr0, $sgpr2_sgpr3, $sgpr4_sgpr5, $sgpr8_sgpr9_sgpr10_sgpr11, $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr10 |
| 144 | +
|
| 145 | + %0:sreg_32 = COPY $sgpr0 |
| 146 | + %1:vgpr_32 = COPY $vgpr0 |
| 147 | + %2:vgpr_32 = COPY $vgpr1 |
| 148 | + %3:vgpr_32 = COPY $vgpr2 |
| 149 | + %4:vgpr_32 = COPY $vgpr3 |
| 150 | + %5:vgpr_32 = COPY $vgpr4 |
| 151 | + %6:vgpr_32 = COPY $vgpr10 |
| 152 | + %7:sreg_64 = COPY $sgpr2_sgpr3 |
| 153 | + %8:sreg_64 = COPY $sgpr4_sgpr5 |
| 154 | + %9:sgpr_128 = COPY $sgpr8_sgpr9_sgpr10_sgpr11 |
| 155 | + undef %10.sub0_sub1_sub2_sub3:vreg_256 = BUFFER_LOAD_DWORDX4_OFFEN %1, %9, 0, 0, 0, 0, implicit $exec :: (dereferenceable load (<4 x s32>), align 1, addrspace 8) |
| 156 | + %10.sub4_sub5_sub6_sub7:vreg_256 = BUFFER_LOAD_DWORDX4_OFFEN %5, %9, 0, 0, 0, 0, implicit $exec :: (dereferenceable load (<4 x s32>), align 1, addrspace 8) |
| 157 | + %11:vreg_128 = BUFFER_LOAD_DWORDX4_OFFEN %4, %9, 0, 0, 0, 0, implicit $exec :: (dereferenceable load (<4 x s32>), align 1, addrspace 8) |
| 158 | + %12:vreg_128 = BUFFER_LOAD_DWORDX4_OFFEN %3, %9, 0, 0, 0, 0, implicit $exec :: (dereferenceable load (<4 x s32>), align 1, addrspace 8) |
| 159 | + undef %13.sub0:sgpr_256 = V_READFIRSTLANE_B32 %11.sub0, implicit $exec |
| 160 | + %13.sub1:sgpr_256 = V_READFIRSTLANE_B32 %12.sub0, implicit $exec |
| 161 | + S_CMP_EQ_U64 %13.sub0_sub1, %7, implicit-def $scc |
| 162 | + %14:sreg_32 = S_CSELECT_B32 1, 0, implicit killed $scc |
| 163 | + %15:sreg_64_xexec = V_CMP_NE_U32_e64 %2, 0, implicit $exec |
| 164 | + %16:vgpr_32 = IMPLICIT_DEF |
| 165 | + $exec = S_MOV_B64_term %15 |
| 166 | + S_CBRANCH_EXECZ %bb.1, implicit $exec |
| 167 | + S_BRANCH %bb.2 |
| 168 | +
|
| 169 | + bb.1: |
| 170 | + successors: %bb.3(0x40000000), %bb.5(0x40000000) |
| 171 | +
|
| 172 | + %17:sreg_64 = S_OR_SAVEEXEC_B64 %15, implicit-def $exec, implicit-def $scc, implicit $exec |
| 173 | + %18:sreg_64_xexec = S_AND_B64 $exec, %17, implicit-def $scc |
| 174 | + $exec = S_XOR_B64_term $exec, %18, implicit-def $scc |
| 175 | + S_CBRANCH_EXECZ %bb.5, implicit $exec |
| 176 | + S_BRANCH %bb.3 |
| 177 | +
|
| 178 | + bb.2: |
| 179 | + successors: %bb.1(0x80000000) |
| 180 | +
|
| 181 | + %19:sreg_32 = S_OR_B32 %14, 2, implicit-def dead $scc |
| 182 | + %16:vgpr_32 = COPY %19 |
| 183 | + undef %10.sub0_sub1:vreg_256 = IMPLICIT_DEF |
| 184 | + S_BRANCH %bb.1 |
| 185 | +
|
| 186 | + bb.3: |
| 187 | + successors: %bb.5(0x80000000) |
| 188 | +
|
| 189 | + %20:sreg_32 = V_READFIRSTLANE_B32 %10.sub0, implicit $exec |
| 190 | + %21:sreg_32 = V_READFIRSTLANE_B32 %10.sub4, implicit $exec |
| 191 | + S_CMP_EQ_U32 %21, %20, implicit-def $scc |
| 192 | + %22:sreg_32 = S_CSELECT_B32 1, 0, implicit killed $scc |
| 193 | + %16:vgpr_32 = COPY %22 |
| 194 | + S_BRANCH %bb.5 |
| 195 | +
|
| 196 | + bb.4: |
| 197 | + %23:vgpr_32 = V_ADD_U32_e64 %0, %6, 0, implicit $exec |
| 198 | + %24:sgpr_128 = S_LOAD_DWORDX4_IMM %8, 0, 0 :: (invariant load (<4 x s32>), addrspace 4) |
| 199 | + BUFFER_STORE_DWORD_OFFEN_exact %16, %23, %24, 0, 0, 0, 0, implicit $exec :: (dereferenceable store (s32), align 1, addrspace 8) |
| 200 | + S_ENDPGM 0 |
| 201 | +
|
| 202 | + bb.5: |
| 203 | + successors: %bb.4(0x80000000) |
| 204 | +
|
| 205 | + $exec = S_OR_B64 $exec, %18, implicit-def $scc |
| 206 | + S_BRANCH %bb.4 |
| 207 | +... |
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