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[clang] Precommit test for llvm.allow.ubsan.check() (#87435)
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‎clang/test/CodeGen/allow-ubsan-check.c

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// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 4
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// RUN: %clang_cc1 -triple x86_64-pc-linux-gnu -emit-llvm -o - %s -fsanitize=signed-integer-overflow,integer-divide-by-zero,null | FileCheck %s
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// RUN: %clang_cc1 -triple x86_64-pc-linux-gnu -emit-llvm -o - %s -fsanitize=signed-integer-overflow,integer-divide-by-zero,null -fsanitize-trap=signed-integer-overflow,integer-divide-by-zero,null | FileCheck %s --check-prefixes=TRAP
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// RUN: %clang_cc1 -triple x86_64-pc-linux-gnu -emit-llvm -o - %s -fsanitize=signed-integer-overflow,integer-divide-by-zero,null -fsanitize-recover=signed-integer-overflow,integer-divide-by-zero,null | FileCheck %s --check-prefixes=RECOVER
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// CHECK-LABEL: define dso_local i32 @div(
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// CHECK-SAME: i32 noundef [[X:%.*]], i32 noundef [[Y:%.*]]) #[[ATTR0:[0-9]+]] {
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[X_ADDR:%.*]] = alloca i32, align 4
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// CHECK-NEXT: [[Y_ADDR:%.*]] = alloca i32, align 4
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// CHECK-NEXT: store i32 [[X]], ptr [[X_ADDR]], align 4
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// CHECK-NEXT: store i32 [[Y]], ptr [[Y_ADDR]], align 4
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// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[X_ADDR]], align 4
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// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[Y_ADDR]], align 4
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// CHECK-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0, !nosanitize [[META2:![0-9]+]]
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// CHECK-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP0]], -2147483648, !nosanitize [[META2]]
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// CHECK-NEXT: [[TMP4:%.*]] = icmp ne i32 [[TMP1]], -1, !nosanitize [[META2]]
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// CHECK-NEXT: [[OR:%.*]] = or i1 [[TMP3]], [[TMP4]], !nosanitize [[META2]]
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// CHECK-NEXT: [[TMP5:%.*]] = and i1 [[TMP2]], [[OR]], !nosanitize [[META2]]
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// CHECK-NEXT: br i1 [[TMP5]], label [[CONT:%.*]], label [[HANDLER_DIVREM_OVERFLOW:%.*]], !prof [[PROF3:![0-9]+]], !nosanitize [[META2]]
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// CHECK: handler.divrem_overflow:
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// CHECK-NEXT: [[TMP6:%.*]] = zext i32 [[TMP0]] to i64, !nosanitize [[META2]]
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// CHECK-NEXT: [[TMP7:%.*]] = zext i32 [[TMP1]] to i64, !nosanitize [[META2]]
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// CHECK-NEXT: call void @__ubsan_handle_divrem_overflow_abort(ptr @[[GLOB1:[0-9]+]], i64 [[TMP6]], i64 [[TMP7]]) #[[ATTR3:[0-9]+]], !nosanitize [[META2]]
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// CHECK-NEXT: unreachable, !nosanitize [[META2]]
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// CHECK: cont:
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// CHECK-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP0]], [[TMP1]]
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// CHECK-NEXT: ret i32 [[DIV]]
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//
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// TRAP-LABEL: define dso_local i32 @div(
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// TRAP-SAME: i32 noundef [[X:%.*]], i32 noundef [[Y:%.*]]) #[[ATTR0:[0-9]+]] {
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// TRAP-NEXT: entry:
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// TRAP-NEXT: [[X_ADDR:%.*]] = alloca i32, align 4
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// TRAP-NEXT: [[Y_ADDR:%.*]] = alloca i32, align 4
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// TRAP-NEXT: store i32 [[X]], ptr [[X_ADDR]], align 4
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// TRAP-NEXT: store i32 [[Y]], ptr [[Y_ADDR]], align 4
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// TRAP-NEXT: [[TMP0:%.*]] = load i32, ptr [[X_ADDR]], align 4
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// TRAP-NEXT: [[TMP1:%.*]] = load i32, ptr [[Y_ADDR]], align 4
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// TRAP-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0, !nosanitize [[META2:![0-9]+]]
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// TRAP-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP0]], -2147483648, !nosanitize [[META2]]
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// TRAP-NEXT: [[TMP4:%.*]] = icmp ne i32 [[TMP1]], -1, !nosanitize [[META2]]
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// TRAP-NEXT: [[OR:%.*]] = or i1 [[TMP3]], [[TMP4]], !nosanitize [[META2]]
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// TRAP-NEXT: [[TMP5:%.*]] = and i1 [[TMP2]], [[OR]], !nosanitize [[META2]]
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// TRAP-NEXT: br i1 [[TMP5]], label [[CONT:%.*]], label [[TRAP:%.*]], !nosanitize [[META2]]
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// TRAP: trap:
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// TRAP-NEXT: call void @llvm.ubsantrap(i8 3) #[[ATTR3:[0-9]+]], !nosanitize [[META2]]
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// TRAP-NEXT: unreachable, !nosanitize [[META2]]
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// TRAP: cont:
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// TRAP-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP0]], [[TMP1]]
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// TRAP-NEXT: ret i32 [[DIV]]
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//
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// RECOVER-LABEL: define dso_local i32 @div(
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// RECOVER-SAME: i32 noundef [[X:%.*]], i32 noundef [[Y:%.*]]) #[[ATTR0:[0-9]+]] {
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// RECOVER-NEXT: entry:
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// RECOVER-NEXT: [[X_ADDR:%.*]] = alloca i32, align 4
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// RECOVER-NEXT: [[Y_ADDR:%.*]] = alloca i32, align 4
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// RECOVER-NEXT: store i32 [[X]], ptr [[X_ADDR]], align 4
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// RECOVER-NEXT: store i32 [[Y]], ptr [[Y_ADDR]], align 4
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// RECOVER-NEXT: [[TMP0:%.*]] = load i32, ptr [[X_ADDR]], align 4
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// RECOVER-NEXT: [[TMP1:%.*]] = load i32, ptr [[Y_ADDR]], align 4
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// RECOVER-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0, !nosanitize [[META2:![0-9]+]]
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// RECOVER-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP0]], -2147483648, !nosanitize [[META2]]
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// RECOVER-NEXT: [[TMP4:%.*]] = icmp ne i32 [[TMP1]], -1, !nosanitize [[META2]]
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// RECOVER-NEXT: [[OR:%.*]] = or i1 [[TMP3]], [[TMP4]], !nosanitize [[META2]]
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// RECOVER-NEXT: [[TMP5:%.*]] = and i1 [[TMP2]], [[OR]], !nosanitize [[META2]]
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// RECOVER-NEXT: br i1 [[TMP5]], label [[CONT:%.*]], label [[HANDLER_DIVREM_OVERFLOW:%.*]], !prof [[PROF3:![0-9]+]], !nosanitize [[META2]]
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// RECOVER: handler.divrem_overflow:
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// RECOVER-NEXT: [[TMP6:%.*]] = zext i32 [[TMP0]] to i64, !nosanitize [[META2]]
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// RECOVER-NEXT: [[TMP7:%.*]] = zext i32 [[TMP1]] to i64, !nosanitize [[META2]]
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// RECOVER-NEXT: call void @__ubsan_handle_divrem_overflow(ptr @[[GLOB1:[0-9]+]], i64 [[TMP6]], i64 [[TMP7]]) #[[ATTR3:[0-9]+]], !nosanitize [[META2]]
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// RECOVER-NEXT: br label [[CONT]], !nosanitize [[META2]]
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// RECOVER: cont:
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// RECOVER-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP0]], [[TMP1]]
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// RECOVER-NEXT: ret i32 [[DIV]]
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//
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int div(int x, int y) {
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return x / y;
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}
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// CHECK-LABEL: define dso_local i32 @null(
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// CHECK-SAME: ptr noundef [[X:%.*]]) #[[ATTR0]] {
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[X_ADDR:%.*]] = alloca ptr, align 8
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// CHECK-NEXT: store ptr [[X]], ptr [[X_ADDR]], align 8
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// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[X_ADDR]], align 8
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// CHECK-NEXT: [[TMP1:%.*]] = icmp ne ptr [[TMP0]], null, !nosanitize [[META2]]
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// CHECK-NEXT: br i1 [[TMP1]], label [[CONT:%.*]], label [[HANDLER_TYPE_MISMATCH:%.*]], !prof [[PROF3]], !nosanitize [[META2]]
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// CHECK: handler.type_mismatch:
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// CHECK-NEXT: [[TMP2:%.*]] = ptrtoint ptr [[TMP0]] to i64, !nosanitize [[META2]]
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// CHECK-NEXT: call void @__ubsan_handle_type_mismatch_v1_abort(ptr @[[GLOB2:[0-9]+]], i64 [[TMP2]]) #[[ATTR3]], !nosanitize [[META2]]
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// CHECK-NEXT: unreachable, !nosanitize [[META2]]
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// CHECK: cont:
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// CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 4
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// CHECK-NEXT: ret i32 [[TMP3]]
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//
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// TRAP-LABEL: define dso_local i32 @null(
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// TRAP-SAME: ptr noundef [[X:%.*]]) #[[ATTR0]] {
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// TRAP-NEXT: entry:
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// TRAP-NEXT: [[X_ADDR:%.*]] = alloca ptr, align 8
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// TRAP-NEXT: store ptr [[X]], ptr [[X_ADDR]], align 8
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// TRAP-NEXT: [[TMP0:%.*]] = load ptr, ptr [[X_ADDR]], align 8
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// TRAP-NEXT: [[TMP1:%.*]] = icmp ne ptr [[TMP0]], null, !nosanitize [[META2]]
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// TRAP-NEXT: br i1 [[TMP1]], label [[CONT:%.*]], label [[TRAP:%.*]], !nosanitize [[META2]]
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// TRAP: trap:
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// TRAP-NEXT: call void @llvm.ubsantrap(i8 22) #[[ATTR3]], !nosanitize [[META2]]
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// TRAP-NEXT: unreachable, !nosanitize [[META2]]
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// TRAP: cont:
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// TRAP-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP0]], align 4
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// TRAP-NEXT: ret i32 [[TMP2]]
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//
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// RECOVER-LABEL: define dso_local i32 @null(
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// RECOVER-SAME: ptr noundef [[X:%.*]]) #[[ATTR0]] {
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// RECOVER-NEXT: entry:
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// RECOVER-NEXT: [[X_ADDR:%.*]] = alloca ptr, align 8
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// RECOVER-NEXT: store ptr [[X]], ptr [[X_ADDR]], align 8
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// RECOVER-NEXT: [[TMP0:%.*]] = load ptr, ptr [[X_ADDR]], align 8
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// RECOVER-NEXT: [[TMP1:%.*]] = icmp ne ptr [[TMP0]], null, !nosanitize [[META2]]
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// RECOVER-NEXT: br i1 [[TMP1]], label [[CONT:%.*]], label [[HANDLER_TYPE_MISMATCH:%.*]], !prof [[PROF3]], !nosanitize [[META2]]
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// RECOVER: handler.type_mismatch:
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// RECOVER-NEXT: [[TMP2:%.*]] = ptrtoint ptr [[TMP0]] to i64, !nosanitize [[META2]]
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// RECOVER-NEXT: call void @__ubsan_handle_type_mismatch_v1(ptr @[[GLOB2:[0-9]+]], i64 [[TMP2]]) #[[ATTR3]], !nosanitize [[META2]]
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// RECOVER-NEXT: br label [[CONT]], !nosanitize [[META2]]
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// RECOVER: cont:
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// RECOVER-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 4
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// RECOVER-NEXT: ret i32 [[TMP3]]
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//
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int null(int* x) {
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return *x;
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}
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// CHECK-LABEL: define dso_local i32 @overflow(
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// CHECK-SAME: i32 noundef [[X:%.*]], i32 noundef [[Y:%.*]]) #[[ATTR0]] {
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[X_ADDR:%.*]] = alloca i32, align 4
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// CHECK-NEXT: [[Y_ADDR:%.*]] = alloca i32, align 4
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// CHECK-NEXT: store i32 [[X]], ptr [[X_ADDR]], align 4
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// CHECK-NEXT: store i32 [[Y]], ptr [[Y_ADDR]], align 4
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// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[X_ADDR]], align 4
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// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[Y_ADDR]], align 4
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// CHECK-NEXT: [[TMP2:%.*]] = call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 [[TMP0]], i32 [[TMP1]]), !nosanitize [[META2]]
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// CHECK-NEXT: [[TMP3:%.*]] = extractvalue { i32, i1 } [[TMP2]], 0, !nosanitize [[META2]]
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// CHECK-NEXT: [[TMP4:%.*]] = extractvalue { i32, i1 } [[TMP2]], 1, !nosanitize [[META2]]
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// CHECK-NEXT: [[TMP5:%.*]] = xor i1 [[TMP4]], true, !nosanitize [[META2]]
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// CHECK-NEXT: br i1 [[TMP5]], label [[CONT:%.*]], label [[HANDLER_ADD_OVERFLOW:%.*]], !prof [[PROF3]], !nosanitize [[META2]]
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// CHECK: handler.add_overflow:
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// CHECK-NEXT: [[TMP6:%.*]] = zext i32 [[TMP0]] to i64, !nosanitize [[META2]]
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// CHECK-NEXT: [[TMP7:%.*]] = zext i32 [[TMP1]] to i64, !nosanitize [[META2]]
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// CHECK-NEXT: call void @__ubsan_handle_add_overflow_abort(ptr @[[GLOB3:[0-9]+]], i64 [[TMP6]], i64 [[TMP7]]) #[[ATTR3]], !nosanitize [[META2]]
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// CHECK-NEXT: unreachable, !nosanitize [[META2]]
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// CHECK: cont:
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// CHECK-NEXT: ret i32 [[TMP3]]
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//
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// TRAP-LABEL: define dso_local i32 @overflow(
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// TRAP-SAME: i32 noundef [[X:%.*]], i32 noundef [[Y:%.*]]) #[[ATTR0]] {
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// TRAP-NEXT: entry:
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// TRAP-NEXT: [[X_ADDR:%.*]] = alloca i32, align 4
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// TRAP-NEXT: [[Y_ADDR:%.*]] = alloca i32, align 4
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// TRAP-NEXT: store i32 [[X]], ptr [[X_ADDR]], align 4
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// TRAP-NEXT: store i32 [[Y]], ptr [[Y_ADDR]], align 4
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// TRAP-NEXT: [[TMP0:%.*]] = load i32, ptr [[X_ADDR]], align 4
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// TRAP-NEXT: [[TMP1:%.*]] = load i32, ptr [[Y_ADDR]], align 4
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// TRAP-NEXT: [[TMP2:%.*]] = call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 [[TMP0]], i32 [[TMP1]]), !nosanitize [[META2]]
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// TRAP-NEXT: [[TMP3:%.*]] = extractvalue { i32, i1 } [[TMP2]], 0, !nosanitize [[META2]]
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// TRAP-NEXT: [[TMP4:%.*]] = extractvalue { i32, i1 } [[TMP2]], 1, !nosanitize [[META2]]
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// TRAP-NEXT: [[TMP5:%.*]] = xor i1 [[TMP4]], true, !nosanitize [[META2]]
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// TRAP-NEXT: br i1 [[TMP5]], label [[CONT:%.*]], label [[TRAP:%.*]], !nosanitize [[META2]]
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// TRAP: trap:
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// TRAP-NEXT: call void @llvm.ubsantrap(i8 0) #[[ATTR3]], !nosanitize [[META2]]
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// TRAP-NEXT: unreachable, !nosanitize [[META2]]
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// TRAP: cont:
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// TRAP-NEXT: ret i32 [[TMP3]]
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//
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// RECOVER-LABEL: define dso_local i32 @overflow(
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// RECOVER-SAME: i32 noundef [[X:%.*]], i32 noundef [[Y:%.*]]) #[[ATTR0]] {
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// RECOVER-NEXT: entry:
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// RECOVER-NEXT: [[X_ADDR:%.*]] = alloca i32, align 4
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// RECOVER-NEXT: [[Y_ADDR:%.*]] = alloca i32, align 4
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// RECOVER-NEXT: store i32 [[X]], ptr [[X_ADDR]], align 4
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// RECOVER-NEXT: store i32 [[Y]], ptr [[Y_ADDR]], align 4
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// RECOVER-NEXT: [[TMP0:%.*]] = load i32, ptr [[X_ADDR]], align 4
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// RECOVER-NEXT: [[TMP1:%.*]] = load i32, ptr [[Y_ADDR]], align 4
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// RECOVER-NEXT: [[TMP2:%.*]] = call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 [[TMP0]], i32 [[TMP1]]), !nosanitize [[META2]]
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// RECOVER-NEXT: [[TMP3:%.*]] = extractvalue { i32, i1 } [[TMP2]], 0, !nosanitize [[META2]]
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// RECOVER-NEXT: [[TMP4:%.*]] = extractvalue { i32, i1 } [[TMP2]], 1, !nosanitize [[META2]]
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// RECOVER-NEXT: [[TMP5:%.*]] = xor i1 [[TMP4]], true, !nosanitize [[META2]]
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// RECOVER-NEXT: br i1 [[TMP5]], label [[CONT:%.*]], label [[HANDLER_ADD_OVERFLOW:%.*]], !prof [[PROF3]], !nosanitize [[META2]]
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// RECOVER: handler.add_overflow:
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// RECOVER-NEXT: [[TMP6:%.*]] = zext i32 [[TMP0]] to i64, !nosanitize [[META2]]
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// RECOVER-NEXT: [[TMP7:%.*]] = zext i32 [[TMP1]] to i64, !nosanitize [[META2]]
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// RECOVER-NEXT: call void @__ubsan_handle_add_overflow(ptr @[[GLOB3:[0-9]+]], i64 [[TMP6]], i64 [[TMP7]]) #[[ATTR3]], !nosanitize [[META2]]
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// RECOVER-NEXT: br label [[CONT]], !nosanitize [[META2]]
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// RECOVER: cont:
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// RECOVER-NEXT: ret i32 [[TMP3]]
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//
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int overflow(int x, int y) {
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return x + y;
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}
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//.
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// CHECK: [[META2]] = !{}
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// CHECK: [[PROF3]] = !{!"branch_weights", i32 1048575, i32 1}
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//.
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// TRAP: [[META2]] = !{}
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//.
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// RECOVER: [[META2]] = !{}
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// RECOVER: [[PROF3]] = !{!"branch_weights", i32 1048575, i32 1}
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//.

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