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[AArch64] Extend usage of XAR instruction for fixed-length operations
Resolves #139229 In #137162, support for `v2i64` was implemented for vector rotate transformation, although types like `v4i32`, `v8i16` and `v16i8` do not have Neon SHA3, we can use SVE operations if sve2-sha3 is available.
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llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp

Lines changed: 21 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -4632,20 +4632,31 @@ bool AArch64DAGToDAGISel::trySelectXAR(SDNode *N) {
46324632
SDValue Imm = CurDAG->getTargetConstant(
46334633
ShAmt, DL, N0.getOperand(1).getValueType(), false);
46344634

4635-
if (ShAmt + HsAmt != 64)
4635+
if (ShAmt + HsAmt != VT.getScalarSizeInBits())
46364636
return false;
46374637

46384638
if (!IsXOROperand) {
46394639
SDValue Zero = CurDAG->getTargetConstant(0, DL, MVT::i64);
46404640
SDNode *MOV =
4641-
CurDAG->getMachineNode(AArch64::MOVIv2d_ns, DL, MVT::v2i64, Zero);
4641+
CurDAG->getMachineNode(AArch64::MOVIv2d_ns, DL, MVT::nxv4i32, Zero);
46424642
SDValue MOVIV = SDValue(MOV, 0);
4643-
R1 = N1->getOperand(0);
4644-
R2 = MOVIV;
4643+
4644+
SDValue Undef = SDValue(
4645+
CurDAG->getMachineNode(TargetOpcode::IMPLICIT_DEF, DL, MVT::nxv4i32),
4646+
0);
4647+
SDValue ZSub = CurDAG->getTargetConstant(AArch64::zsub, DL, MVT::i32);
4648+
4649+
R1 =
4650+
SDValue(CurDAG->getMachineNode(AArch64::INSERT_SUBREG, DL, MVT::nxv4i32,
4651+
Undef, N1->getOperand(0), ZSub),
4652+
0);
4653+
R2 = SDValue(CurDAG->getMachineNode(AArch64::INSERT_SUBREG, DL,
4654+
MVT::nxv4i32, Undef, MOVIV, ZSub),
4655+
0);
46454656
}
46464657

46474658
// If the input is a v1i64, widen to a v2i64 to use XAR.
4648-
assert((VT == MVT::v1i64 || VT == MVT::v2i64) && "Unexpected XAR type!");
4659+
// assert((VT == MVT::v1i64 || VT == MVT::v2i64) && "Unexpected XAR type!");
46494660
if (VT == MVT::v1i64) {
46504661
EVT SVT = MVT::v2i64;
46514662
SDValue Undef =
@@ -4661,12 +4672,16 @@ bool AArch64DAGToDAGISel::trySelectXAR(SDNode *N) {
46614672
}
46624673

46634674
SDValue Ops[] = {R1, R2, Imm};
4664-
SDNode *XAR = CurDAG->getMachineNode(AArch64::XAR, DL, MVT::v2i64, Ops);
4675+
SDNode *XAR = CurDAG->getMachineNode(AArch64::XAR_ZZZI_S, DL, VT, Ops);
46654676

46664677
if (VT == MVT::v1i64) {
46674678
SDValue DSub = CurDAG->getTargetConstant(AArch64::dsub, DL, MVT::i32);
46684679
XAR = CurDAG->getMachineNode(AArch64::EXTRACT_SUBREG, DL, VT,
46694680
SDValue(XAR, 0), DSub);
4681+
} else {
4682+
SDValue ZSub = CurDAG->getTargetConstant(AArch64::zsub, DL, MVT::i32);
4683+
XAR = CurDAG->getMachineNode(AArch64::EXTRACT_SUBREG, DL, VT,
4684+
SDValue(XAR, 0), ZSub);
46704685
}
46714686
ReplaceNode(N, XAR);
46724687
return true;

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