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amy-kwanamy-kwan
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Further simplify test cases
1 parent cfe59bd commit 626a854

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-138
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3 files changed

+79
-138
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‎llvm/test/CodeGen/PowerPC/aix-small-tls-globalvarattr-funcattr.ll

Lines changed: 26 additions & 42 deletions
Original file line numberDiff line numberDiff line change
@@ -1,10 +1,9 @@
1-
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
21
; RUN: llc -verify-machineinstrs -mcpu=pwr7 -ppc-asm-full-reg-names \
32
; RUN: -mtriple powerpc64-ibm-aix-xcoff < %s \
4-
; RUN: | FileCheck %s --check-prefix=CHECK-SMALLCM64
3+
; RUN: | FileCheck %s --check-prefixes=COMMONCM,CHECK-SMALLCM64
54
; RUN: llc -verify-machineinstrs -mcpu=pwr7 -ppc-asm-full-reg-names \
65
; RUN: -mtriple powerpc64-ibm-aix-xcoff --code-model=large \
7-
; RUN: < %s | FileCheck %s --check-prefix=CHECK-LARGECM64
6+
; RUN: < %s | FileCheck %s --check-prefixes=COMMONCM,CHECK-LARGECM64
87

98
@mySmallTLS = thread_local(localexec) global [7800 x i64] zeroinitializer, align 8 #0
109
@mySmallTLS2 = thread_local(localexec) global [3000 x i64] zeroinitializer, align 8 #0
@@ -14,36 +13,24 @@ declare nonnull ptr @llvm.threadlocal.address.p0(ptr nonnull)
1413
; All accesses use a "faster" local-exec sequence directly off the thread pointer,
1514
; except for mySmallTLS, as this variable is over the 32KB size limit.
1615
define i64 @StoreLargeAccess1() #1 {
17-
; CHECK-SMALLCM64-LABEL: StoreLargeAccess1:
18-
; CHECK-SMALLCM64: # %bb.0: # %entry
19-
; CHECK-SMALLCM64-NEXT: ld r3, L..C0(r2) # target-flags(ppc-tprel) @mySmallTLS
20-
; CHECK-SMALLCM64-NEXT: li r4, 0
21-
; CHECK-SMALLCM64-NEXT: li r5, 23
22-
; CHECK-SMALLCM64-NEXT: ori r4, r4, 53328
23-
; CHECK-SMALLCM64-NEXT: add r3, r13, r3
24-
; CHECK-SMALLCM64-NEXT: stdx r5, r3, r4
25-
; CHECK-SMALLCM64-NEXT: li r3, 55
26-
; CHECK-SMALLCM64-NEXT: li r4, 64
27-
; CHECK-SMALLCM64-NEXT: std r3, (mySmallTLS2[TL]@le+696)-65536(r13)
28-
; CHECK-SMALLCM64-NEXT: li r3, 142
29-
; CHECK-SMALLCM64-NEXT: std r4, (mySmallTLS3[TL]@le+20000)-131072(r13)
30-
; CHECK-SMALLCM64-NEXT: blr
31-
;
32-
; CHECK-LARGECM64-LABEL: StoreLargeAccess1:
33-
; CHECK-LARGECM64: # %bb.0: # %entry
34-
; CHECK-LARGECM64-NEXT: addis r3, L..C0@u(r2)
35-
; CHECK-LARGECM64-NEXT: li r4, 0
36-
; CHECK-LARGECM64-NEXT: li r5, 23
37-
; CHECK-LARGECM64-NEXT: ld r3, L..C0@l(r3)
38-
; CHECK-LARGECM64-NEXT: ori r4, r4, 53328
39-
; CHECK-LARGECM64-NEXT: add r3, r13, r3
40-
; CHECK-LARGECM64-NEXT: stdx r5, r3, r4
41-
; CHECK-LARGECM64-NEXT: li r3, 55
42-
; CHECK-LARGECM64-NEXT: li r4, 64
43-
; CHECK-LARGECM64-NEXT: std r3, (mySmallTLS2[TL]@le+696)-65536(r13)
44-
; CHECK-LARGECM64-NEXT: li r3, 142
45-
; CHECK-LARGECM64-NEXT: std r4, (mySmallTLS3[TL]@le+20000)-131072(r13)
46-
; CHECK-LARGECM64-NEXT: blr
16+
; COMMONCM-LABEL: StoreLargeAccess1:
17+
; COMMONCM-NEXT: # %bb.0: # %entry
18+
; CHECK-SMALLCM64: ld r3, L..C0(r2) # target-flags(ppc-tprel) @mySmallTLS
19+
; CHECK-SMALLCM64-NEXT: li r4, 0
20+
; CHECK-SMALLCM64-NEXT: li r5, 23
21+
; CHECK-LARGECM64: addis r3, L..C0@u(r2)
22+
; CHECK-LARGECM64-NEXT: li r4, 0
23+
; CHECK-LARGECM64-NEXT: li r5, 23
24+
; CHECK-LARGECM64-NEXT: ld r3, L..C0@l(r3)
25+
; COMMONCM: ori r4, r4, 53328
26+
; COMMONCM-NEXT: add r3, r13, r3
27+
; COMMONCM-NEXT: stdx r5, r3, r4
28+
; COMMONCM-NEXT: li r3, 55
29+
; COMMONCM-NEXT: li r4, 64
30+
; COMMONCM-NEXT: std r3, (mySmallTLS2[TL]@le+696)-65536(r13)
31+
; COMMONCM-NEXT: li r3, 142
32+
; COMMONCM-NEXT: std r4, (mySmallTLS3[TL]@le+20000)-131072(r13)
33+
; COMMONCM-NEXT: blr
4734
entry:
4835
%tls0 = tail call align 8 ptr @llvm.threadlocal.address.p0(ptr align 8 @mySmallTLS)
4936
%arrayidx = getelementptr inbounds i8, ptr %tls0, i32 53328
@@ -65,9 +52,9 @@ entry:
6552
; only some local-exec variables should have the small-local-exec TLS access
6653
; sequence (as opposed to all of them).
6754
define i64 @StoreLargeAccess2() {
68-
; CHECK-SMALLCM64-LABEL: StoreLargeAccess2:
69-
; CHECK-SMALLCM64: # %bb.0: # %entry
70-
; CHECK-SMALLCM64-NEXT: ld r5, L..C0(r2) # target-flags(ppc-tprel) @mySmallTLS
55+
; COMMONCM-LABEL: StoreLargeAccess2:
56+
; COMMONCM-NEXT: # %bb.0: # %entry
57+
; CHECK-SMALLCM64: ld r5, L..C0(r2) # target-flags(ppc-tprel) @mySmallTLS
7158
; CHECK-SMALLCM64-NEXT: li r3, 0
7259
; CHECK-SMALLCM64-NEXT: li r4, 23
7360
; CHECK-SMALLCM64-NEXT: ori r3, r3, 53328
@@ -80,11 +67,7 @@ define i64 @StoreLargeAccess2() {
8067
; CHECK-SMALLCM64-NEXT: li r3, 142
8168
; CHECK-SMALLCM64-NEXT: add r5, r13, r5
8269
; CHECK-SMALLCM64-NEXT: std r4, 20000(r5)
83-
; CHECK-SMALLCM64-NEXT: blr
84-
;
85-
; CHECK-LARGECM64-LABEL: StoreLargeAccess2:
86-
; CHECK-LARGECM64: # %bb.0: # %entry
87-
; CHECK-LARGECM64-NEXT: addis r3, L..C0@u(r2)
70+
; CHECK-LARGECM64: addis r3, L..C0@u(r2)
8871
; CHECK-LARGECM64-NEXT: li r4, 0
8972
; CHECK-LARGECM64-NEXT: li r5, 23
9073
; CHECK-LARGECM64-NEXT: ld r3, L..C0@l(r3)
@@ -99,7 +82,8 @@ define i64 @StoreLargeAccess2() {
9982
; CHECK-LARGECM64-NEXT: add r3, r13, r3
10083
; CHECK-LARGECM64-NEXT: std r5, 20000(r3)
10184
; CHECK-LARGECM64-NEXT: li r3, 142
102-
; CHECK-LARGECM64-NEXT: blr
85+
; COMMONCM-NEXT: blr
86+
;
10387
entry:
10488
%tls0 = tail call align 8 ptr @llvm.threadlocal.address.p0(ptr align 8 @mySmallTLS)
10589
%arrayidx = getelementptr inbounds i8, ptr %tls0, i32 53328

‎llvm/test/CodeGen/PowerPC/aix-small-tls-globalvarattr-loadaddr.ll

Lines changed: 38 additions & 68 deletions
Original file line numberDiff line numberDiff line change
@@ -1,10 +1,10 @@
11
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
22
; RUN: llc -verify-machineinstrs -mcpu=pwr7 -ppc-asm-full-reg-names \
33
; RUN: -mtriple powerpc64-ibm-aix-xcoff < %s \
4-
; RUN: | FileCheck %s --check-prefix=SMALLCM64
4+
; RUN: | FileCheck %s --check-prefixes=COMMONCM,SMALLCM64
55
; RUN: llc -verify-machineinstrs -mcpu=pwr7 -ppc-asm-full-reg-names \
66
; RUN: -mtriple powerpc64-ibm-aix-xcoff --code-model=large \
7-
; RUN: < %s | FileCheck %s --check-prefix=LARGECM64
7+
; RUN: < %s | FileCheck %s --check-prefixes=COMMONCM,LARGECM64
88

99
; Test that the 'aix-small-tls' global variable attribute generates the
1010
; optimized small-local-exec TLS sequence. Global variables without this
@@ -26,23 +26,18 @@ declare nonnull ptr @llvm.threadlocal.address.p0(ptr nonnull)
2626
@f = thread_local(localexec) global [87 x float] zeroinitializer, align 4 #0
2727
@f_noattr = thread_local(localexec) global [87 x float] zeroinitializer, align 4
2828

29-
define nonnull ptr @AddrTest1() local_unnamed_addr {
30-
; SMALLCM64-LABEL: AddrTest1:
31-
; SMALLCM64: # %bb.0: # %entry
32-
; SMALLCM64-NEXT: addi r3, r13, a[TL]@le+1
33-
; SMALLCM64-NEXT: blr
34-
;
35-
; LARGECM64-LABEL: AddrTest1:
36-
; LARGECM64: # %bb.0: # %entry
37-
; LARGECM64-NEXT: addi r3, r13, a[TL]@le+1
38-
; LARGECM64-NEXT: blr
29+
define nonnull ptr @AddrTest1() {
30+
; COMMONCM-LABEL: AddrTest1:
31+
; COMMONCM: # %bb.0: # %entry
32+
; COMMONCM-NEXT: addi r3, r13, a[TL]@le+1
33+
; COMMONCM-NEXT: blr
3934
entry:
4035
%tls0 = tail call align 1 ptr @llvm.threadlocal.address.p0(ptr align 1 @a)
4136
%arrayidx = getelementptr inbounds [87 x i8], ptr %tls0, i64 0, i64 1
4237
ret ptr %arrayidx
4338
}
4439

45-
define nonnull ptr @AddrTest1_NoAttr() local_unnamed_addr {
40+
define nonnull ptr @AddrTest1_NoAttr() {
4641
; SMALLCM64-LABEL: AddrTest1_NoAttr:
4742
; SMALLCM64: # %bb.0: # %entry
4843
; SMALLCM64-NEXT: ld r3, L..C0(r2) # target-flags(ppc-tprel) @a_noattr
@@ -63,23 +58,18 @@ entry:
6358
ret ptr %arrayidx
6459
}
6560

66-
define nonnull ptr @AddrTest2() local_unnamed_addr {
67-
; SMALLCM64-LABEL: AddrTest2:
68-
; SMALLCM64: # %bb.0: # %entry
69-
; SMALLCM64-NEXT: addi r3, r13, b[TL]@le+4
70-
; SMALLCM64-NEXT: blr
71-
;
72-
; LARGECM64-LABEL: AddrTest2:
73-
; LARGECM64: # %bb.0: # %entry
74-
; LARGECM64-NEXT: addi r3, r13, b[TL]@le+4
75-
; LARGECM64-NEXT: blr
61+
define nonnull ptr @AddrTest2() {
62+
; COMMONCM-LABEL: AddrTest2:
63+
; COMMONCM: # %bb.0: # %entry
64+
; COMMONCM-NEXT: addi r3, r13, b[TL]@le+4
65+
; COMMONCM-NEXT: blr
7666
entry:
7767
%tls0 = tail call align 2 ptr @llvm.threadlocal.address.p0(ptr align 2 @b)
7868
%arrayidx = getelementptr inbounds [87 x i16], ptr %tls0, i64 0, i64 2
7969
ret ptr %arrayidx
8070
}
8171

82-
define nonnull ptr @AddrTest2_NoAttr() local_unnamed_addr {
72+
define nonnull ptr @AddrTest2_NoAttr() {
8373
; SMALLCM64-LABEL: AddrTest2_NoAttr:
8474
; SMALLCM64: # %bb.0: # %entry
8575
; SMALLCM64-NEXT: ld r3, L..C1(r2) # target-flags(ppc-tprel) @b_noattr
@@ -100,23 +90,18 @@ entry:
10090
ret ptr %arrayidx
10191
}
10292

103-
define nonnull ptr @AddrTest3() local_unnamed_addr {
104-
; SMALLCM64-LABEL: AddrTest3:
105-
; SMALLCM64: # %bb.0: # %entry
106-
; SMALLCM64-NEXT: addi r3, r13, c[TL]@le+12
107-
; SMALLCM64-NEXT: blr
108-
;
109-
; LARGECM64-LABEL: AddrTest3:
110-
; LARGECM64: # %bb.0: # %entry
111-
; LARGECM64-NEXT: addi r3, r13, c[TL]@le+12
112-
; LARGECM64-NEXT: blr
93+
define nonnull ptr @AddrTest3() {
94+
; COMMONCM-LABEL: AddrTest3:
95+
; COMMONCM: # %bb.0: # %entry
96+
; COMMONCM-NEXT: addi r3, r13, c[TL]@le+12
97+
; COMMONCM-NEXT: blr
11398
entry:
11499
%tls0 = tail call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @c)
115100
%arrayidx = getelementptr inbounds [87 x i32], ptr %tls0, i64 0, i64 3
116101
ret ptr %arrayidx
117102
}
118103

119-
define nonnull ptr @AddrTest3_NoAttr() local_unnamed_addr {
104+
define nonnull ptr @AddrTest3_NoAttr() {
120105
; SMALLCM64-LABEL: AddrTest3_NoAttr:
121106
; SMALLCM64: # %bb.0: # %entry
122107
; SMALLCM64-NEXT: ld r3, L..C2(r2) # target-flags(ppc-tprel) @c_noattr
@@ -137,23 +122,18 @@ entry:
137122
ret ptr %arrayidx
138123
}
139124

140-
define nonnull ptr @AddrTest4() local_unnamed_addr {
141-
; SMALLCM64-LABEL: AddrTest4:
142-
; SMALLCM64: # %bb.0: # %entry
143-
; SMALLCM64-NEXT: addi r3, r13, c[TL]@le+56
144-
; SMALLCM64-NEXT: blr
145-
;
146-
; LARGECM64-LABEL: AddrTest4:
147-
; LARGECM64: # %bb.0: # %entry
148-
; LARGECM64-NEXT: addi r3, r13, c[TL]@le+56
149-
; LARGECM64-NEXT: blr
125+
define nonnull ptr @AddrTest4() {
126+
; COMMONCM-LABEL: AddrTest4:
127+
; COMMONCM: # %bb.0: # %entry
128+
; COMMONCM-NEXT: addi r3, r13, c[TL]@le+56
129+
; COMMONCM-NEXT: blr
150130
entry:
151131
%tls0 = tail call align 8 ptr @llvm.threadlocal.address.p0(ptr align 8 @c)
152132
%arrayidx = getelementptr inbounds [87 x i64], ptr %tls0, i64 0, i64 7
153133
ret ptr %arrayidx
154134
}
155135

156-
define nonnull ptr @AddrTest4_NoAttr() local_unnamed_addr {
136+
define nonnull ptr @AddrTest4_NoAttr() {
157137
; SMALLCM64-LABEL: AddrTest4_NoAttr:
158138
; SMALLCM64: # %bb.0: # %entry
159139
; SMALLCM64-NEXT: ld r3, L..C2(r2) # target-flags(ppc-tprel) @c_noattr
@@ -174,23 +154,18 @@ entry:
174154
ret ptr %arrayidx
175155
}
176156

177-
define nonnull ptr @AddrTest5() local_unnamed_addr {
178-
; SMALLCM64-LABEL: AddrTest5:
179-
; SMALLCM64: # %bb.0: # %entry
180-
; SMALLCM64-NEXT: addi r3, r13, e[TL]@le+48
181-
; SMALLCM64-NEXT: blr
182-
;
183-
; LARGECM64-LABEL: AddrTest5:
184-
; LARGECM64: # %bb.0: # %entry
185-
; LARGECM64-NEXT: addi r3, r13, e[TL]@le+48
186-
; LARGECM64-NEXT: blr
157+
define nonnull ptr @AddrTest5() {
158+
; COMMONCM-LABEL: AddrTest5:
159+
; COMMONCM: # %bb.0: # %entry
160+
; COMMONCM-NEXT: addi r3, r13, e[TL]@le+48
161+
; COMMONCM-NEXT: blr
187162
entry:
188163
%tls0 = tail call align 8 ptr @llvm.threadlocal.address.p0(ptr align 8 @e)
189164
%arrayidx = getelementptr inbounds [87 x double], ptr %tls0, i64 0, i64 6
190165
ret ptr %arrayidx
191166
}
192167

193-
define nonnull ptr @AddrTest5_NoAttr() local_unnamed_addr {
168+
define nonnull ptr @AddrTest5_NoAttr() {
194169
; SMALLCM64-LABEL: AddrTest5_NoAttr:
195170
; SMALLCM64: # %bb.0: # %entry
196171
; SMALLCM64-NEXT: ld r3, L..C3(r2) # target-flags(ppc-tprel) @e_noattr
@@ -211,23 +186,18 @@ entry:
211186
ret ptr %arrayidx
212187
}
213188

214-
define nonnull ptr @AddrTest6() local_unnamed_addr {
215-
; SMALLCM64-LABEL: AddrTest6:
216-
; SMALLCM64: # %bb.0: # %entry
217-
; SMALLCM64-NEXT: addi r3, r13, f[TL]@le+16
218-
; SMALLCM64-NEXT: blr
219-
;
220-
; LARGECM64-LABEL: AddrTest6:
221-
; LARGECM64: # %bb.0: # %entry
222-
; LARGECM64-NEXT: addi r3, r13, f[TL]@le+16
223-
; LARGECM64-NEXT: blr
189+
define nonnull ptr @AddrTest6() {
190+
; COMMONCM-LABEL: AddrTest6:
191+
; COMMONCM: # %bb.0: # %entry
192+
; COMMONCM-NEXT: addi r3, r13, f[TL]@le+16
193+
; COMMONCM-NEXT: blr
224194
entry:
225195
%tls0 = tail call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @f)
226196
%arrayidx = getelementptr inbounds [87 x float], ptr %tls0, i64 0, i64 4
227197
ret ptr %arrayidx
228198
}
229199

230-
define nonnull ptr @AddrTest6_NoAttr() local_unnamed_addr {
200+
define nonnull ptr @AddrTest6_NoAttr() {
231201
; SMALLCM64-LABEL: AddrTest6_NoAttr:
232202
; SMALLCM64: # %bb.0: # %entry
233203
; SMALLCM64-NEXT: ld r3, L..C4(r2) # target-flags(ppc-tprel) @f_noattr

‎llvm/test/CodeGen/PowerPC/aix-small-tls-globalvarattr-targetattr.ll

Lines changed: 15 additions & 28 deletions
Original file line numberDiff line numberDiff line change
@@ -1,11 +1,10 @@
1-
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
21
; RUN: llc -verify-machineinstrs -mcpu=pwr7 -ppc-asm-full-reg-names \
32
; RUN: -mtriple powerpc64-ibm-aix-xcoff -mattr=+aix-small-local-exec-tls < %s \
4-
; RUN: | FileCheck %s --check-prefix=SMALL-LOCAL-EXEC-SMALLCM64
3+
; RUN: | FileCheck %s --check-prefixes=COMMONCM,SMALL-LOCAL-EXEC-SMALLCM64
54
; RUN: llc -verify-machineinstrs -mcpu=pwr7 -ppc-asm-full-reg-names \
65
; RUN: -mtriple powerpc64-ibm-aix-xcoff --code-model=large \
76
; RUN: -mattr=+aix-small-local-exec-tls < %s | FileCheck %s \
8-
; RUN: --check-prefix=SMALL-LOCAL-EXEC-LARGECM64
7+
; RUN: --check-prefixes=COMMONCM,SMALL-LOCAL-EXEC-LARGECM64
98

109
@mySmallTLS = thread_local(localexec) global [7800 x i64] zeroinitializer, align 8 #0
1110
@mySmallTLS2 = thread_local(localexec) global [3000 x i64] zeroinitializer, align 8 #0
@@ -16,36 +15,24 @@ declare nonnull ptr @llvm.threadlocal.address.p0(ptr nonnull)
1615
; aix-small-local-exec-tls target attribute is turned on, all accesses will use
1716
; a "faster" local-exec sequence directly off the thread pointer.
1817
define i64 @StoreLargeAccess1() {
19-
; SMALL-LOCAL-EXEC-SMALLCM64-LABEL: StoreLargeAccess1:
20-
; SMALL-LOCAL-EXEC-SMALLCM64: # %bb.0: # %entry
21-
; SMALL-LOCAL-EXEC-SMALLCM64-NEXT: ld r3, L..C0(r2) # target-flags(ppc-tprel) @mySmallTLS
18+
; COMMONCM-LABEL: StoreLargeAccess1:
19+
; COMMONCM-NEXT: # %bb.0: # %entry
20+
; SMALL-LOCAL-EXEC-SMALLCM64: ld r3, L..C0(r2) # target-flags(ppc-tprel) @mySmallTLS
2221
; SMALL-LOCAL-EXEC-SMALLCM64-NEXT: li r4, 0
2322
; SMALL-LOCAL-EXEC-SMALLCM64-NEXT: li r5, 23
24-
; SMALL-LOCAL-EXEC-SMALLCM64-NEXT: ori r4, r4, 53328
25-
; SMALL-LOCAL-EXEC-SMALLCM64-NEXT: add r3, r13, r3
26-
; SMALL-LOCAL-EXEC-SMALLCM64-NEXT: stdx r5, r3, r4
27-
; SMALL-LOCAL-EXEC-SMALLCM64-NEXT: li r3, 55
28-
; SMALL-LOCAL-EXEC-SMALLCM64-NEXT: li r4, 64
29-
; SMALL-LOCAL-EXEC-SMALLCM64-NEXT: std r3, (mySmallTLS2[TL]@le+696)-65536(r13)
30-
; SMALL-LOCAL-EXEC-SMALLCM64-NEXT: li r3, 142
31-
; SMALL-LOCAL-EXEC-SMALLCM64-NEXT: std r4, (mySmallTLS3[TL]@le+20000)-131072(r13)
32-
; SMALL-LOCAL-EXEC-SMALLCM64-NEXT: blr
33-
;
34-
; SMALL-LOCAL-EXEC-LARGECM64-LABEL: StoreLargeAccess1:
35-
; SMALL-LOCAL-EXEC-LARGECM64: # %bb.0: # %entry
36-
; SMALL-LOCAL-EXEC-LARGECM64-NEXT: addis r3, L..C0@u(r2)
23+
; SMALL-LOCAL-EXEC-LARGECM64: addis r3, L..C0@u(r2)
3724
; SMALL-LOCAL-EXEC-LARGECM64-NEXT: li r4, 0
3825
; SMALL-LOCAL-EXEC-LARGECM64-NEXT: li r5, 23
3926
; SMALL-LOCAL-EXEC-LARGECM64-NEXT: ld r3, L..C0@l(r3)
40-
; SMALL-LOCAL-EXEC-LARGECM64-NEXT: ori r4, r4, 53328
41-
; SMALL-LOCAL-EXEC-LARGECM64-NEXT: add r3, r13, r3
42-
; SMALL-LOCAL-EXEC-LARGECM64-NEXT: stdx r5, r3, r4
43-
; SMALL-LOCAL-EXEC-LARGECM64-NEXT: li r3, 55
44-
; SMALL-LOCAL-EXEC-LARGECM64-NEXT: li r4, 64
45-
; SMALL-LOCAL-EXEC-LARGECM64-NEXT: std r3, (mySmallTLS2[TL]@le+696)-65536(r13)
46-
; SMALL-LOCAL-EXEC-LARGECM64-NEXT: li r3, 142
47-
; SMALL-LOCAL-EXEC-LARGECM64-NEXT: std r4, (mySmallTLS3[TL]@le+20000)-131072(r13)
48-
; SMALL-LOCAL-EXEC-LARGECM64-NEXT: blr
27+
; COMMONCM: ori r4, r4, 53328
28+
; COMMONCM-NEXT: add r3, r13, r3
29+
; COMMONCM-NEXT: stdx r5, r3, r4
30+
; COMMONCM-NEXT: li r3, 55
31+
; COMMONCM-NEXT: li r4, 64
32+
; COMMONCM-NEXT: std r3, (mySmallTLS2[TL]@le+696)-65536(r13)
33+
; COMMONCM-NEXT: li r3, 142
34+
; COMMONCM-NEXT: std r4, (mySmallTLS3[TL]@le+20000)-131072(r13)
35+
; COMMONCM-NEXT: blr
4936
entry:
5037
%tls0 = tail call align 8 ptr @llvm.threadlocal.address.p0(ptr align 8 @mySmallTLS)
5138
%arrayidx = getelementptr inbounds i8, ptr %tls0, i32 53328

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