[NVPTX]: add few llvm_unreachable

gonzalobg · gonzalobg · commit 629a0561c1e1 · 2024-09-19T07:33:12.000-07:00
diff --git a/llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp b/llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
@@ -957,6 +957,7 @@ NVPTX::Scope NVPTXDAGToDAGISel::getOperationScope(MemSDNode *N,
     // If operation is volatile, then its scope is system.
     return N->isVolatile() ? NVPTX::Scope::System : S;
   }
+  llvm_unreachable("unhandled ordering");
 }
 
 static bool canLowerToLDG(MemSDNode *N, const NVPTXSubtarget &Subtarget,
@@ -1054,6 +1055,7 @@ static unsigned int getFenceOp(NVPTX::Ordering O, NVPTX::Scope S,
         formatv("Unsupported \"{}\" ordering and \"{}\" scope for fence.",
                 OrderingToString(O), ScopeToString(S)));
   }
+  llvm_unreachable("unhandled ordering");
 }
 
 // Returns Memory Order and Scope of a memory instruction, and

Original file line number	Diff line number	Diff line change
`@@ -957,6 +957,7 @@ NVPTX::Scope NVPTXDAGToDAGISel::getOperationScope(MemSDNode *N,`
`957`	`957`	`// If operation is volatile, then its scope is system.`
`958`	`958`	`return N->isVolatile() ? NVPTX::Scope::System : S;`
`959`	`959`	`}`
	`960`	`+ llvm_unreachable("unhandled ordering");`
`960`	`961`	`}`
`961`	`962`
`962`	`963`	`static bool canLowerToLDG(MemSDNode *N, const NVPTXSubtarget &Subtarget,`
`@@ -1054,6 +1055,7 @@ static unsigned int getFenceOp(NVPTX::Ordering O, NVPTX::Scope S,`
`1054`	`1055`	`formatv("Unsupported \"{}\" ordering and \"{}\" scope for fence.",`
`1055`	`1056`	`OrderingToString(O), ScopeToString(S)));`
`1056`	`1057`	`}`
	`1058`	`+ llvm_unreachable("unhandled ordering");`
`1057`	`1059`	`}`
`1058`	`1060`
`1059`	`1061`	`// Returns Memory Order and Scope of a memory instruction, and`