@@ -620,29 +620,20 @@ void RISCVDisassembler::addSPOperands(MCInst &MI) const {
620
620
MI.insert (MI.begin () + i, MCOperand::createReg (RISCV::X2));
621
621
}
622
622
623
- #define TRY_TO_DECODE_WITH_ADDITIONAL_OPERATION (FEATURE_CHECKS, DECODER_TABLE, \
624
- DESC, ADDITIONAL_OPERATION) \
625
- do { \
626
- if (FEATURE_CHECKS) { \
627
- LLVM_DEBUG (dbgs () << " Trying " << DESC << " table:\n " ); \
628
- DecodeStatus Result = \
629
- decodeInstruction (DECODER_TABLE, MI, Insn, Address, this , STI); \
630
- if (Result != MCDisassembler::Fail) { \
631
- ADDITIONAL_OPERATION; \
632
- return Result; \
633
- } \
634
- } \
635
- } while (false )
636
- #define TRY_TO_DECODE_AND_ADD_SP (FEATURE_CHECKS, DECODER_TABLE, DESC ) \
637
- TRY_TO_DECODE_WITH_ADDITIONAL_OPERATION (FEATURE_CHECKS, DECODER_TABLE, DESC, \
638
- addSPOperands (MI))
639
- #define TRY_TO_DECODE (FEATURE_CHECKS, DECODER_TABLE, DESC ) \
640
- TRY_TO_DECODE_WITH_ADDITIONAL_OPERATION (FEATURE_CHECKS, DECODER_TABLE, DESC, \
641
- (void )nullptr)
642
- #define TRY_TO_DECODE_FEATURE (FEATURE, DECODER_TABLE, DESC ) \
643
- TRY_TO_DECODE (STI.hasFeature(FEATURE), DECODER_TABLE, DESC)
644
- #define TRY_TO_DECODE_FEATURE_ANY (FEATURES, DECODER_TABLE, DESC ) \
645
- TRY_TO_DECODE ((STI.getFeatureBits() & (FEATURES)).any(), DECODER_TABLE, DESC)
623
+ namespace {
624
+
625
+ struct DecoderListEntry {
626
+ const uint8_t *Table;
627
+ FeatureBitset ContainedFeatures;
628
+ const char *Desc;
629
+
630
+ bool haveContainedFeatures (const FeatureBitset &ActiveFeatures) const {
631
+ return ContainedFeatures.none () ||
632
+ (ContainedFeatures & ActiveFeatures).any ();
633
+ }
634
+ };
635
+
636
+ } // end anonymous namespace
646
637
647
638
static constexpr FeatureBitset XCVFeatureGroup = {
648
639
RISCV::FeatureVendorXCVbitmanip, RISCV::FeatureVendorXCVelw,
@@ -681,6 +672,31 @@ static constexpr FeatureBitset XTHeadGroup = {
681
672
RISCV::FeatureVendorXTHeadMemPair, RISCV::FeatureVendorXTHeadSync,
682
673
RISCV::FeatureVendorXTHeadVdot};
683
674
675
+ static constexpr DecoderListEntry DecoderList32[]{
676
+ // Vendor Extensions
677
+ {DecoderTableXVentana32,
678
+ {RISCV::FeatureVendorXVentanaCondOps},
679
+ " XVentanaCondOps" },
680
+ {DecoderTableXTHead32, XTHeadGroup, " T-Head extensions" },
681
+ {DecoderTableXSfvector32, XSfVectorGroup, " SiFive vector extensions" },
682
+ {DecoderTableXSfsystem32, XSfSystemGroup, " SiFive system extensions" },
683
+ {DecoderTableXSfcease32, {RISCV::FeatureVendorXSfcease}, " SiFive sf.cease" },
684
+ {DecoderTableXmipslsp32, {RISCV::FeatureVendorXMIPSLSP}, " MIPS mips.lsp" },
685
+ {DecoderTableXmipscmove32,
686
+ {RISCV::FeatureVendorXMIPSCMove},
687
+ " MIPS mips.ccmov" },
688
+ // Standard Extensions
689
+ {DecoderTableXCV32, XCVFeatureGroup, " CORE-V extensions" },
690
+ {DecoderTableXqci32, XqciFeatureGroup, " Qualcomm uC Extensions" },
691
+ {DecoderTableXRivos32, XRivosFeatureGroup, " Rivos" },
692
+ {DecoderTable32, {}, " RISCV32" },
693
+ {DecoderTableRV32GPRPair32, {}, " RV32GPRPair (rv32 and GPR pairs)" },
694
+ {DecoderTableZfinx32, {}, " Zfinx (Float in Integer)" },
695
+ {DecoderTableZdinxRV32GPRPair32,
696
+ {},
697
+ " ZdinxRV32GPRPair (rv32 and Double in Integer)" },
698
+ };
699
+
684
700
DecodeStatus RISCVDisassembler::getInstruction32 (MCInst &MI, uint64_t &Size,
685
701
ArrayRef<uint8_t > Bytes,
686
702
uint64_t Address,
@@ -693,37 +709,40 @@ DecodeStatus RISCVDisassembler::getInstruction32(MCInst &MI, uint64_t &Size,
693
709
694
710
uint32_t Insn = support::endian::read32le (Bytes.data ());
695
711
696
- TRY_TO_DECODE_FEATURE (RISCV::FeatureVendorXVentanaCondOps,
697
- DecoderTableXVentana32, " XVentanaCondOps" );
698
- TRY_TO_DECODE_FEATURE_ANY (XTHeadGroup, DecoderTableXTHead32,
699
- " T-Head extensions" );
700
- TRY_TO_DECODE_FEATURE_ANY (XSfVectorGroup, DecoderTableXSfvector32,
701
- " SiFive vector extensions" );
702
- TRY_TO_DECODE_FEATURE_ANY (XSfSystemGroup, DecoderTableXSfsystem32,
703
- " SiFive system extensions" );
704
- TRY_TO_DECODE_FEATURE (RISCV::FeatureVendorXSfcease, DecoderTableXSfcease32,
705
- " SiFive sf.cease" );
706
- TRY_TO_DECODE_FEATURE (RISCV::FeatureVendorXMIPSLSP, DecoderTableXmipslsp32,
707
- " MIPS mips.lsp" );
708
- TRY_TO_DECODE_FEATURE (RISCV::FeatureVendorXMIPSCMove,
709
- DecoderTableXmipscmove32, " MIPS mips.ccmov" );
710
- TRY_TO_DECODE_FEATURE_ANY (XCVFeatureGroup, DecoderTableXCV32,
711
- " CORE-V extensions" );
712
- TRY_TO_DECODE_FEATURE_ANY (XqciFeatureGroup, DecoderTableXqci32,
713
- " Qualcomm uC Extensions" );
714
-
715
- TRY_TO_DECODE_FEATURE_ANY (XRivosFeatureGroup, DecoderTableXRivos32, " Rivos" );
716
-
717
- TRY_TO_DECODE (true , DecoderTable32, " RISCV32" );
718
- TRY_TO_DECODE (true , DecoderTableRV32GPRPair32,
719
- " RV32GPRPair (rv32 and GPR pairs)" );
720
- TRY_TO_DECODE (true , DecoderTableZfinx32, " Zfinx (Float in Integer)" );
721
- TRY_TO_DECODE (true , DecoderTableZdinxRV32GPRPair32,
722
- " ZdinxRV32GPRPair (rv32 and Double in Integer)" );
712
+ for (const DecoderListEntry &Entry : DecoderList32) {
713
+ if (!Entry.haveContainedFeatures (STI.getFeatureBits ()))
714
+ continue ;
715
+
716
+ LLVM_DEBUG (dbgs () << " Trying " << Entry.Desc << " table:\n " );
717
+ DecodeStatus Result =
718
+ decodeInstruction (Entry.Table , MI, Insn, Address, this , STI);
719
+ if (Result == MCDisassembler::Fail)
720
+ continue ;
721
+
722
+ return Result;
723
+ }
723
724
724
725
return MCDisassembler::Fail;
725
726
}
726
727
728
+ static constexpr DecoderListEntry DecoderList16[]{
729
+ // Vendor Extensions
730
+ {DecoderTableXqci16, XqciFeatureGroup, " Qualcomm uC 16bit" },
731
+ {DecoderTableXqccmp16,
732
+ {RISCV::FeatureVendorXqccmp},
733
+ " Xqccmp (Qualcomm 16-bit Push/Pop & Double Move Instructions)" },
734
+ {DecoderTableXwchc16, {RISCV::FeatureVendorXwchc}, " WCH QingKe XW" },
735
+ // Standard Extensions
736
+ // DecoderTableZicfiss16 must be checked before DecoderTable16.
737
+ {DecoderTableZicfiss16, {}, " RVZicfiss (Shadow Stack)" },
738
+ {DecoderTable16, {}, " RISCV_C (16-bit Instruction)" },
739
+ {DecoderTableRISCV32Only_16, {}, " RISCV32Only_16 (16-bit Instruction)" },
740
+ // Zc* instructions incompatible with Zcf or Zcd
741
+ {DecoderTableZcOverlap16,
742
+ {},
743
+ " ZcOverlap (16-bit Instructions overlapping with Zcf/Zcd)" },
744
+ };
745
+
727
746
DecodeStatus RISCVDisassembler::getInstruction16 (MCInst &MI, uint64_t &Size,
728
747
ArrayRef<uint8_t > Bytes,
729
748
uint64_t Address,
@@ -736,27 +755,28 @@ DecodeStatus RISCVDisassembler::getInstruction16(MCInst &MI, uint64_t &Size,
736
755
737
756
uint32_t Insn = support::endian::read16le (Bytes.data ());
738
757
739
- TRY_TO_DECODE_FEATURE_ANY (XqciFeatureGroup, DecoderTableXqci16,
740
- " Qualcomm uC 16bit" );
741
- TRY_TO_DECODE_FEATURE (
742
- RISCV::FeatureVendorXqccmp, DecoderTableXqccmp16,
743
- " Xqccmp (Qualcomm 16-bit Push/Pop & Double Move Instructions)" );
744
- TRY_TO_DECODE_AND_ADD_SP (STI.hasFeature (RISCV::FeatureVendorXwchc),
745
- DecoderTableXwchc16, " WCH QingKe XW" );
746
-
747
- // DecoderTableZicfiss16 must be checked before DecoderTable16.
748
- TRY_TO_DECODE (true , DecoderTableZicfiss16, " RVZicfiss (Shadow Stack)" );
749
- TRY_TO_DECODE_AND_ADD_SP (true , DecoderTable16,
750
- " RISCV_C (16-bit Instruction)" );
751
- TRY_TO_DECODE_AND_ADD_SP (true , DecoderTableRISCV32Only_16,
752
- " RISCV32Only_16 (16-bit Instruction)" );
753
- // Zc* instructions incompatible with Zcf or Zcd.
754
- TRY_TO_DECODE (true , DecoderTableZcOverlap16,
755
- " ZcOverlap (16-bit Instructions overlapping with Zcf/Zcd)" );
758
+ for (const DecoderListEntry &Entry : DecoderList16) {
759
+ if (!Entry.haveContainedFeatures (STI.getFeatureBits ()))
760
+ continue ;
761
+
762
+ LLVM_DEBUG (dbgs () << " Trying " << Entry.Desc << " table:\n " );
763
+ DecodeStatus Result =
764
+ decodeInstruction (Entry.Table , MI, Insn, Address, this , STI);
765
+ if (Result == MCDisassembler::Fail)
766
+ continue ;
767
+
768
+ addSPOperands (MI);
769
+
770
+ return Result;
771
+ }
756
772
757
773
return MCDisassembler::Fail;
758
774
}
759
775
776
+ static constexpr DecoderListEntry DecoderList48[]{
777
+ {DecoderTableXqci48, XqciFeatureGroup, " Qualcomm uC 48bit" },
778
+ };
779
+
760
780
DecodeStatus RISCVDisassembler::getInstruction48 (MCInst &MI, uint64_t &Size,
761
781
ArrayRef<uint8_t > Bytes,
762
782
uint64_t Address,
@@ -768,11 +788,21 @@ DecodeStatus RISCVDisassembler::getInstruction48(MCInst &MI, uint64_t &Size,
768
788
Size = 6 ;
769
789
770
790
uint64_t Insn = 0 ;
771
- for (size_t i = Size; i-- != 0 ;) {
791
+ for (size_t i = Size; i-- != 0 ;)
772
792
Insn += (static_cast <uint64_t >(Bytes[i]) << 8 * i);
793
+
794
+ for (const DecoderListEntry &Entry : DecoderList48) {
795
+ if (!Entry.haveContainedFeatures (STI.getFeatureBits ()))
796
+ continue ;
797
+
798
+ LLVM_DEBUG (dbgs () << " Trying " << Entry.Desc << " table:\n " );
799
+ DecodeStatus Result =
800
+ decodeInstruction (Entry.Table , MI, Insn, Address, this , STI);
801
+ if (Result == MCDisassembler::Fail)
802
+ continue ;
803
+
804
+ return Result;
773
805
}
774
- TRY_TO_DECODE_FEATURE_ANY (XqciFeatureGroup, DecoderTableXqci48,
775
- " Qualcomm uC 48bit" );
776
806
777
807
return MCDisassembler::Fail;
778
808
}
0 commit comments