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lines changed

‎llvm/lib/Target/X86/X86.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -179,7 +179,7 @@ void initializeX86AvoidSFBPassPass(PassRegistry &);
179179
void initializeX86AvoidTrailingCallPassPass(PassRegistry &);
180180
void initializeX86CallFrameOptimizationPass(PassRegistry &);
181181
void initializeX86CmovConverterPassPass(PassRegistry &);
182-
void initializeX86DAGToDAGISelPass(PassRegistry &);
182+
void initializeX86DAGToDAGISelLegacyPass(PassRegistry &);
183183
void initializeX86DomainReassignmentPass(PassRegistry &);
184184
void initializeX86ExecutionDomainFixPass(PassRegistry &);
185185
void initializeX86ExpandPseudoPass(PassRegistry &);

‎llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp

Lines changed: 10 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -10,10 +10,12 @@
1010
/// TODO: Port CodeGen passes to new pass manager.
1111
//===----------------------------------------------------------------------===//
1212

13+
#include "X86ISelDAGToDAG.h"
1314
#include "X86TargetMachine.h"
1415

1516
#include "llvm/MC/MCStreamer.h"
1617
#include "llvm/Passes/CodeGenPassBuilder.h"
18+
#include "llvm/Passes/PassBuilder.h"
1719

1820
using namespace llvm;
1921

@@ -40,13 +42,20 @@ void X86CodeGenPassBuilder::addAsmPrinter(AddMachinePass &addPass,
4042
// TODO: Add AsmPrinter.
4143
}
4244

43-
Error X86CodeGenPassBuilder::addInstSelector(AddMachinePass &) const {
45+
Error X86CodeGenPassBuilder::addInstSelector(AddMachinePass &addPass) const {
4446
// TODO: Add instruction selector.
47+
addPass(X86ISelDAGToDAGPass(static_cast<X86TargetMachine &>(TM)));
4548
return Error::success();
4649
}
4750

4851
} // namespace
4952

53+
void X86TargetMachine::registerPassBuilderCallbacks(
54+
PassBuilder &PB, bool PopulateClassToPassNames) {
55+
#define GET_PASS_REGISTRY "X86PassRegistry.def"
56+
#include "llvm/Passes/TargetPassRegistry.inc"
57+
}
58+
5059
Error X86TargetMachine::buildCodeGenPipeline(
5160
ModulePassManager &MPM, raw_pwrite_stream &Out, raw_pwrite_stream *DwoOut,
5261
CodeGenFileType FileType, const CGPassBuilderOption &Opt,

‎llvm/lib/Target/X86/X86ISelDAGToDAG.cpp

Lines changed: 19 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -11,6 +11,7 @@
1111
//
1212
//===----------------------------------------------------------------------===//
1313

14+
#include "X86ISelDAGToDAG.h"
1415
#include "X86.h"
1516
#include "X86MachineFunctionInfo.h"
1617
#include "X86RegisterInfo.h"
@@ -169,12 +170,10 @@ namespace {
169170
bool IndirectTlsSegRefs;
170171

171172
public:
172-
static char ID;
173-
174173
X86DAGToDAGISel() = delete;
175174

176175
explicit X86DAGToDAGISel(X86TargetMachine &tm, CodeGenOptLevel OptLevel)
177-
: SelectionDAGISel(ID, tm, OptLevel), Subtarget(nullptr),
176+
: SelectionDAGISel(tm, OptLevel), Subtarget(nullptr),
178177
OptForMinSize(false), IndirectTlsSegRefs(false) {}
179178

180179
bool runOnMachineFunction(MachineFunction &MF) override {
@@ -187,9 +186,7 @@ namespace {
187186
OptForMinSize = MF.getFunction().hasMinSize();
188187
assert((!OptForMinSize || MF.getFunction().hasOptSize()) &&
189188
"OptForMinSize implies OptForSize");
190-
191-
SelectionDAGISel::runOnMachineFunction(MF);
192-
return true;
189+
return SelectionDAGISel::runOnMachineFunction(MF);
193190
}
194191

195192
void emitFunctionEntryCode() override;
@@ -577,11 +574,20 @@ namespace {
577574
bool hasNoSignFlagUses(SDValue Flags) const;
578575
bool hasNoCarryFlagUses(SDValue Flags) const;
579576
};
577+
578+
class X86DAGToDAGISelLegacy : public SelectionDAGISelLegacy {
579+
public:
580+
static char ID;
581+
explicit X86DAGToDAGISelLegacy(X86TargetMachine &tm,
582+
CodeGenOptLevel OptLevel)
583+
: SelectionDAGISelLegacy(
584+
ID, std::make_unique<X86DAGToDAGISel>(tm, OptLevel)) {}
585+
};
580586
}
581587

582-
char X86DAGToDAGISel::ID = 0;
588+
char X86DAGToDAGISelLegacy::ID = 0;
583589

584-
INITIALIZE_PASS(X86DAGToDAGISel, DEBUG_TYPE, PASS_NAME, false, false)
590+
INITIALIZE_PASS(X86DAGToDAGISelLegacy, DEBUG_TYPE, PASS_NAME, false, false)
585591

586592
// Returns true if this masked compare can be implemented legally with this
587593
// type.
@@ -6549,9 +6555,13 @@ bool X86DAGToDAGISel::SelectInlineAsmMemoryOperand(
65496555
return false;
65506556
}
65516557

6558+
X86ISelDAGToDAGPass::X86ISelDAGToDAGPass(X86TargetMachine &TM)
6559+
: SelectionDAGISelPass(
6560+
std::make_unique<X86DAGToDAGISel>(TM, TM.getOptLevel())) {}
6561+
65526562
/// This pass converts a legalized DAG into a X86-specific DAG,
65536563
/// ready for instruction scheduling.
65546564
FunctionPass *llvm::createX86ISelDag(X86TargetMachine &TM,
65556565
CodeGenOptLevel OptLevel) {
6556-
return new X86DAGToDAGISel(TM, OptLevel);
6566+
return new X86DAGToDAGISelLegacy(TM, OptLevel);
65576567
}

‎llvm/lib/Target/X86/X86ISelDAGToDAG.h

Lines changed: 25 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,25 @@
1+
//===-- X86ISelDAGToDAG.h ---------------------------------------*- C++ -*-===//
2+
//
3+
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4+
// See https://llvm.org/LICENSE.txt for license information.
5+
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6+
//
7+
//===----------------------------------------------------------------------===//
8+
9+
#ifndef LLVM_LIB_TARGET_X86_X86ISELDAGTODAG_H
10+
#define LLVM_LIB_TARGET_X86_X86ISELDAGTODAG_H
11+
12+
#include "llvm/CodeGen/SelectionDAGISel.h"
13+
14+
namespace llvm {
15+
16+
class X86TargetMachine;
17+
18+
class X86ISelDAGToDAGPass : public SelectionDAGISelPass {
19+
public:
20+
X86ISelDAGToDAGPass(X86TargetMachine &TM);
21+
};
22+
23+
} // namespace llvm
24+
25+
#endif // LLVM_LIB_TARGET_X86_X86ISELDAGTODAG_H

‎llvm/lib/Target/X86/X86PassRegistry.def

Lines changed: 19 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,19 @@
1+
//===- X86PassRegistry.def - Registry of X86 specific passes ----*- C++ -*-===//
2+
//
3+
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4+
// See https://llvm.org/LICENSE.txt for license information.
5+
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6+
//
7+
//===----------------------------------------------------------------------===//
8+
//
9+
// This file is used as the registry of passes that are part of the X86 backend.
10+
//
11+
//===----------------------------------------------------------------------===//
12+
13+
// NOTE: NO INCLUDE GUARD DESIRED!
14+
15+
#ifndef MACHINE_FUNCTION_PASS
16+
#define MACHINE_FUNCTION_PASS(NAME, CREATE_PASS)
17+
#endif
18+
MACHINE_FUNCTION_PASS("x86-isel", X86ISelDAGToDAGPass(*this))
19+
#undef MACHINE_FUNCTION_PASS

‎llvm/lib/Target/X86/X86TargetMachine.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -100,7 +100,7 @@ extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeX86Target() {
100100
initializeX86PartialReductionPass(PR);
101101
initializePseudoProbeInserterPass(PR);
102102
initializeX86ReturnThunksPass(PR);
103-
initializeX86DAGToDAGISelPass(PR);
103+
initializeX86DAGToDAGISelLegacyPass(PR);
104104
initializeX86ArgumentStackSlotPassPass(PR);
105105
initializeX86FixupInstTuningPassPass(PR);
106106
initializeX86FixupVectorConstantsPassPass(PR);

‎llvm/lib/Target/X86/X86TargetMachine.h

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -58,6 +58,9 @@ class X86TargetMachine final : public LLVMTargetMachine {
5858
createMachineFunctionInfo(BumpPtrAllocator &Allocator, const Function &F,
5959
const TargetSubtargetInfo *STI) const override;
6060

61+
void registerPassBuilderCallbacks(PassBuilder &PB,
62+
bool PopulateClassToPassNames) override;
63+
6164
Error buildCodeGenPipeline(ModulePassManager &, raw_pwrite_stream &,
6265
raw_pwrite_stream *, CodeGenFileType,
6366
const CGPassBuilderOption &,

‎llvm/test/CodeGen/X86/apx/no-rex2-general.ll

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,8 @@
11
; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
22
; RUN: llc < %s -mtriple=x86_64-unknown -stop-after=x86-isel -mattr=+sse2,+ssse3,+egpr | FileCheck %s --check-prefix=SSE
33
; RUN: llc < %s -mtriple=x86_64-unknown -stop-after=x86-isel -mattr=+sse2,+ssse3,+egpr,+avx | FileCheck %s --check-prefix=AVX
4+
; RUN: llc < %s -enable-new-pm -mtriple=x86_64-unknown -stop-after=x86-isel -mattr=+sse2,+ssse3,+egpr | FileCheck %s --check-prefix=SSE
5+
; RUN: llc < %s -enable-new-pm -mtriple=x86_64-unknown -stop-after=x86-isel -mattr=+sse2,+ssse3,+egpr,+avx | FileCheck %s --check-prefix=AVX
46

57
define i32 @map0(ptr nocapture noundef readonly %a, i64 noundef %b) {
68
; SSE-LABEL: name: map0

‎llvm/test/CodeGen/X86/apx/no-rex2-pseudo-amx.ll

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,6 @@
11
; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
22
; RUN: llc < %s -mtriple=x86_64-unknown -stop-after=x86-isel -mattr=+amx-tile,+egpr | FileCheck %s
3+
; RUN: llc < %s -enable-new-pm -mtriple=x86_64-unknown -stop-after=x86-isel -mattr=+amx-tile,+egpr | FileCheck %s
34

45
define dso_local void @amx(ptr noundef %data) {
56
; CHECK-LABEL: name: amx

‎llvm/test/CodeGen/X86/apx/no-rex2-pseudo-x87.ll

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,6 @@
11
; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
22
; RUN: llc < %s -mtriple=x86_64-unknown -stop-after=x86-isel -mattr=-sse,+egpr | FileCheck %s
3+
; RUN: llc < %s -enable-new-pm -mtriple=x86_64-unknown -stop-after=x86-isel -mattr=-sse,+egpr | FileCheck %s
34

45
define void @x87(ptr %0, ptr %1) {
56
; CHECK-LABEL: name: x87

‎llvm/test/CodeGen/X86/apx/no-rex2-special.ll

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,6 @@
11
; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
22
; RUN: llc < %s -mtriple=x86_64-unknown -stop-after=x86-isel -mattr=+xsave,+egpr | FileCheck %s
3+
; RUN: llc < %s -enable-new-pm -mtriple=x86_64-unknown -stop-after=x86-isel -mattr=+xsave,+egpr | FileCheck %s
34

45
define void @test_xsave(ptr %ptr, i32 %hi, i32 %lo) {
56
; CHECK-LABEL: name: test_xsave

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