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momchil-velikovmomchil-velikov
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Revert "[AArch64] Async unwind - function epilogues"
This reverts commit 74319d6. It causes test failures that look like infinite loop in asan/hwasan unwinding.
1 parent 9e46866 commit 63c9aca

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46 files changed

+191
-1496
lines changed

‎llvm/lib/Target/AArch64/AArch64FrameLowering.cpp

Lines changed: 61 additions & 132 deletions
Large diffs are not rendered by default.

‎llvm/lib/Target/AArch64/AArch64FrameLowering.h

Lines changed: 0 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -147,10 +147,6 @@ class AArch64FrameLowering : public TargetFrameLowering {
147147
MachineBasicBlock::iterator MBBI) const;
148148
void emitCalleeSavedSVELocations(MachineBasicBlock &MBB,
149149
MachineBasicBlock::iterator MBBI) const;
150-
void emitCalleeSavedGPRRestores(MachineBasicBlock &MBB,
151-
MachineBasicBlock::iterator MBBI) const;
152-
void emitCalleeSavedSVERestores(MachineBasicBlock &MBB,
153-
MachineBasicBlock::iterator MBBI) const;
154150
};
155151

156152
} // End llvm namespace

‎llvm/lib/Target/AArch64/AArch64InstrInfo.cpp

Lines changed: 4 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -4139,12 +4139,11 @@ static MCCFIInstruction createDefCFAExpression(const TargetRegisterInfo &TRI,
41394139

41404140
MCCFIInstruction llvm::createDefCFA(const TargetRegisterInfo &TRI,
41414141
unsigned FrameReg, unsigned Reg,
4142-
const StackOffset &Offset,
4143-
bool LastAdjustmentWasScalable) {
4142+
const StackOffset &Offset) {
41444143
if (Offset.getScalable())
41454144
return createDefCFAExpression(TRI, Reg, Offset);
41464145

4147-
if (FrameReg == Reg && !LastAdjustmentWasScalable)
4146+
if (FrameReg == Reg)
41484147
return MCCFIInstruction::cfiDefCfaOffset(nullptr, int(Offset.getFixed()));
41494148

41504149
unsigned DwarfReg = TRI.getDwarfRegNum(Reg, true);
@@ -4276,8 +4275,8 @@ static void emitFrameOffsetAdj(MachineBasicBlock &MBB,
42764275
const TargetSubtargetInfo &STI = MF.getSubtarget();
42774276
const TargetRegisterInfo &TRI = *STI.getRegisterInfo();
42784277

4279-
unsigned CFIIndex = MF.addFrameInst(
4280-
createDefCFA(TRI, FrameReg, DestReg, CFAOffset, VScale != 1));
4278+
unsigned CFIIndex =
4279+
MF.addFrameInst(createDefCFA(TRI, FrameReg, DestReg, CFAOffset));
42814280
BuildMI(MBB, MBBI, DL, TII->get(TargetOpcode::CFI_INSTRUCTION))
42824281
.addCFIIndex(CFIIndex)
42834282
.setMIFlags(Flag);

‎llvm/lib/Target/AArch64/AArch64InstrInfo.h

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -396,8 +396,7 @@ bool isNZCVTouchedInInstructionRange(const MachineInstr &DefMI,
396396
const TargetRegisterInfo *TRI);
397397

398398
MCCFIInstruction createDefCFA(const TargetRegisterInfo &TRI, unsigned FrameReg,
399-
unsigned Reg, const StackOffset &Offset,
400-
bool LastAdjustmentWasScalable = true);
399+
unsigned Reg, const StackOffset &Offset);
401400
MCCFIInstruction createCFAOffset(const TargetRegisterInfo &MRI, unsigned Reg,
402401
const StackOffset &OffsetFromDefCFA);
403402

‎llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.cpp

Lines changed: 5 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -15,7 +15,6 @@
1515

1616
#include "AArch64MachineFunctionInfo.h"
1717
#include "AArch64InstrInfo.h"
18-
#include "AArch64Subtarget.h"
1918
#include "llvm/MC/MCAsmInfo.h"
2019
#include "llvm/IR/Constants.h"
2120
#include "llvm/IR/Metadata.h"
@@ -127,19 +126,9 @@ bool AArch64FunctionInfo::needsDwarfUnwindInfo() const {
127126
}
128127

129128
bool AArch64FunctionInfo::needsAsyncDwarfUnwindInfo() const {
130-
if (!NeedsAsyncDwarfUnwindInfo.hasValue()) {
131-
const Function &F = MF.getFunction();
132-
NeedsAsyncDwarfUnwindInfo =
133-
needsDwarfUnwindInfo() && F.getUWTableKind() == UWTableKind::Async &&
134-
!MF.getSubtarget<AArch64Subtarget>()
135-
.isTargetMachO() && // TODO: async unwind info not represenatble in
136-
// the compact format(?).
137-
!F.hasMinSize(); // TODO: this is to prevent epilogue unwind info
138-
// from being emitted for homogeneous epilogues,
139-
// outlined functions, and functions outlined from.
140-
// Alternatively, we could disable those
141-
// optimisations. Or even better, add async unwind
142-
// support to them!
143-
}
144-
return NeedsAsyncDwarfUnwindInfo.getValue();
129+
if (!NeedsDwarfAsyncUnwindInfo.hasValue())
130+
NeedsDwarfAsyncUnwindInfo =
131+
needsDwarfUnwindInfo() &&
132+
MF.getFunction().getUWTableKind() == UWTableKind::Async;
133+
return NeedsDwarfAsyncUnwindInfo.getValue();
145134
}

‎llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -177,7 +177,7 @@ class AArch64FunctionInfo final : public MachineFunctionInfo {
177177
mutable Optional<bool> NeedsDwarfUnwindInfo;
178178

179179
/// True if the function need asynchronous unwind information.
180-
mutable Optional<bool> NeedsAsyncDwarfUnwindInfo;
180+
mutable Optional<bool> NeedsDwarfAsyncUnwindInfo;
181181

182182
public:
183183
explicit AArch64FunctionInfo(MachineFunction &MF);

‎llvm/test/CodeGen/AArch64/GlobalISel/byval-call.ll

Lines changed: 2 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -3,7 +3,7 @@
33

44
declare void @byval_i32(i32* byval(i32) %ptr)
55

6-
define void @call_byval_i32(i32* %incoming) uwtable {
6+
define void @call_byval_i32(i32* %incoming) {
77
; CHECK-LABEL: call_byval_i32:
88
; CHECK: // %bb.0:
99
; CHECK-NEXT: sub sp, sp, #32
@@ -15,16 +15,14 @@ define void @call_byval_i32(i32* %incoming) uwtable {
1515
; CHECK-NEXT: bl byval_i32
1616
; CHECK-NEXT: ldr x30, [sp, #16] // 8-byte Folded Reload
1717
; CHECK-NEXT: add sp, sp, #32
18-
; CHECK-NEXT: .cfi_def_cfa_offset 0
19-
; CHECK-NEXT: .cfi_restore w30
2018
; CHECK-NEXT: ret
2119
call void @byval_i32(i32* byval(i32) %incoming)
2220
ret void
2321
}
2422

2523
declare void @byval_a64i32([64 x i32]* byval([64 x i32]) %ptr)
2624

27-
define void @call_byval_a64i32([64 x i32]* %incoming) uwtable {
25+
define void @call_byval_a64i32([64 x i32]* %incoming) {
2826
; CHECK-LABEL: call_byval_a64i32:
2927
; CHECK: // %bb.0:
3028
; CHECK-NEXT: sub sp, sp, #288
@@ -69,14 +67,9 @@ define void @call_byval_a64i32([64 x i32]* %incoming) uwtable {
6967
; CHECK-NEXT: ldr q0, [x0, #240]
7068
; CHECK-NEXT: str q0, [sp, #240]
7169
; CHECK-NEXT: bl byval_a64i32
72-
; CHECK-NEXT: .cfi_def_cfa wsp, 288
7370
; CHECK-NEXT: ldp x29, x30, [sp, #256] // 16-byte Folded Reload
7471
; CHECK-NEXT: ldr x28, [sp, #272] // 8-byte Folded Reload
7572
; CHECK-NEXT: add sp, sp, #288
76-
; CHECK-NEXT: .cfi_def_cfa_offset 0
77-
; CHECK-NEXT: .cfi_restore w28
78-
; CHECK-NEXT: .cfi_restore w30
79-
; CHECK-NEXT: .cfi_restore w29
8073
; CHECK-NEXT: ret
8174
call void @byval_a64i32([64 x i32]* byval([64 x i32]) %incoming)
8275
ret void

‎llvm/test/CodeGen/AArch64/combine-comparisons-by-cse.ll

Lines changed: 2 additions & 26 deletions
Original file line numberDiff line numberDiff line change
@@ -444,12 +444,6 @@ define void @combine_non_adjacent_cmp_br(%struct.Struct* nocapture readonly %hdC
444444
; CHECK-NEXT: ldp x20, x19, [sp, #32] // 16-byte Folded Reload
445445
; CHECK-NEXT: ldp x22, x21, [sp, #16] // 16-byte Folded Reload
446446
; CHECK-NEXT: ldr x30, [sp], #48 // 8-byte Folded Reload
447-
; CHECK-NEXT: .cfi_def_cfa_offset 0
448-
; CHECK-NEXT: .cfi_restore w19
449-
; CHECK-NEXT: .cfi_restore w20
450-
; CHECK-NEXT: .cfi_restore w21
451-
; CHECK-NEXT: .cfi_restore w22
452-
; CHECK-NEXT: .cfi_restore w30
453447
; CHECK-NEXT: ret
454448
entry:
455449
%size = getelementptr inbounds %struct.Struct, %struct.Struct* %hdCall, i64 0, i32 0
@@ -519,10 +513,6 @@ define i32 @do_nothing_if_resultant_opcodes_would_differ() #0 {
519513
; CHECK-NEXT: .LBB7_8: // %return
520514
; CHECK-NEXT: ldp x20, x19, [sp, #16] // 16-byte Folded Reload
521515
; CHECK-NEXT: ldr x30, [sp], #32 // 8-byte Folded Reload
522-
; CHECK-NEXT: .cfi_def_cfa_offset 0
523-
; CHECK-NEXT: .cfi_restore w19
524-
; CHECK-NEXT: .cfi_restore w20
525-
; CHECK-NEXT: .cfi_restore w30
526516
; CHECK-NEXT: ret
527517
entry:
528518
%0 = load i32, i32* @a, align 4
@@ -599,16 +589,10 @@ define i32 @do_nothing_if_compares_can_not_be_adjusted_to_each_other() #0 {
599589
; CHECK-NEXT: // %bb.5:
600590
; CHECK-NEXT: mov w0, #123
601591
; CHECK-NEXT: ldp x30, x19, [sp], #16 // 16-byte Folded Reload
602-
; CHECK-NEXT: .cfi_def_cfa_offset 0
603-
; CHECK-NEXT: .cfi_restore w19
604-
; CHECK-NEXT: .cfi_restore w30
605592
; CHECK-NEXT: ret
606593
; CHECK-NEXT: .LBB8_6: // %if.end
607594
; CHECK-NEXT: mov w0, wzr
608595
; CHECK-NEXT: ldp x30, x19, [sp], #16 // 16-byte Folded Reload
609-
; CHECK-NEXT: .cfi_def_cfa_offset 0
610-
; CHECK-NEXT: .cfi_restore w19
611-
; CHECK-NEXT: .cfi_restore w30
612596
; CHECK-NEXT: ret
613597
entry:
614598
%0 = load i32, i32* @a, align 4
@@ -654,7 +638,7 @@ return: ; preds = %if.end, %land.lhs.t
654638
; fcmp d8, #0.0
655639
; b.gt .LBB0_5
656640

657-
define i32 @fcmpri(i32 %argc, i8** nocapture readonly %argv) #0 {
641+
define i32 @fcmpri(i32 %argc, i8** nocapture readonly %argv) {
658642
; CHECK-LABEL: fcmpri:
659643
; CHECK: // %bb.0: // %entry
660644
; CHECK-NEXT: str d8, [sp, #-32]! // 8-byte Folded Spill
@@ -692,10 +676,6 @@ define i32 @fcmpri(i32 %argc, i8** nocapture readonly %argv) #0 {
692676
; CHECK-NEXT: .LBB9_4: // %return
693677
; CHECK-NEXT: ldp x30, x19, [sp, #16] // 16-byte Folded Reload
694678
; CHECK-NEXT: ldr d8, [sp], #32 // 8-byte Folded Reload
695-
; CHECK-NEXT: .cfi_def_cfa_offset 0
696-
; CHECK-NEXT: .cfi_restore w19
697-
; CHECK-NEXT: .cfi_restore w30
698-
; CHECK-NEXT: .cfi_restore b8
699679
; CHECK-NEXT: ret
700680

701681
; CHECK-LABEL-DAG: .LBB9_3
@@ -734,7 +714,7 @@ return: ; preds = %land.lhs.true, %con
734714
ret i32 %retval.0
735715
}
736716

737-
define void @cmp_shifted(i32 %in, i32 %lhs, i32 %rhs) #0 {
717+
define void @cmp_shifted(i32 %in, i32 %lhs, i32 %rhs) {
738718
; CHECK-LABEL: cmp_shifted:
739719
; CHECK: // %bb.0: // %common.ret
740720
; CHECK-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
@@ -748,8 +728,6 @@ define void @cmp_shifted(i32 %in, i32 %lhs, i32 %rhs) #0 {
748728
; CHECK-NEXT: csel w0, w9, w8, ge
749729
; CHECK-NEXT: bl zoo
750730
; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
751-
; CHECK-NEXT: .cfi_def_cfa_offset 0
752-
; CHECK-NEXT: .cfi_restore w30
753731
; CHECK-NEXT: ret
754732
; [...]
755733

@@ -852,5 +830,3 @@ declare double @yoo(i32)
852830
declare i32 @xoo(i32, i32)
853831

854832
declare i32 @woo(double, double)
855-
856-
attributes #0 = { uwtable }

‎llvm/test/CodeGen/AArch64/cond-br-tuning.ll

Lines changed: 1 addition & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -180,7 +180,7 @@ declare void @foo()
180180
declare void @bar(i32)
181181

182182
; Don't transform since the call will clobber the NZCV bits.
183-
define void @test_call_clobber(i32 %unused, i32 %a) uwtable {
183+
define void @test_call_clobber(i32 %unused, i32 %a) {
184184
; CHECK-LABEL: test_call_clobber:
185185
; CHECK: // %bb.0: // %entry
186186
; CHECK-NEXT: stp x30, x19, [sp, #-16]! // 16-byte Folded Spill
@@ -193,9 +193,6 @@ define void @test_call_clobber(i32 %unused, i32 %a) uwtable {
193193
; CHECK-NEXT: cbnz w19, .LBB9_2
194194
; CHECK-NEXT: // %bb.1: // %if.end
195195
; CHECK-NEXT: ldp x30, x19, [sp], #16 // 16-byte Folded Reload
196-
; CHECK-NEXT: .cfi_def_cfa_offset 0
197-
; CHECK-NEXT: .cfi_restore w19
198-
; CHECK-NEXT: .cfi_restore w30
199196
; CHECK-NEXT: ret
200197
; CHECK-NEXT: .LBB9_2: // %if.then
201198
; CHECK-NEXT: bl foo

‎llvm/test/CodeGen/AArch64/csr-split.ll

Lines changed: 3 additions & 19 deletions
Original file line numberDiff line numberDiff line change
@@ -6,7 +6,7 @@
66

77
@a = common dso_local local_unnamed_addr global i32 0, align 4
88

9-
define dso_local signext i32 @test1(i32* %b) local_unnamed_addr uwtable {
9+
define dso_local signext i32 @test1(i32* %b) local_unnamed_addr {
1010
; CHECK-LABEL: test1:
1111
; CHECK: // %bb.0: // %entry
1212
; CHECK-NEXT: stp x30, x19, [sp, #-16]! // 16-byte Folded Spill
@@ -19,18 +19,12 @@ define dso_local signext i32 @test1(i32* %b) local_unnamed_addr uwtable {
1919
; CHECK-NEXT: b.eq .LBB0_2
2020
; CHECK-NEXT: // %bb.1: // %if.end
2121
; CHECK-NEXT: ldp x30, x19, [sp], #16 // 16-byte Folded Reload
22-
; CHECK-NEXT: .cfi_def_cfa_offset 0
23-
; CHECK-NEXT: .cfi_restore w19
24-
; CHECK-NEXT: .cfi_restore w30
2522
; CHECK-NEXT: ret
2623
; CHECK-NEXT: .LBB0_2: // %if.then
2724
; CHECK-NEXT: mov x19, x0
2825
; CHECK-NEXT: bl callVoid
2926
; CHECK-NEXT: mov x0, x19
3027
; CHECK-NEXT: ldp x30, x19, [sp], #16 // 16-byte Folded Reload
31-
; CHECK-NEXT: .cfi_def_cfa_offset 0
32-
; CHECK-NEXT: .cfi_restore w19
33-
; CHECK-NEXT: .cfi_restore w30
3428
; CHECK-NEXT: b callNonVoid
3529
;
3630
; CHECK-APPLE-LABEL: test1:
@@ -81,7 +75,7 @@ declare signext i32 @callVoid(...) local_unnamed_addr
8175

8276
declare signext i32 @callNonVoid(i32*) local_unnamed_addr
8377

84-
define dso_local signext i32 @test2(i32* %p1) local_unnamed_addr uwtable {
78+
define dso_local signext i32 @test2(i32* %p1) local_unnamed_addr {
8579
; CHECK-LABEL: test2:
8680
; CHECK: // %bb.0: // %entry
8781
; CHECK-NEXT: stp x30, x19, [sp, #-16]! // 16-byte Folded Spill
@@ -99,16 +93,10 @@ define dso_local signext i32 @test2(i32* %p1) local_unnamed_addr uwtable {
9993
; CHECK-NEXT: bl callVoid
10094
; CHECK-NEXT: mov x0, x19
10195
; CHECK-NEXT: ldp x30, x19, [sp], #16 // 16-byte Folded Reload
102-
; CHECK-NEXT: .cfi_def_cfa_offset 0
103-
; CHECK-NEXT: .cfi_restore w19
104-
; CHECK-NEXT: .cfi_restore w30
10596
; CHECK-NEXT: b callNonVoid
10697
; CHECK-NEXT: .LBB1_3: // %return
10798
; CHECK-NEXT: mov w0, wzr
10899
; CHECK-NEXT: ldp x30, x19, [sp], #16 // 16-byte Folded Reload
109-
; CHECK-NEXT: .cfi_def_cfa_offset 0
110-
; CHECK-NEXT: .cfi_restore w19
111-
; CHECK-NEXT: .cfi_restore w30
112100
; CHECK-NEXT: ret
113101
;
114102
; CHECK-APPLE-LABEL: test2:
@@ -163,7 +151,7 @@ return: ; preds = %if.end, %entry, %if
163151
}
164152

165153

166-
define dso_local i8* @test3(i8** nocapture %p1, i8 zeroext %p2) local_unnamed_addr uwtable {
154+
define dso_local i8* @test3(i8** nocapture %p1, i8 zeroext %p2) local_unnamed_addr {
167155
; CHECK-LABEL: test3:
168156
; CHECK: // %bb.0: // %entry
169157
; CHECK-NEXT: str x30, [sp, #-32]! // 8-byte Folded Spill
@@ -183,10 +171,6 @@ define dso_local i8* @test3(i8** nocapture %p1, i8 zeroext %p2) local_unnamed_ad
183171
; CHECK-NEXT: mov x0, x19
184172
; CHECK-NEXT: ldp x20, x19, [sp, #16] // 16-byte Folded Reload
185173
; CHECK-NEXT: ldr x30, [sp], #32 // 8-byte Folded Reload
186-
; CHECK-NEXT: .cfi_def_cfa_offset 0
187-
; CHECK-NEXT: .cfi_restore w19
188-
; CHECK-NEXT: .cfi_restore w20
189-
; CHECK-NEXT: .cfi_restore w30
190174
; CHECK-NEXT: ret
191175
;
192176
; CHECK-APPLE-LABEL: test3:

‎llvm/test/CodeGen/AArch64/emutls.ll

Lines changed: 4 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -9,13 +9,12 @@
99
@my_emutls_v_xyz = external global i8*, align 4
1010
declare i8* @my_emutls_get_address(i8*)
1111

12-
define i32 @my_get_xyz() uwtable {
12+
define i32 @my_get_xyz() {
1313
; ARM64-LABEL: my_get_xyz:
1414
; ARM64: adrp x0, :got:my_emutls_v_xyz
1515
; ARM64-NEXT: ldr x0, [x0, :got_lo12:my_emutls_v_xyz]
1616
; ARM64-NEXT: bl my_emutls_get_address
1717
; ARM64-NEXT: ldr w0, [x0]
18-
; ARM64-NEXT: .cfi_def_cfa wsp, 16
1918
; ARM64-NEXT: ldp x29, x30, [sp]
2019

2120
entry:
@@ -33,26 +32,24 @@ entry:
3332
@s1 = thread_local global i16 15
3433
@b1 = thread_local global i8 0
3534

36-
define i32 @f1() uwtable {
35+
define i32 @f1() {
3736
; ARM64-LABEL: f1:
3837
; ARM64: adrp x0, :got:__emutls_v.i1
3938
; ARM64-NEXT: ldr x0, [x0, :got_lo12:__emutls_v.i1]
4039
; ARM64-NEXT: bl __emutls_get_address
4140
; ARM64-NEXT: ldr w0, [x0]
42-
; ARM64-NEXT: .cfi_def_cfa wsp, 16
4341
; ARM64-NEXT: ldp x29, x30, [sp]
4442

4543
entry:
4644
%tmp1 = load i32, i32* @i1
4745
ret i32 %tmp1
4846
}
4947

50-
define i32* @f2() uwtable {
48+
define i32* @f2() {
5149
; ARM64-LABEL: f2:
5250
; ARM64: adrp x0, :got:__emutls_v.i1
5351
; ARM64-NEXT: ldr x0, [x0, :got_lo12:__emutls_v.i1]
5452
; ARM64-NEXT: bl __emutls_get_address
55-
; ARM64-NEXT: .cfi_def_cfa wsp, 16
5653
; ARM64-NEXT: ldp x29, x30, [sp]
5754

5855
entry:
@@ -71,12 +68,11 @@ entry:
7168
ret i32 %tmp1
7269
}
7370

74-
define i32* @f6() uwtable {
71+
define i32* @f6() {
7572
; ARM64-LABEL: f6:
7673
; ARM64: adrp x0, __emutls_v.i3
7774
; ARM64: add x0, x0, :lo12:__emutls_v.i3
7875
; ARM64-NEXT: bl __emutls_get_address
79-
; ARM64-NEXT: .cfi_def_cfa wsp, 16
8076
; ARM64-NEXT: ldp x29, x30, [sp]
8177

8278
entry:

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